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dol2asm OK

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Julgodis
2021-03-28 22:49:05 +02:00
parent 3d66902e1a
commit 1e95d29b60
60106 changed files with 4755966 additions and 1107376 deletions
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asm/f_pc/f_pc_stdcreate_req/fpcSCtRq_Handler__FP29standard_create_request_class.s
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lbl_80023D14:
/* 80023D14 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80023D18 7C 08 02 A6 */ mflr r0
/* 80023D1C 90 01 00 14 */ stw r0, 0x14(r1)
/* 80023D20 93 E1 00 0C */ stw r31, 0xc(r1)
/* 80023D24 7C 7F 1B 78 */ mr r31, r3
/* 80023D28 38 7F 00 48 */ addi r3, r31, 0x48
/* 80023D2C 7F E4 FB 78 */ mr r4, r31
/* 80023D30 48 24 29 A9 */ bl cPhs_Do__FP30request_of_phase_process_classPv
/* 80023D34 2C 03 00 03 */ cmpwi r3, 3
/* 80023D38 41 82 00 38 */ beq lbl_80023D70
/* 80023D3C 40 80 00 14 */ bge lbl_80023D50
/* 80023D40 2C 03 00 01 */ cmpwi r3, 1
/* 80023D44 41 82 00 2C */ beq lbl_80023D70
/* 80023D48 40 80 00 18 */ bge lbl_80023D60
/* 80023D4C 48 00 00 24 */ b lbl_80023D70
lbl_80023D50:
/* 80023D50 2C 03 00 05 */ cmpwi r3, 5
/* 80023D54 41 82 00 1C */ beq lbl_80023D70
/* 80023D58 40 80 00 18 */ bge lbl_80023D70
/* 80023D5C 48 00 00 10 */ b lbl_80023D6C
lbl_80023D60:
/* 80023D60 7F E3 FB 78 */ mr r3, r31
/* 80023D64 4B FF FF B1 */ bl fpcSCtRq_Handler__FP29standard_create_request_class
/* 80023D68 48 00 00 08 */ b lbl_80023D70
lbl_80023D6C:
/* 80023D6C 38 60 00 04 */ li r3, 4
lbl_80023D70:
/* 80023D70 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 80023D74 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80023D78 7C 08 03 A6 */ mtlr r0
/* 80023D7C 38 21 00 10 */ addi r1, r1, 0x10
/* 80023D80 4E 80 00 20 */ blr
asm/f_pc/f_pc_stdcreate_req/fpcSCtRq_Request__FP11layer_classsPFPvPv_iPvPv.s
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lbl_80023D94:
/* 80023D94 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 80023D98 7C 08 02 A6 */ mflr r0
/* 80023D9C 90 01 00 24 */ stw r0, 0x24(r1)
/* 80023DA0 39 61 00 20 */ addi r11, r1, 0x20
/* 80023DA4 48 33 E4 31 */ bl _savegpr_27
/* 80023DA8 7C 9B 23 78 */ mr r27, r4
/* 80023DAC 7C BC 2B 78 */ mr r28, r5
/* 80023DB0 7C DD 33 78 */ mr r29, r6
/* 80023DB4 7C FE 3B 78 */ mr r30, r7
/* 80023DB8 7F 60 07 34 */ extsh r0, r27
/* 80023DBC 2C 00 7F FF */ cmpwi r0, 0x7fff
/* 80023DC0 41 80 00 0C */ blt lbl_80023DCC
/* 80023DC4 38 60 FF FF */ li r3, -1
/* 80023DC8 48 00 00 48 */ b lbl_80023E10
lbl_80023DCC:
/* 80023DCC 38 80 00 60 */ li r4, 0x60
/* 80023DD0 3C A0 80 3A */ lis r5, submethod@ha
/* 80023DD4 38 A5 3A F0 */ addi r5, r5, submethod@l
/* 80023DD8 4B FF CF D9 */ bl fpcCtRq_Create__FP11layer_classUlP27create_request_method_class
/* 80023DDC 7C 7F 1B 79 */ or. r31, r3, r3
/* 80023DE0 40 82 00 0C */ bne lbl_80023DEC
/* 80023DE4 38 60 FF FF */ li r3, -1
/* 80023DE8 48 00 00 28 */ b lbl_80023E10
lbl_80023DEC:
/* 80023DEC 38 7F 00 48 */ addi r3, r31, 0x48
/* 80023DF0 3C 80 80 3A */ lis r4, method@ha
/* 80023DF4 38 84 3A FC */ addi r4, r4, method@l
/* 80023DF8 48 24 28 39 */ bl cPhs_Set__FP30request_of_phase_process_classPPFPv_i
/* 80023DFC B3 7F 00 50 */ sth r27, 0x50(r31)
/* 80023E00 93 9F 00 58 */ stw r28, 0x58(r31)
/* 80023E04 93 BF 00 5C */ stw r29, 0x5c(r31)
/* 80023E08 93 DF 00 54 */ stw r30, 0x54(r31)
/* 80023E0C 80 7F 00 3C */ lwz r3, 0x3c(r31)
lbl_80023E10:
/* 80023E10 39 61 00 20 */ addi r11, r1, 0x20
/* 80023E14 48 33 E4 0D */ bl _restgpr_27
/* 80023E18 80 01 00 24 */ lwz r0, 0x24(r1)
/* 80023E1C 7C 08 03 A6 */ mtlr r0
/* 80023E20 38 21 00 20 */ addi r1, r1, 0x20
/* 80023E24 4E 80 00 20 */ blr
asm/f_pc/f_pc_stdcreate_req/fpcSCtRq_phase_CreateProcess__FP29standard_create_request_class.s
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lbl_80023BC4:
/* 80023BC4 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80023BC8 7C 08 02 A6 */ mflr r0
/* 80023BCC 90 01 00 14 */ stw r0, 0x14(r1)
/* 80023BD0 93 E1 00 0C */ stw r31, 0xc(r1)
/* 80023BD4 7C 7F 1B 78 */ mr r31, r3
/* 80023BD8 80 63 00 44 */ lwz r3, 0x44(r3)
/* 80023BDC 4B FF DB 11 */ bl fpcLy_SetCurrentLayer__FP11layer_class
/* 80023BE0 A8 7F 00 50 */ lha r3, 0x50(r31)
/* 80023BE4 80 9F 00 3C */ lwz r4, 0x3c(r31)
/* 80023BE8 80 BF 00 54 */ lwz r5, 0x54(r31)
/* 80023BEC 4B FF CC 35 */ bl fpcBs_Create__FsUiPv
/* 80023BF0 90 7F 00 40 */ stw r3, 0x40(r31)
/* 80023BF4 80 7F 00 40 */ lwz r3, 0x40(r31)
/* 80023BF8 28 03 00 00 */ cmplwi r3, 0
/* 80023BFC 40 82 00 14 */ bne lbl_80023C10
/* 80023C00 A8 7F 00 50 */ lha r3, 0x50(r31)
/* 80023C04 4B FF E4 29 */ bl fpcLd_Free__Fs
/* 80023C08 38 60 00 05 */ li r3, 5
/* 80023C0C 48 00 00 0C */ b lbl_80023C18
lbl_80023C10:
/* 80023C10 93 E3 00 14 */ stw r31, 0x14(r3)
/* 80023C14 38 60 00 02 */ li r3, 2
lbl_80023C18:
/* 80023C18 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 80023C1C 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80023C20 7C 08 03 A6 */ mtlr r0
/* 80023C24 38 21 00 10 */ addi r1, r1, 0x10
/* 80023C28 4E 80 00 20 */ blr
asm/f_pc/f_pc_stdcreate_req/fpcSCtRq_phase_IsComplete__FP29standard_create_request_class.s
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lbl_80023C64:
/* 80023C64 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80023C68 7C 08 02 A6 */ mflr r0
/* 80023C6C 90 01 00 14 */ stw r0, 0x14(r1)
/* 80023C70 93 E1 00 0C */ stw r31, 0xc(r1)
/* 80023C74 83 E3 00 40 */ lwz r31, 0x40(r3)
/* 80023C78 80 6D 87 C0 */ lwz r3, g_fpcNd_type(r13)
/* 80023C7C 80 9F 00 B4 */ lwz r4, 0xb4(r31)
/* 80023C80 4B FF C9 CD */ bl fpcBs_Is_JustOfType__Fii
/* 80023C84 2C 03 00 01 */ cmpwi r3, 1
/* 80023C88 40 82 00 1C */ bne lbl_80023CA4
/* 80023C8C 38 7F 00 BC */ addi r3, r31, 0xbc
/* 80023C90 4B FF DA 11 */ bl fpcLy_IsCreatingMesg__FP11layer_class
/* 80023C94 2C 03 00 01 */ cmpwi r3, 1
/* 80023C98 40 82 00 0C */ bne lbl_80023CA4
/* 80023C9C 38 60 00 00 */ li r3, 0
/* 80023CA0 48 00 00 08 */ b lbl_80023CA8
lbl_80023CA4:
/* 80023CA4 38 60 00 02 */ li r3, 2
lbl_80023CA8:
/* 80023CA8 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 80023CAC 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80023CB0 7C 08 03 A6 */ mtlr r0
/* 80023CB4 38 21 00 10 */ addi r1, r1, 0x10
/* 80023CB8 4E 80 00 20 */ blr
asm/f_pc/f_pc_stdcreate_req/fpcSCtRq_phase_Load__FP29standard_create_request_class.s
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lbl_80023B70:
/* 80023B70 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80023B74 7C 08 02 A6 */ mflr r0
/* 80023B78 90 01 00 14 */ stw r0, 0x14(r1)
/* 80023B7C A8 63 00 50 */ lha r3, 0x50(r3)
/* 80023B80 4B FF E4 D1 */ bl fpcLd_Load__Fs
/* 80023B84 2C 03 00 04 */ cmpwi r3, 4
/* 80023B88 41 82 00 20 */ beq lbl_80023BA8
/* 80023B8C 40 80 00 24 */ bge lbl_80023BB0
/* 80023B90 2C 03 00 00 */ cmpwi r3, 0
/* 80023B94 41 82 00 0C */ beq lbl_80023BA0
/* 80023B98 48 00 00 18 */ b lbl_80023BB0
/* 80023B9C 48 00 00 14 */ b lbl_80023BB0
lbl_80023BA0:
/* 80023BA0 38 60 00 00 */ li r3, 0
/* 80023BA4 48 00 00 10 */ b lbl_80023BB4
lbl_80023BA8:
/* 80023BA8 38 60 00 02 */ li r3, 2
/* 80023BAC 48 00 00 08 */ b lbl_80023BB4
lbl_80023BB0:
/* 80023BB0 38 60 00 05 */ li r3, 5
lbl_80023BB4:
/* 80023BB4 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80023BB8 7C 08 03 A6 */ mtlr r0
/* 80023BBC 38 21 00 10 */ addi r1, r1, 0x10
/* 80023BC0 4E 80 00 20 */ blr
asm/f_pc/f_pc_stdcreate_req/fpcSCtRq_phase_PostMethod__FP29standard_create_request_class.s
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lbl_80023CBC:
/* 80023CBC 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80023CC0 7C 08 02 A6 */ mflr r0
/* 80023CC4 90 01 00 14 */ stw r0, 0x14(r1)
/* 80023CC8 7C 64 1B 78 */ mr r4, r3
/* 80023CCC 81 83 00 58 */ lwz r12, 0x58(r3)
/* 80023CD0 28 0C 00 00 */ cmplwi r12, 0
/* 80023CD4 41 82 00 24 */ beq lbl_80023CF8
/* 80023CD8 80 64 00 40 */ lwz r3, 0x40(r4)
/* 80023CDC 80 84 00 5C */ lwz r4, 0x5c(r4)
/* 80023CE0 7D 89 03 A6 */ mtctr r12
/* 80023CE4 4E 80 04 21 */ bctrl
/* 80023CE8 2C 03 00 00 */ cmpwi r3, 0
/* 80023CEC 40 82 00 0C */ bne lbl_80023CF8
/* 80023CF0 38 60 00 00 */ li r3, 0
/* 80023CF4 48 00 00 08 */ b lbl_80023CFC
lbl_80023CF8:
/* 80023CF8 38 60 00 02 */ li r3, 2
lbl_80023CFC:
/* 80023CFC 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80023D00 7C 08 03 A6 */ mtlr r0
/* 80023D04 38 21 00 10 */ addi r1, r1, 0x10
/* 80023D08 4E 80 00 20 */ blr
asm/f_pc/f_pc_stdcreate_req/fpcSCtRq_phase_SubCreateProcess__FP29standard_create_request_class.s
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lbl_80023C2C:
/* 80023C2C 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80023C30 7C 08 02 A6 */ mflr r0
/* 80023C34 90 01 00 14 */ stw r0, 0x14(r1)
/* 80023C38 93 E1 00 0C */ stw r31, 0xc(r1)
/* 80023C3C 7C 7F 1B 78 */ mr r31, r3
/* 80023C40 80 63 00 44 */ lwz r3, 0x44(r3)
/* 80023C44 4B FF DA A9 */ bl fpcLy_SetCurrentLayer__FP11layer_class
/* 80023C48 80 7F 00 40 */ lwz r3, 0x40(r31)
/* 80023C4C 4B FF CC D1 */ bl fpcBs_SubCreate__FP18base_process_class
/* 80023C50 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 80023C54 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80023C58 7C 08 03 A6 */ mtlr r0
/* 80023C5C 38 21 00 10 */ addi r1, r1, 0x10
/* 80023C60 4E 80 00 20 */ blr