mirror of
https://github.com/TwilitRealm/dusklight
synced 2026-08-14 11:53:44 -04:00
ff2faa9804
* JKRDvdArchive.s split * JKRMemArchive.s split * JKRAramArchive.s split * JKRCompArchive.s split * JKRDecomp.s split * JKRDvdRipper.s split * JKRAramBlock.s split * JKRAramHeap.s split * JKRAramPiece.s split * JKRAramStream.s split * removed unused .s files * JKRDvdAramRipper.s split * JKRAram.s split * cleanup and making vtables easier to debug * fixed merge errors * fixed JKRFileLoader::fetchVolumeName Co-authored-by: Pheenoh <pheenoh@gmail.com>
39 lines
1.8 KiB
ArmAsm
39 lines
1.8 KiB
ArmAsm
/* allocFromTail__11JKRAramHeapFUl __ct__11JKRAramHeapFUlUl::allocFromTail(unsigned long) */
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/* JKRAramHeap_NS_allocFromTail */
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/* 802D30BC 002CFFFC 94 21 FF F0 */ stwu r1, -0x10(r1)
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/* 802D30C0 002D0000 7C 08 02 A6 */ mflr r0
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/* 802D30C4 002D0004 90 01 00 14 */ stw r0, 0x14(r1)
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/* 802D30C8 002D0008 7C 66 1B 78 */ mr r6, r3
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/* 802D30CC 002D000C 38 04 00 1F */ addi r0, r4, 0x1f
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/* 802D30D0 002D0010 54 04 00 34 */ rlwinm r4, r0, 0, 0, 0x1a
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/* 802D30D4 002D0014 38 60 00 00 */ li r3, 0
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/* 802D30D8 002D0018 3C A0 80 43 */ lis r5, lbl_8043430C@ha
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/* 802D30DC 002D001C 38 A5 43 0C */ addi r5, r5, lbl_8043430C@l
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/* 802D30E0 002D0020 80 E5 00 04 */ lwz r7, 4(r5)
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/* 802D30E4 002D0024 48 00 00 20 */ b lbl_802D3104
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lbl_802D30E8:
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/* 802D30E8 002D0028 80 A7 00 00 */ lwz r5, 0(r7)
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/* 802D30EC 002D002C 80 05 00 1C */ lwz r0, 0x1c(r5)
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/* 802D30F0 002D0030 7C 00 20 40 */ cmplw r0, r4
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/* 802D30F4 002D0034 41 80 00 0C */ blt lbl_802D3100
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/* 802D30F8 002D0038 7C A3 2B 78 */ mr r3, r5
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/* 802D30FC 002D003C 48 00 00 10 */ b lbl_802D310C
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lbl_802D3100:
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/* 802D3100 002D0040 80 E7 00 08 */ lwz r7, 8(r7)
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lbl_802D3104:
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/* 802D3104 002D0044 28 07 00 00 */ cmplwi r7, 0
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/* 802D3108 002D0048 40 82 FF E0 */ bne lbl_802D30E8
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lbl_802D310C:
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/* 802D310C 002D004C 28 03 00 00 */ cmplwi r3, 0
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/* 802D3110 002D0050 41 82 00 10 */ beq lbl_802D3120
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/* 802D3114 002D0054 88 A6 00 40 */ lbz r5, 0x40(r6)
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/* 802D3118 002D0058 48 00 03 B9 */ bl allocTail__12JKRAramBlockFUlUcP11JKRAramHeap
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/* 802D311C 002D005C 48 00 00 08 */ b lbl_802D3124
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lbl_802D3120:
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/* 802D3120 002D0060 38 60 00 00 */ li r3, 0
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lbl_802D3124:
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/* 802D3124 002D0064 80 01 00 14 */ lwz r0, 0x14(r1)
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/* 802D3128 002D0068 7C 08 03 A6 */ mtlr r0
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/* 802D312C 002D006C 38 21 00 10 */ addi r1, r1, 0x10
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/* 802D3130 002D0070 4E 80 00 20 */ blr
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