mirror of
https://github.com/TwilitRealm/dusklight
synced 2026-06-05 18:57:14 -04:00
4df8ccc871
* Reorganize files into libs/{dolphin,JSystem,PowerPC_EABI_Support,revolution,TRK_MINNOW_DOLPHIN}
* Update configure.py and project.py for new libs structure
* Refactor `#include <dolphin/x.h>` -> `<x.h>`
* Remove `__REVOLUTION_SDK__` forwards from dolphin
* Fix dolphin/ references in revolution
* Wrap `#include <dolphin.h>` in `!__REVOLUTION_SDK__`
* Always build TRK against dolphin headers
* Resolve revolution SDK header resolution issues
216 lines
7.5 KiB
C
216 lines
7.5 KiB
C
#include <cstdio>
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#include <dolphin/dolphin.h>
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#include <dolphin/os.h>
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#include "__os.h"
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OSErrorHandler __OSErrorTable[17];
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#define FPSCR_ENABLE (FPSCR_VE | FPSCR_OE | FPSCR_UE | FPSCR_ZE | FPSCR_XE)
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u32 __OSFpscrEnableBits = FPSCR_ENABLE;
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void OSReport(const char* msg, ...) {
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va_list marker;
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va_start(marker, msg);
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vprintf(msg, marker);
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va_end(marker);
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}
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void OSVReport(const char* msg, va_list list) {
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vprintf(msg, list);
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}
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void OSPanic(const char* file, int line, const char* msg, ...) {
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va_list marker;
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u32 i;
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u32* p;
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OSDisableInterrupts();
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va_start(marker, msg);
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vprintf(msg, marker);
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va_end(marker);
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OSReport(" in \"%s\" on line %d.\n", file, line);
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OSReport("\nAddress: Back Chain LR Save\n");
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for (i = 0, p = (u32*)OSGetStackPointer(); p && (u32)p != 0xffffffff && i++ < 16; p = (u32*)*p) {
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OSReport("0x%08x: 0x%08x 0x%08x\n", p, p[0], p[1]);
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}
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PPCHalt();
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}
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OSErrorHandler OSSetErrorHandler(OSError error, OSErrorHandler handler) {
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OSErrorHandler oldHandler;
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int enabled;
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u32 msr;
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u32 fpscr;
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OSThread* thread;
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int i;
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ASSERTMSGLINE(209, error < 17, "OSSetErrorHandler(): unknown error.");
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enabled = OSDisableInterrupts();
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oldHandler = __OSErrorTable[error];
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__OSErrorTable[error] = handler;
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if (error == __OS_EXCEPTION_FLOATING_POINT_EXCEPTION) {
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msr = PPCMfmsr();
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PPCMtmsr(msr | MSR_FP);
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fpscr = PPCMffpscr();
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if (handler) {
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for (thread = __OSActiveThreadQueue.head; thread;
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thread = thread->linkActive.next)
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{
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thread->context.srr1 |= MSR_FE0 | MSR_FE1;
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if ((thread->context.state & OS_CONTEXT_STATE_FPSAVED) == 0) {
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thread->context.state |= OS_CONTEXT_STATE_FPSAVED;
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for (i = 0; i < 32; ++i) {
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*(u64*)&thread->context.fpr[i] = (u64)0xffffffffffffffffLL;
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*(u64*)&thread->context.psf[i] = (u64)0xffffffffffffffffLL;
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}
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thread->context.fpscr = FPSCR_NI;
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}
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thread->context.fpscr |= __OSFpscrEnableBits & FPSCR_ENABLE;
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thread->context.fpscr &=
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~(FPSCR_VXVC | FPSCR_VXIMZ | FPSCR_VXZDZ | FPSCR_VXIDI | FPSCR_VXISI |
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FPSCR_VXSNAN | FPSCR_VXSOFT | FPSCR_VXSQRT | FPSCR_VXCVI | FPSCR_XX |
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FPSCR_ZX | FPSCR_UX | FPSCR_OX | FPSCR_FX | FPSCR_FI);
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}
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fpscr |= __OSFpscrEnableBits & FPSCR_ENABLE;
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msr |= MSR_FE0 | MSR_FE1;
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} else {
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for (thread = __OSActiveThreadQueue.head; thread;
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thread = thread->linkActive.next)
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{
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thread->context.srr1 &= ~(MSR_FE0 | MSR_FE1);
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thread->context.fpscr &= ~FPSCR_ENABLE;
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thread->context.fpscr &=
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~(FPSCR_VXVC | FPSCR_VXIMZ | FPSCR_VXZDZ | FPSCR_VXIDI | FPSCR_VXISI |
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FPSCR_VXSNAN | FPSCR_VXSOFT | FPSCR_VXSQRT | FPSCR_VXCVI | FPSCR_XX |
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FPSCR_ZX | FPSCR_UX | FPSCR_OX | FPSCR_FX | FPSCR_FI);
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}
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fpscr &= ~FPSCR_ENABLE;
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msr &= ~(MSR_FE0 | MSR_FE1);
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}
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fpscr &= ~(FPSCR_VXVC | FPSCR_VXIMZ | FPSCR_VXZDZ | FPSCR_VXIDI | FPSCR_VXISI |
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FPSCR_VXSNAN | FPSCR_VXSOFT | FPSCR_VXSQRT | FPSCR_VXCVI | FPSCR_XX | FPSCR_ZX |
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FPSCR_UX | FPSCR_OX | FPSCR_FX | FPSCR_FI);
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PPCMtfpscr(fpscr);
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PPCMtmsr(msr);
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}
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OSRestoreInterrupts(enabled);
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return oldHandler;
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}
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volatile OSContext* __OSFPUContext AT_ADDRESS(OS_BASE_CACHED | 0x00D8);
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void __OSUnhandledException(__OSException exception, OSContext* context, u32 dsisr, u32 dar) {
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OSTime now;
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u32 fpscr;
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u32 msr;
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now = OSGetTime();
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if (!(context->srr1 & MSR_RI)) {
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OSReport("Non-recoverable Exception %d", exception);
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} else {
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if (exception == __OS_EXCEPTION_PROGRAM && (context->srr1 & (0x80000000 >> 11)) &&
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__OSErrorTable[__OS_EXCEPTION_FLOATING_POINT_EXCEPTION] != 0)
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{
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exception = __OS_EXCEPTION_FLOATING_POINT_EXCEPTION;
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msr = PPCMfmsr();
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PPCMtmsr(msr | 0x2000);
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if (__OSFPUContext) {
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OSSaveFPUContext((OSContext*)__OSFPUContext);
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}
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fpscr = PPCMffpscr();
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fpscr &= ~(FPSCR_VXVC | FPSCR_VXIMZ | FPSCR_VXZDZ | FPSCR_VXIDI | FPSCR_VXISI |
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FPSCR_VXSNAN | FPSCR_VXSOFT | FPSCR_VXSQRT | FPSCR_VXCVI | FPSCR_XX |
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FPSCR_ZX | FPSCR_UX | FPSCR_OX | FPSCR_FX | FPSCR_FI);
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PPCMtfpscr(fpscr);
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PPCMtmsr(msr);
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if (__OSFPUContext == context) {
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OSDisableScheduler();
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__OSErrorTable[exception](exception, context, dsisr, dar);
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context->srr1 &= ~0x2000;
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__OSFPUContext = NULL;
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context->fpscr &=
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~(FPSCR_VXVC | FPSCR_VXIMZ | FPSCR_VXZDZ | FPSCR_VXIDI | FPSCR_VXISI |
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FPSCR_VXSNAN | FPSCR_VXSOFT | FPSCR_VXSQRT | FPSCR_VXCVI | FPSCR_XX |
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FPSCR_ZX | FPSCR_UX | FPSCR_OX | FPSCR_FX | FPSCR_FI);
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OSEnableScheduler();
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__OSReschedule();
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} else {
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context->srr1 &= ~0x2000;
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__OSFPUContext = NULL;
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}
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OSLoadContext(context);
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}
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if (__OSErrorTable[exception]) {
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OSDisableScheduler();
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__OSErrorTable[exception](exception, context, dsisr, dar);
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OSEnableScheduler();
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__OSReschedule();
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OSLoadContext(context);
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}
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if (exception == __OS_EXCEPTION_DECREMENTER) {
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OSLoadContext(context);
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}
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OSReport("Unhandled Exception %d", exception);
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}
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#if DEBUG
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OSReport("(%s)", __OSExceptionNames[exception]);
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#endif
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OSReport("\n");
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OSDumpContext(context);
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OSReport("\nDSISR = 0x%08x DAR = 0x%08x\n", dsisr, dar);
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OSReport("TB = 0x%016llx\n", now);
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switch(exception) {
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case __OS_EXCEPTION_DSI:
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OSReport("\nInstruction at 0x%x (read from SRR0) attempted to access "
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"invalid address 0x%x (read from DAR)\n",
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context->srr0, dar);
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break;
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case __OS_EXCEPTION_ISI:
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OSReport("\nAttempted to fetch instruction from invalid address 0x%x "
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"(read from SRR0)\n",
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context->srr0);
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break;
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case __OS_EXCEPTION_ALIGNMENT:
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OSReport("\nInstruction at 0x%x (read from SRR0) attempted to access "
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"unaligned address 0x%x (read from DAR)\n",
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context->srr0, dar);
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break;
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case __OS_EXCEPTION_PROGRAM:
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OSReport("\nProgram exception : Possible illegal instruction/operation "
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"at or around 0x%x (read from SRR0)\n",
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context->srr0, dar);
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break;
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case __OS_EXCEPTION_MEMORY_PROTECTION:
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OSReport("\n");
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OSReport("AI DMA Address = 0x%04x%04x\n", __DSPRegs[DSP_DMA_START_HI],
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__DSPRegs[DSP_DMA_START_LO]);
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OSReport("ARAM DMA Address = 0x%04x%04x\n", __DSPRegs[DSP_ARAM_DMA_MM_HI],
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__DSPRegs[DSP_ARAM_DMA_MM_LO]);
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OSReport("DI DMA Address = 0x%08x\n", __DIRegs[5]);
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break;
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}
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OSReport("\nLast interrupt (%d): SRR0 = 0x%08x TB = 0x%016llx\n", __OSLastInterrupt,
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__OSLastInterruptSrr0, __OSLastInterruptTime);
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PPCHalt();
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}
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