mirror of
https://github.com/TwilitRealm/dusklight
synced 2026-06-07 03:17:22 -04:00
Luke Street
4df8ccc871
* Reorganize files into libs/{dolphin,JSystem,PowerPC_EABI_Support,revolution,TRK_MINNOW_DOLPHIN}
* Update configure.py and project.py for new libs structure
* Refactor `#include <dolphin/x.h>` -> `<x.h>`
* Remove `__REVOLUTION_SDK__` forwards from dolphin
* Fix dolphin/ references in revolution
* Wrap `#include <dolphin.h>` in `!__REVOLUTION_SDK__`
* Always build TRK against dolphin headers
* Resolve revolution SDK header resolution issues
644 lines
12 KiB
C
644 lines
12 KiB
C
#include <dolphin/dolphin.h>
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#include <dolphin/db.h>
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#include <dolphin/os.h>
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#include "__os.h"
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#define HID2 920
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// prototypes
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void DMAErrorHandler(OSError error, OSContext* context, ...);
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#ifdef __GEKKO__
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asm void DCFlashInvalidate(void) {
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nofralloc
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mfspr r3, HID0
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ori r3, r3, 0x400
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mtspr HID0, r3
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blr
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}
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asm void DCEnable(void) {
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nofralloc
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sync
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mfspr r3, HID0
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ori r3, r3, 0x4000
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mtspr HID0, r3
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blr
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}
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asm void DCDisable(void) {
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nofralloc
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sync
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mfspr r3, HID0
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rlwinm r3, r3, 0, 18, 16
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mtspr HID0, r3
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blr
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}
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asm void DCFreeze(void) {
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nofralloc
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sync
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mfspr r3, HID0
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ori r3, r3, 0x1000
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mtspr HID0, r3
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blr
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}
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asm void DCUnfreeze(void) {
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nofralloc
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mfspr r3, HID0
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rlwinm r3, r3, 0, 20, 18
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mtspr HID0, r3
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blr
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}
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asm void DCTouchLoad(__REGISTER void* addr) {
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nofralloc
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dcbt r0, addr
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blr
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}
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asm void DCBlockZero(__REGISTER void* addr) {
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nofralloc
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dcbz r0, addr
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blr
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}
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asm void DCBlockStore(__REGISTER void* addr) {
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nofralloc
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dcbst r0, addr
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blr
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}
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asm void DCBlockFlush(__REGISTER void* addr) {
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nofralloc
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dcbf r0, addr
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blr
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}
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asm void DCBlockInvalidate(__REGISTER void* addr) {
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nofralloc
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dcbi r0, addr
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blr
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}
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asm void DCInvalidateRange(__REGISTER void* addr, __REGISTER u32 nBytes) {
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nofralloc
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cmplwi nBytes, 0
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blelr
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clrlwi r5, addr, 27
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add nBytes, nBytes, r5
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addi nBytes, nBytes, 31
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srwi nBytes, nBytes, 5
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mtctr nBytes
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@1
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dcbi r0, addr
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addi addr, addr, 32
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bdnz @1
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blr
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}
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asm void DCFlushRange(__REGISTER void* addr, __REGISTER u32 nBytes) {
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nofralloc
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cmplwi nBytes, 0
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blelr
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clrlwi r5, addr, 27
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add nBytes, nBytes, r5
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addi nBytes, nBytes, 31
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srwi nBytes, nBytes, 5
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mtctr nBytes
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@1
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dcbf r0, addr
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addi addr, addr, 32
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bdnz @1
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sc
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blr
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}
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asm void DCStoreRange(__REGISTER void* addr, __REGISTER u32 nBytes) {
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nofralloc
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cmplwi nBytes, 0
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blelr
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clrlwi r5, addr, 27
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add nBytes, nBytes, r5
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addi nBytes, nBytes, 31
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srwi nBytes, nBytes, 5
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mtctr nBytes
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@1
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dcbst r0, addr
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addi addr, addr, 32
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bdnz @1
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sc
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blr
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}
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asm void DCFlushRangeNoSync(__REGISTER void* addr, __REGISTER u32 nBytes) {
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nofralloc
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cmplwi nBytes, 0
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blelr
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clrlwi r5, addr, 27
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add nBytes, nBytes, r5
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addi nBytes, nBytes, 31
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srwi nBytes, nBytes, 5
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mtctr nBytes
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@1
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dcbf r0, addr
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addi addr, addr, 32
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bdnz @1
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blr
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}
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asm void DCStoreRangeNoSync(__REGISTER void* addr, __REGISTER u32 nBytes) {
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nofralloc
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cmplwi nBytes, 0
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blelr
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clrlwi r5, addr, 27
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add nBytes, nBytes, r5
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addi nBytes, nBytes, 31
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srwi nBytes, nBytes, 5
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mtctr nBytes
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@1
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dcbst r0, addr
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addi addr, addr, 32
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bdnz @1
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blr
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}
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asm void DCZeroRange(__REGISTER void* addr, __REGISTER u32 nBytes) {
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nofralloc
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cmplwi nBytes, 0
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blelr
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clrlwi r5, addr, 27
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add nBytes, nBytes, r5
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addi nBytes, nBytes, 31
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srwi nBytes, nBytes, 5
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mtctr nBytes
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@1
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dcbz r0, addr
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addi addr, addr, 32
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bdnz @1
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blr
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}
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asm void DCTouchRange(__REGISTER void* addr, __REGISTER u32 nBytes) {
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nofralloc
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cmplwi nBytes, 0
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blelr
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clrlwi r5, addr, 27
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add nBytes, nBytes, r5
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addi nBytes, nBytes, 31
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srwi nBytes, nBytes, 5
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mtctr nBytes
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@1
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dcbt r0, addr
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addi addr, addr, 32
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bdnz @1
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blr
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}
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asm void ICInvalidateRange(__REGISTER void* addr, __REGISTER u32 nBytes) {
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nofralloc
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cmplwi nBytes, 0
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blelr
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clrlwi r5, addr, 27
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add nBytes, nBytes, r5
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addi nBytes, nBytes, 31
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srwi nBytes, nBytes, 5
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mtctr nBytes
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@1
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icbi r0, addr
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addi addr, addr, 32
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bdnz @1
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sync
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isync
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blr
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}
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asm void ICFlashInvalidate(void) {
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nofralloc
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mfspr r3, HID0
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ori r3, r3, 0x800
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mtspr HID0, r3
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blr
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}
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asm void ICEnable(void) {
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nofralloc
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isync
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mfspr r3, HID0
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ori r3, r3, 0x8000
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mtspr HID0, r3
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blr
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}
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asm void ICDisable(void) {
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nofralloc
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isync
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mfspr r3, HID0
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rlwinm r3, r3, 0, 17, 15
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mtspr HID0, r3
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blr
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}
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asm void ICFreeze(void) {
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nofralloc
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isync
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mfspr r3, HID0
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ori r3, r3, 0x2000
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mtspr HID0, r3
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blr
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}
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asm void ICUnfreeze(void) {
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nofralloc
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mfspr r3, HID0
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rlwinm r3, r3, 0, 19, 17
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mtspr HID0, r3
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blr
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}
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asm void ICBlockInvalidate(__REGISTER void* addr) {
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nofralloc
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icbi r0, addr
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blr
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}
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asm void ICSync(void) {
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nofralloc
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isync
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blr
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}
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#define LC_LINES 512
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#define CACHE_LINES 1024
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static asm void __LCEnable(void) {
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nofralloc
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mfmsr r5
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ori r5, r5, 0x1000
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mtmsr r5
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lis r3, OS_CACHED_REGION_PREFIX
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li r4, CACHE_LINES
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mtctr r4
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_touchloop:
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dcbt 0,r3
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dcbst 0,r3
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addi r3,r3,32
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bdnz _touchloop
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mfspr r4, HID2
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oris r4, r4, 0x100F
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mtspr HID2, r4
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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lis r3, LC_BASE_PREFIX
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ori r3, r3, 0x0002
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mtspr DBAT3L, r3
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ori r3, r3, 0x01fe
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mtspr DBAT3U, r3
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isync
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lis r3, LC_BASE_PREFIX
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li r6, LC_LINES
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mtctr r6
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li r6, 0
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_lockloop:
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dcbz_l r6, r3
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addi r3, r3, 32
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bdnz+ _lockloop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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blr
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}
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void LCEnable(void) {
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BOOL enabled;
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enabled = OSDisableInterrupts();
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__LCEnable();
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OSRestoreInterrupts(enabled);
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}
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asm void LCDisable(void) {
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nofralloc
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lis r3, LC_BASE_PREFIX
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li r4, LC_LINES
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mtctr r4
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@1
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dcbi r0, r3
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addi r3, r3, 32
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bdnz @1
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mfspr r4, HID2
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rlwinm r4, r4, 0, 4, 2
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mtspr HID2, r4
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blr
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}
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asm void LCAllocOneTag(__REGISTER BOOL invalidate, __REGISTER void* tag) {
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nofralloc
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cmpwi invalidate, 0
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beq @1
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dcbi r0, tag
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@1
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dcbz_l r0, tag
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blr
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}
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asm void LCAllocTags(__REGISTER BOOL invalidate, __REGISTER void* startTag, __REGISTER u32 numBlocks) {
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nofralloc
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mflr r6
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cmplwi numBlocks, 0
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ble @3
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mtctr numBlocks
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cmpwi invalidate, 0
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beq @2
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@1
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dcbi r0, startTag
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dcbz_l r0, startTag
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addi startTag, startTag, 32
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bdnz @1
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b @3
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@2
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dcbz_l r0, startTag
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addi startTag, startTag, 32
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bdnz @2
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@3
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mtlr r6
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blr
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}
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asm void LCLoadBlocks(__REGISTER void* destTag, __REGISTER void* srcAddr, __REGISTER u32 numBlocks) {
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nofralloc
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rlwinm r6, numBlocks, 30, 27, 31
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rlwinm srcAddr, srcAddr, 0, 4, 31
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or r6, r6, srcAddr
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mtspr DMA_U, r6
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rlwinm r6, numBlocks, 2, 28, 29
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or r6, r6, destTag
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ori r6, r6, 0x12
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mtspr DMA_L, r6
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blr
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}
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asm void LCStoreBlocks(__REGISTER void* destAddr, __REGISTER void* srcTag, __REGISTER u32 numBlocks) {
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nofralloc
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rlwinm r6, numBlocks, 30, 27, 31
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rlwinm destAddr, destAddr, 0, 4, 31
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or r6, r6, destAddr
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mtspr DMA_U, r6
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rlwinm r6, numBlocks, 2, 28, 29
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or r6, r6, srcTag
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ori r6, r6, 0x2
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mtspr DMA_L, r6
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blr
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}
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#endif
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void LCAlloc(void* addr, u32 nBytes) {
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u32 numBlocks = nBytes >> 5;
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u32 hid2 = PPCMfhid2();
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ASSERTMSGLINE(1319, !((u32)addr & 31), "LCAlloc(): addr must be 32 byte aligned");
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ASSERTMSGLINE(1321, !((u32)nBytes & 31), "LCAlloc(): nBytes must be 32 byte aligned");
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if ((hid2 & 0x10000000) == 0) {
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LCEnable();
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}
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LCAllocTags(TRUE, addr, numBlocks);
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}
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void LCAllocNoInvalidate(void* addr, u32 nBytes) {
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u32 numBlocks = nBytes >> 5;
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u32 hid2 = PPCMfhid2();
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ASSERTMSGLINE(1366, !((u32)addr & 31), "LCAllocNoFlush(): addr must be 32 byte aligned");
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ASSERTMSGLINE(1368, !((u32)nBytes & 31), "LCAllocNoFlush(): nBytes must be 32 byte aligned");
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if ((hid2 & 0x10000000) == 0) {
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LCEnable();
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}
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LCAllocTags(FALSE, addr, numBlocks);
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}
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u32 LCLoadData(void* destAddr, void* srcAddr, u32 nBytes) {
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u32 numBlocks = (nBytes + 31) / 32;
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u32 numTransactions = (numBlocks + 128 - 1) / 128;
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ASSERTMSGLINE(1426, !((u32)srcAddr & 31), "LCLoadData(): srcAddr not 32 byte aligned");
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ASSERTMSGLINE(1428, !((u32)destAddr & 31), "LCLoadData(): destAddr not 32 byte aligned");
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while (numBlocks > 0) {
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if (numBlocks < 128) {
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LCLoadBlocks(destAddr, srcAddr, numBlocks);
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numBlocks = 0;
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} else {
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LCLoadBlocks(destAddr, srcAddr, 0);
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numBlocks -= 128;
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destAddr = (void*)((u32)destAddr + 4096);
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srcAddr = (void*)((u32)srcAddr + 4096);
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}
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}
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return numTransactions;
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}
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u32 LCStoreData(void* destAddr, void* srcAddr, u32 nBytes) {
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u32 numBlocks = (nBytes + 31) / 32;
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u32 numTransactions = (numBlocks + 128 - 1) / 128;
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ASSERTMSGLINE(1494, !((u32)srcAddr & 31), "LCStoreData(): srcAddr not 32 byte aligned");
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ASSERTMSGLINE(1496, !((u32)destAddr & 31), "LCStoreData(): destAddr not 32 byte aligned");
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while (numBlocks > 0) {
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if (numBlocks < 128) {
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LCStoreBlocks(destAddr, srcAddr, numBlocks);
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numBlocks = 0;
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} else {
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LCStoreBlocks(destAddr, srcAddr, 0);
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numBlocks -= 128;
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destAddr = (void*)((u32)destAddr + 4096);
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srcAddr = (void*)((u32)srcAddr + 4096);
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}
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}
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return numTransactions;
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}
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#ifdef __GEKKO__
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asm u32 LCQueueLength(void) {
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nofralloc
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mfspr r4, HID2
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rlwinm r3, r4, 8, 28, 31
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blr
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}
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asm void LCQueueWait(__REGISTER u32 len) {
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nofralloc
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@1
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mfspr r4, HID2
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rlwinm r4, r4, 8, 28, 31
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cmpw r4, r3
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bgt @1
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blr
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}
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#endif
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void LCFlushQueue() {
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union {
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u32 val;
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struct {
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u32 lcAddr : 27;
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u32 dmaLd : 1;
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u32 dmaLenL : 2;
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u32 dmaTrigger : 1;
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u32 dmaFlush : 1;
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} f;
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} dmaL;
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dmaL.val = 0;
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dmaL.f.dmaFlush = 1;
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PPCMtdmaU(0);
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PPCMtdmaL(dmaL.val);
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PPCSync();
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}
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static void L2Init(void) {
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u32 oldMSR;
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oldMSR = PPCMfmsr();
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__sync();
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PPCMtmsr(MSR_IR | MSR_DR);
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__sync();
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L2Disable();
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L2GlobalInvalidate();
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PPCMtmsr(oldMSR);
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}
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void L2Enable(void) {
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PPCMtl2cr((PPCMfl2cr() | L2CR_L2E) & ~L2CR_L2I);
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}
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void L2Disable(void) {
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__sync();
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PPCMtl2cr(PPCMfl2cr() & ~0x80000000);
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__sync();
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}
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void L2GlobalInvalidate(void) {
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L2Disable();
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PPCMtl2cr(PPCMfl2cr() | 0x00200000);
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while (PPCMfl2cr() & 0x00000001u);
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PPCMtl2cr(PPCMfl2cr() & ~0x00200000);
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while (PPCMfl2cr() & 0x00000001u) {
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DBPrintf(">>> L2 INVALIDATE : SHOULD NEVER HAPPEN\n");
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}
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}
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void L2SetDataOnly(BOOL dataOnly) {
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if (dataOnly) {
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PPCMtl2cr(PPCMfl2cr() | 0x400000);
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return;
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}
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PPCMtl2cr(PPCMfl2cr() & 0xFFBFFFFF);
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}
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void L2SetWriteThrough(BOOL writeThrough) {
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if (writeThrough) {
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PPCMtl2cr(PPCMfl2cr() | 0x80000);
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return;
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}
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PPCMtl2cr(PPCMfl2cr() & 0xFFF7FFFF);
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}
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void DMAErrorHandler(OSError error, OSContext* context, ...) {
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u32 hid2 = PPCMfhid2();
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OSReport("Machine check received\n");
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OSReport("HID2 = 0x%x SRR1 = 0x%x\n", hid2, context->srr1);
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if (!(hid2 & (HID2_DCHERR | HID2_DNCERR | HID2_DCMERR | HID2_DQOERR)) || !(context->srr1 & SRR1_DMA_BIT)) {
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OSReport("Machine check was not DMA/locked cache related\n");
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OSDumpContext(context);
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PPCHalt();
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}
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OSReport("DMAErrorHandler(): An error occurred while processing DMA.\n");
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OSReport("The following errors have been detected and cleared :\n");
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if (hid2 & HID2_DCHERR) {
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OSReport("\t- Requested a locked cache tag that was already in the cache\n");
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}
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if (hid2 & HID2_DNCERR) {
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OSReport("\t- DMA attempted to access normal cache\n");
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}
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if (hid2 & HID2_DCMERR) {
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OSReport("\t- DMA missed in data cache\n");
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}
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if (hid2 & HID2_DQOERR) {
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OSReport("\t- DMA queue overflowed\n");
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}
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// write hid2 back to clear the error bits
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PPCMthid2(hid2);
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}
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void __OSCacheInit() {
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if (!(PPCMfhid0() & HID0_ICE)) {
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ICEnable();
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DBPrintf("L1 i-caches initialized\n");
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}
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if (!(PPCMfhid0() & HID0_DCE)) {
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DCEnable();
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DBPrintf("L1 d-caches initialized\n");
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}
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if (!(PPCMfl2cr() & L2CR_L2E)) {
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L2Init();
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L2Enable();
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DBPrintf("L2 cache initialized\n");
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}
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OSSetErrorHandler(OS_ERROR_MACHINE_CHECK, DMAErrorHandler);
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DBPrintf("Locked cache machine check handler installed\n");
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}
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