mirror of
https://github.com/TwilitRealm/dusklight
synced 2026-06-22 06:56:31 -04:00
lepelog
0eec99db4d
* split c_math * split c_angle * split c_API_controller_pad * split c_API_graphic * split c_bg_s_chk * c_bg_s_gnd_chk split * more c_bg split * split c_cc_d * delete asm * split c_cc_s * split c_lib * split c_m2d and c_m3d_g_aab * split c_m3d_g_cir * split c_m3d_g_cps * split rest of c_m3d_g * split c_m3d * split c_malloc * split c_request * split c_sxyz * split and partly decompile c_xyz * format * c_angle.h * begin c_angle decomp * c_angle * progress adding stub classes for SComponent * more c_m3d * remove some asm and format * more m3d headers * more c_angle decomp * c_lib headers * add public to classes * fix csXyz member names * c_sxyz partly OK * move Zero csXyz to c_sxyz header * c_API_graphic * delete some unused asm * move math extern data, decompile some functions * delete unused asm * fix duplicated c_angle.h * fix an inlined function name, add more inlined functions for c_angle.h (currently unused) * format Co-authored-by: Pheenoh <pheenoh@gmail.com>
26 lines
1.4 KiB
ArmAsm
26 lines
1.4 KiB
ArmAsm
/* 80264368 002612A8 94 21 FF E0 */ stwu r1, -0x20(r1)
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/* 8026436C 002612AC 7C 08 02 A6 */ mflr r0
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/* 80264370 002612B0 90 01 00 24 */ stw r0, 0x24(r1)
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/* 80264374 002612B4 C0 83 00 20 */ lfs f4, 0x20(r3)
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/* 80264378 002612B8 C0 63 00 2C */ lfs f3, 0x2c(r3)
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/* 8026437C 002612BC EC 04 18 28 */ fsubs f0, f4, f3
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/* 80264380 002612C0 D0 01 00 14 */ stfs f0, 0x14(r1)
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/* 80264384 002612C4 C0 43 00 24 */ lfs f2, 0x24(r3)
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/* 80264388 002612C8 D0 41 00 18 */ stfs f2, 0x18(r1)
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/* 8026438C 002612CC C0 23 00 28 */ lfs f1, 0x28(r3)
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/* 80264390 002612D0 EC 01 18 28 */ fsubs f0, f1, f3
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/* 80264394 002612D4 D0 01 00 1C */ stfs f0, 0x1c(r1)
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/* 80264398 002612D8 EC 04 18 2A */ fadds f0, f4, f3
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/* 8026439C 002612DC D0 01 00 08 */ stfs f0, 8(r1)
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/* 802643A0 002612E0 C0 03 00 30 */ lfs f0, 0x30(r3)
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/* 802643A4 002612E4 EC 02 00 2A */ fadds f0, f2, f0
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/* 802643A8 002612E8 D0 01 00 0C */ stfs f0, 0xc(r1)
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/* 802643AC 002612EC EC 01 18 2A */ fadds f0, f1, f3
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/* 802643B0 002612F0 D0 01 00 10 */ stfs f0, 0x10(r1)
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/* 802643B4 002612F4 38 81 00 14 */ addi r4, r1, 0x14
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/* 802643B8 002612F8 38 A1 00 08 */ addi r5, r1, 8
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/* 802643BC 002612FC 48 00 A8 99 */ bl Set__8cM3dGAabFPC4cXyzPC4cXyz
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/* 802643C0 00261300 80 01 00 24 */ lwz r0, 0x24(r1)
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/* 802643C4 00261304 7C 08 03 A6 */ mtlr r0
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/* 802643C8 00261308 38 21 00 20 */ addi r1, r1, 0x20
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/* 802643CC 0026130C 4E 80 00 20 */ blr |