mirror of
https://gitlab.com/kholdfuzion/goldeneye_src
synced 2026-05-31 08:51:45 -04:00
KholdFuzion
70 lines
1.3 KiB
ArmAsm
70 lines
1.3 KiB
ArmAsm
.rsp
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.create CODE_FILE, 0x04001000
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// rspboot microcode by SGI
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// this initalizes the RSP and gets it ready to load the next microcode.
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j rdpcheck
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addi at, zero, 0x0fc0
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ucodeload:
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lw v0, 0x0010(at)
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addi v1, zero, 0x0f7f
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addi a3, zero, 0x1080
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mtc0 a3, SP_MEM_ADDR
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mtc0 v0, SP_DRAM_ADDR
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mtc0 v1, SP_RD_LEN
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ucodeloadloop:
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mfc0 a0, SP_DMA_BUSY
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bne a0, zero, ucodeloadloop
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nop
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jal checkyield
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nop
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jr a3
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mtc0 zero, SP_SEMAPHORE
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checkyield:
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mfc0 t0, SP_STATUS
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andi t0, t0, 0x0080
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bne t0, zero, Yield
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nop
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jr ra
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Yield:
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mtc0 zero, SP_SEMAPHORE
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ori t0, zero, 0x5200
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mtc0 t0, SP_STATUS
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break
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nop
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rdpcheck:
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lw v0, 0x0004(at)
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andi v0, v0, 0x0002
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beq v0, zero, rdpwait
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nop
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jal checkyield
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nop
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mfc0 v0, DPC_STATUS
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andi v0, v0, 0x0100
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bgtz v0, checkyield
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nop
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rdpwait:
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lw v0, 0x0018(at)
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lw v1, 0x001c(at)
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addi v1, v1, -0x0001
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DMEMLoad:
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mfc0 s8, SP_DMA_FULL
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bne s8, zero, DMEMLoad
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nop
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mtc0 zero, SP_MEM_ADDR
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mtc0 v0, SP_DRAM_ADDR
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mtc0 v1, SP_RD_LEN
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dmaloop:
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mfc0 a0, SP_DMA_BUSY
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bne a0, zero, dmaloop
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nop
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jal checkyield
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nop
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j ucodeload
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nop
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nop
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.close // CODE_FILE
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