mirror of
https://github.com/open-goal/jak-project
synced 2026-07-08 14:36:52 -04:00
[decompiler] jak2-style rtype-of, setup gcommon stuff (#1616)
* [decompiler] support jak2-style rtype-of, get gcommon decompiling to use for tests * more decompiler debugging
This commit is contained in:
water111
@@ -1162,6 +1162,15 @@ bool is_set_symbol_value(SetVarOp& op, const std::string& name) {
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op.src().get_arg(0).get_str() == name;
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}
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bool is_set_symbol_value(SetVarElement* op, const std::string& name) {
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auto src = op->src()->try_as_element<SimpleExpressionElement>();
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if (!src) {
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return false;
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}
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return src->expr().is_identity() && src->expr().get_arg(0).is_sym_val() &&
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src->expr().get_arg(0).get_str() == name;
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}
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SetVarOp get_delay_op(const Function& f, const BlockVtx* vtx) {
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auto delay_start = f.ir2.atomic_ops->block_id_to_first_atomic_op.at(vtx->block_id);
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auto delay_end = f.ir2.atomic_ops->block_id_to_end_atomic_op.at(vtx->block_id);
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@@ -1170,14 +1179,290 @@ SetVarOp get_delay_op(const Function& f, const BlockVtx* vtx) {
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}
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auto& delay_op = f.ir2.atomic_ops->ops.at(delay_start);
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auto* delay = dynamic_cast<SetVarOp*>(delay_op.get());
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if (!delay) {
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fmt::print("bad delay: {}\n", delay_op->to_string(f.ir2.env));
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ASSERT(false);
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}
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return *delay;
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}
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LoadVarOp get_delay_load_op(const Function& f, const BlockVtx* vtx) {
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auto delay_start = f.ir2.atomic_ops->block_id_to_first_atomic_op.at(vtx->block_id);
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auto delay_end = f.ir2.atomic_ops->block_id_to_end_atomic_op.at(vtx->block_id);
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if (delay_end - delay_start != 1) {
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ASSERT(false);
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}
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auto& delay_op = f.ir2.atomic_ops->ops.at(delay_start);
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auto* delay = dynamic_cast<LoadVarOp*>(delay_op.get());
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if (!delay) {
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fmt::print("bad delay: {}\n", delay_op->to_string(f.ir2.env));
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ASSERT(false);
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}
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return *delay;
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}
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Form* try_sc_as_type_of_jak2(FormPool& pool, Function& f, const ShortCircuit* vtx) {
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/*
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dsll32 a2, a0, 29 * temp_reg0, src
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dsrl32 a2, a2, 29 * temp_reg0, temp_reg0
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beql a2, r0, L289 branch0
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B1:
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lw a0, binteger(s7)
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B2:
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addiu a3, r0, 4
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beql a2, a3, L289 branch1
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B3:
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lwu a0, -4(a0)
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B4:
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addiu a0, r0, 2
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beql a2, a0, L289 branch2
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B5:
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lw a0, pair(s7)
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B6:
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lw a0, symbol(s7)
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B7:
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L289:
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*/
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if (vtx->entries.size() != 4) {
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return nullptr;
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}
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auto b0_c = dynamic_cast<CfgVtx*>(vtx->entries.at(0).condition);
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auto b0_d = dynamic_cast<BlockVtx*>(vtx->entries.at(0).likely_delay);
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auto b1_c = dynamic_cast<BlockVtx*>(vtx->entries.at(1).condition);
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auto b1_d = dynamic_cast<BlockVtx*>(vtx->entries.at(1).likely_delay);
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auto b2_c = dynamic_cast<BlockVtx*>(vtx->entries.at(2).condition);
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auto b2_d = dynamic_cast<BlockVtx*>(vtx->entries.at(2).likely_delay);
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auto b3_c = dynamic_cast<BlockVtx*>(vtx->entries.at(3).condition);
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if (!b0_c || !b0_d || !b1_c || !b1_d || !b2_c || !b2_d || !b3_c ||
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vtx->entries.at(3).likely_delay) {
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return nullptr;
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}
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// get the branch ir's
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auto b0_ptr = cfg_to_ir(pool, f, b0_c); // should be begin.
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if (b0_ptr->size() <= 2) {
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fmt::print("fail1\n");
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return nullptr;
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}
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auto b1_ptr = cfg_to_ir(pool, f, b1_c);
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if (b1_ptr->size() <= 1) {
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fmt::print("fail2\n");
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return nullptr;
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}
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auto b2_ptr = cfg_to_ir(pool, f, b2_c);
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if (b2_ptr->size() <= 1) {
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fmt::print("fail3\n");
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return nullptr;
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}
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auto b3_ptr = cfg_to_ir(pool, f, b3_c);
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auto b3_ir = dynamic_cast<SetVarElement*>(b3_ptr->try_as_single_element());
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if (!b3_ir) {
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fmt::print("fail4\n");
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return nullptr;
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}
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// identify the left shift
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auto set_shift_left = dynamic_cast<SetVarElement*>(b0_ptr->at(b0_ptr->size() - 3));
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if (!set_shift_left) {
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fmt::print("fail5\n");
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return nullptr;
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}
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auto temp_reg0 = set_shift_left->dst();
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auto shift_left =
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dynamic_cast<SimpleExpressionElement*>(set_shift_left->src()->try_as_single_element());
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if (!shift_left || shift_left->expr().kind() != SimpleExpression::Kind::LEFT_SHIFT) {
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fmt::print("fail6\n");
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return nullptr;
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}
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auto src_reg = shift_left->expr().get_arg(0).var();
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auto sa_left = shift_left->expr().get_arg(1);
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if (!sa_left.is_int() || sa_left.get_int() != 61) {
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fmt::print("fail7\n");
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return nullptr;
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}
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// identify the right shift
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auto set_shift_right = dynamic_cast<SetVarElement*>(b0_ptr->at(b0_ptr->size() - 2));
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if (!set_shift_right) {
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fmt::print("fail8\n");
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return nullptr;
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}
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if (set_shift_right->dst().reg() != set_shift_left->dst().reg()) {
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fmt::print("fail9\n");
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return nullptr;
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}
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auto shift_right =
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dynamic_cast<SimpleExpressionElement*>(set_shift_right->src()->try_as_single_element());
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if (!shift_right || shift_right->expr().kind() != SimpleExpression::Kind::RIGHT_SHIFT_LOGIC) {
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fmt::print("fail10\n");
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return nullptr;
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}
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if (temp_reg0.reg() != shift_right->expr().get_arg(0).var().reg()) {
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fmt::print("fail11\n");
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return nullptr;
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}
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auto sa_right = shift_right->expr().get_arg(1);
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if (!sa_right.is_int() || sa_right.get_int() != 61) {
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fmt::print("fail12\n");
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return nullptr;
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}
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// branch 0
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auto first_branch = dynamic_cast<BranchElement*>(b0_ptr->back());
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auto b0_delay_op = get_delay_op(f, b0_d);
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if (!first_branch || !is_set_symbol_value(b0_delay_op, "binteger") ||
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first_branch->op()->condition().kind() != IR2_Condition::Kind::ZERO ||
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!first_branch->op()->likely()) {
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fmt::print("fail13\n");
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return nullptr;
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}
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auto temp_reg = first_branch->op()->condition().src(0).var();
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ASSERT(temp_reg.reg() == temp_reg0.reg());
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auto dst_reg = b0_delay_op.dst();
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// branch 1
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if (b1_ptr->size() != 2) {
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fmt::print("fail14\n");
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return nullptr;
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}
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auto second_branch_pre_op = dynamic_cast<SetVarElement*>(b1_ptr->at(0));
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if (!second_branch_pre_op) {
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fmt::print("fail15\n");
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return nullptr;
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}
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{
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auto pos = second_branch_pre_op->src();
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auto pos_as_se = pos->try_as_element<SimpleExpressionElement>();
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if (!pos_as_se || !pos_as_se->expr().is_identity() || !pos_as_se->expr().get_arg(0).is_int(4)) {
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fmt::print("fail16\n");
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return nullptr;
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}
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}
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auto temp_reg1 = second_branch_pre_op->dst();
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auto second_branch = dynamic_cast<BranchElement*>(b1_ptr->at(1));
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/*
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beql a2, a3, L289 branch1
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B3:
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lwu a0, -4(a0)
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*/
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if (!second_branch || second_branch->op()->condition().kind() != IR2_Condition::Kind::EQUAL ||
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!second_branch->op()->likely() || !second_branch->op()->condition().src(0).is_var() ||
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second_branch->op()->condition().src(0).var().reg() != temp_reg0.reg() ||
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!second_branch->op()->condition().src(1).is_var() ||
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second_branch->op()->condition().src(1).var().reg() != temp_reg1.reg()) {
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fmt::print("fail17\n");
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return nullptr;
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}
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if (!b1_d) {
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fmt::print("fail18\n");
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return nullptr;
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}
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auto b1_delay_op = get_delay_load_op(f, b1_d);
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if (b1_delay_op.kind() != LoadVarOp::Kind::UNSIGNED || b1_delay_op.size() != 4) {
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fmt::print("fail19\n");
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return nullptr;
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}
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IR2_RegOffset ro;
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if (!get_as_reg_offset(b1_delay_op.src(), &ro)) {
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fmt::print("fail20\n");
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return nullptr;
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}
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if (ro.offset != -4) {
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fmt::print("fail21\n");
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return nullptr;
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}
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if (ro.reg != src_reg.reg() || b1_delay_op.get_set_destination().reg() != dst_reg.reg()) {
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fmt::print("fail22\n");
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return nullptr;
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}
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/////////////////////////////////
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// branch2
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/*
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* B4:
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addiu a0, r0, 2
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beql a2, a0, L289 branch2
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B5:
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lw a0, pair(s7)
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*/
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if (b2_ptr->size() != 2) {
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fmt::print("fail23\n");
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return nullptr;
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}
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auto third_branch_pre_op = dynamic_cast<SetVarElement*>(b2_ptr->at(0));
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if (!third_branch_pre_op) {
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fmt::print("fail24\n");
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return nullptr;
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}
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{
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auto pos = third_branch_pre_op->src();
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auto pos_as_se = pos->try_as_element<SimpleExpressionElement>();
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if (!pos_as_se || !pos_as_se->expr().is_identity() || !pos_as_se->expr().get_arg(0).is_int(2)) {
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fmt::print("fail25\n");
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return nullptr;
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}
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}
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auto temp_reg2 = third_branch_pre_op->dst();
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auto third_branch = dynamic_cast<BranchElement*>(b2_ptr->at(1));
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if (!third_branch || third_branch->op()->condition().kind() != IR2_Condition::Kind::EQUAL ||
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!third_branch->op()->likely() || !third_branch->op()->condition().src(0).is_var() ||
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third_branch->op()->condition().src(0).var().reg() != temp_reg0.reg() ||
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!third_branch->op()->condition().src(1).is_var() ||
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third_branch->op()->condition().src(1).var().reg() != temp_reg2.reg()) {
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fmt::print("fail26\n");
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return nullptr;
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}
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if (!b2_d) {
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fmt::print("fail27\n");
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return nullptr;
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}
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auto b2_delay_op = get_delay_op(f, b2_d);
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if (!is_set_symbol_value(b2_delay_op, "pair") || b2_delay_op.dst().reg() != dst_reg.reg()) {
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fmt::print("fail28\n");
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return nullptr;
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}
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if (!is_set_symbol_value(b3_ir, "symbol")) {
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fmt::print("fail29\n");
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return nullptr;
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}
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// we passed, time to clean things up...
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// remove the stuff from the back of block 0.
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b0_ptr->pop_back();
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b0_ptr->pop_back();
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b0_ptr->pop_back();
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auto obj = pool.alloc_single_element_form<SimpleExpressionElement>(
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nullptr, shift_left->expr().get_arg(0).as_expr(), set_shift_right->dst().idx());
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auto type_op = pool.alloc_single_element_form<TypeOfElement>(nullptr, obj);
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auto op = pool.alloc_element<SetVarElement>(dst_reg, type_op, true, TypeSpec("type"));
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b0_ptr->push_back(op);
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// if (b1_delay_op.src().)
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f.ir2.env.disable_def(b0_delay_op.dst(), f.warnings);
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f.ir2.env.disable_def(b1_delay_op.get_set_destination(), f.warnings);
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f.ir2.env.disable_def(b2_delay_op.dst(), f.warnings);
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f.ir2.env.disable_use(shift_left->expr().get_arg(0).var());
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f.warnings.general_warning("Using new Jak 2 rtype-of");
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return b0_ptr;
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}
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/*!
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* Try to convert a short circuiting expression into a "type-of" expression.
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* We do this before attempting the normal and/or expressions.
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*/
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Form* try_sc_as_type_of(FormPool& pool, Function& f, const ShortCircuit* vtx) {
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Form* try_sc_as_type_of_jak1(FormPool& pool, Function& f, const ShortCircuit* vtx) {
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// the assembly looks like this:
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/*
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dsll32 v1, a0, 29 ;; (set! v1 (shl a0 61))
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@@ -1285,11 +1570,6 @@ Form* try_sc_as_type_of(FormPool& pool, Function& f, const ShortCircuit* vtx) {
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ASSERT(src_reg3.var().reg() == src_reg.reg());
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ASSERT(offset.get_int() == -4);
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std::optional<RegisterAccess> clobber;
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if (temp_reg.reg() != dst_reg.reg()) {
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clobber = first_branch->op()->condition().src(0).var();
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}
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// remove the branch
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b0_ptr->pop_back();
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// remove the shift
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@@ -1298,7 +1578,7 @@ Form* try_sc_as_type_of(FormPool& pool, Function& f, const ShortCircuit* vtx) {
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// add the type-of
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auto obj = pool.alloc_single_element_form<SimpleExpressionElement>(
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nullptr, shift->expr().get_arg(0).as_expr(), set_shift->dst().idx());
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auto type_op = pool.alloc_single_element_form<TypeOfElement>(nullptr, obj, clobber);
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auto type_op = pool.alloc_single_element_form<TypeOfElement>(nullptr, obj);
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auto op = pool.alloc_element<SetVarElement>(else_case->dst(), type_op, true, TypeSpec("type"));
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b0_ptr->push_back(op);
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@@ -1310,6 +1590,18 @@ Form* try_sc_as_type_of(FormPool& pool, Function& f, const ShortCircuit* vtx) {
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return b0_ptr;
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}
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Form* try_sc_as_type_of(FormPool& pool, Function& f, const ShortCircuit* vtx, GameVersion version) {
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switch (version) {
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case GameVersion::Jak1:
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return try_sc_as_type_of_jak1(pool, f, vtx);
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case GameVersion::Jak2:
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return try_sc_as_type_of_jak2(pool, f, vtx);
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default:
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ASSERT(false);
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return nullptr;
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}
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}
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Form* merge_cond_else_with_sc_cond(FormPool& pool,
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Function& f,
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const CondWithElse* cwe,
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@@ -1574,7 +1866,7 @@ Form* cfg_to_ir_helper(FormPool& pool, Function& f, const CfgVtx* vtx) {
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} else if (dynamic_cast<const ShortCircuit*>(vtx)) {
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auto* svtx = dynamic_cast<const ShortCircuit*>(vtx);
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// try as a type of expression first
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auto as_type_of = try_sc_as_type_of(pool, f, svtx);
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auto as_type_of = try_sc_as_type_of(pool, f, svtx, f.ir2.env.version);
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if (as_type_of) {
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return as_type_of;
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}
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