All that remains (8 instructions) are division, and NEON instructions
that require me to convert the x86 control byte to NEON `TBL` values.
Those handful of instructions can be done later while doing the next
steps (finally something more interesting than just encoding
instructions).
Less than 100 instructions left to implement, with the vast vast
majority being load-and-stores. These will likely be knocked out quickly
but they require a more involved implementation than just simply
translating the instructions (several need multiple instructions, others
may need reserved registers (x16 or x17 are common for this purpose))
This is a good milestone to get something pushed to master.
This PR does the following:
- Designs a mechanism by which arm64 instructions can be encoded and
emitted
- Dispatch our higher-level instruction emitting calls to either x86 or
arm64 instructions depending on what the compiler is set to (defaults to
x86)
- Bare minimum scaffolding to get the arm64 instructions successfully
executing atleast on apple silicon
- Implement enough instructions to get the codetester test suite passing
on arm
- decompile `subdivide`, `wind-work`, `tie-work`, `bsp`, `focus`
- support `ppacb` in compiler
- don't assert when bitfield stuff fails due to constant propgataion
weirdness
- finish up history
- div/mod unsigned assert fix in decompiler
- empty assert fix in decompiler for failed `add` type prop
- make jak 1 performance counters "work" (just measure time)
- fix cast/typos on pcgtb/vftoi15
* clean up
* before int to float stuff
* before trying to eliminate the separate read and write maps
* partial fix for register issues
* add missing include
* compiler: Support the majority of the remaining VU VF instructions
- VWAIT
- VMADD variants
- VMSUB variants
- VSQRT
- VDIV
- outer product (VOPMULA + VOPMSUB)
* compiler: Fix some bugs / optimize some instructions
* tests/compiler: Add test coverage for new instructions
* docs: Add documentation for new inline assembly functions
* lint: Formatting / fix failing test
* Remove my comment about ftf/fsf encoding, it's been fixed
* address review feedback
* correct VSQRTPS implementation
* begin work on vf support
* split reg kind into reg hw kind and class, use class for ireg
* try test
* clang format
* add some more ops and some example functions
* better lvf on statics
* add documentation
Tyler Wilding