mirror of
https://github.com/open-goal/jak-project
synced 2026-09-12 12:55:22 -04:00
Tyler Wilding
bfc4c18ada
- Adds `capstone` as a disassembling library that could eventually replace Zydis (for now left that alone) - Replicates all of the existing x86 tests to ARM64, fixed a bunch of underlying issues along the way - There are a very small handful of tests remaining that need to be enabled / fixed
146 lines
3.6 KiB
YAML
Vendored
Generated
146 lines
3.6 KiB
YAML
Vendored
Generated
test_cases:
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-
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input:
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bytes: [ 0x02, 0x00, 0xbb, 0x27, 0x50, 0x7a, 0xbd, 0x23, 0xd0, 0xff, 0xde, 0x23, 0x00, 0x00, 0x5e, 0xb7 ]
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arch: "alpha"
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options: [ CS_OPT_DETAIL ]
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address: 0x0
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expected:
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insns:
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-
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asm_text: "ldah $29,2($27)"
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details:
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regs_read: [ $27 ]
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regs_write: [ $28, $29 ]
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alpha:
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operands:
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-
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type: ALPHA_OP_REG
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reg: $29
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-
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type: ALPHA_OP_IMM
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imm: 0x2
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-
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type: ALPHA_OP_REG
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reg: $27
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-
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asm_text: "lda $29,0x7a50($29)"
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details:
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regs_read: [ $29 ]
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regs_write: [ $28, $29 ]
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alpha:
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operands:
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-
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type: ALPHA_OP_REG
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reg: $29
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-
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type: ALPHA_OP_IMM
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imm: 0x7a50
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-
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type: ALPHA_OP_REG
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reg: $29
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-
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asm_text: "lda $30,0xffd0($30)"
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details:
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regs_read: [ $30 ]
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regs_write: [ $28, $30 ]
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alpha:
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operands:
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-
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type: ALPHA_OP_REG
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reg: $30
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-
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type: ALPHA_OP_IMM
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imm: 0xffd0
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-
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type: ALPHA_OP_REG
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reg: $30
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-
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asm_text: "stq $26,0($30)"
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details:
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regs_read: [ $26, $30 ]
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regs_write: [ $28 ]
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alpha:
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operands:
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-
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type: ALPHA_OP_REG
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reg: $26
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-
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type: ALPHA_OP_IMM
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imm: 0x0
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-
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type: ALPHA_OP_REG
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reg: $30
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-
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input:
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bytes: [ 0x27, 0xbb, 0x00, 0x02, 0x23, 0xbd, 0x7a, 0x50, 0x23, 0xde, 0xff, 0xd0, 0xb7, 0x5e, 0x00, 0x00 ]
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arch: "alpha"
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options: [ CS_MODE_BIG_ENDIAN, CS_OPT_DETAIL ]
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address: 0x0
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expected:
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insns:
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-
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asm_text: "ldah $29,2($27)"
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details:
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regs_read: [ $27 ]
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regs_write: [ $28, $29 ]
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alpha:
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operands:
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-
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type: ALPHA_OP_REG
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reg: $29
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-
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type: ALPHA_OP_IMM
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imm: 0x2
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-
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type: ALPHA_OP_REG
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reg: $27
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-
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asm_text: "lda $29,0x7a50($29)"
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details:
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regs_read: [ $29 ]
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regs_write: [ $28, $29 ]
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alpha:
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operands:
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-
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type: ALPHA_OP_REG
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reg: $29
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-
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type: ALPHA_OP_IMM
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imm: 0x7a50
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-
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type: ALPHA_OP_REG
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reg: $29
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-
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asm_text: "lda $30,0xffd0($30)"
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details:
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regs_read: [ $30 ]
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regs_write: [ $28, $30 ]
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alpha:
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operands:
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-
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type: ALPHA_OP_REG
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reg: $30
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-
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type: ALPHA_OP_IMM
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imm: 0xffd0
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-
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type: ALPHA_OP_REG
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reg: $30
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-
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asm_text: "stq $26,0($30)"
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details:
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regs_read: [ $26, $30 ]
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regs_write: [ $28 ]
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alpha:
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operands:
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-
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type: ALPHA_OP_REG
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reg: $26
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-
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type: ALPHA_OP_IMM
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imm: 0x0
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-
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type: ALPHA_OP_REG
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reg: $30
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