mirror of
https://github.com/open-goal/jak-project
synced 2026-06-09 20:50:55 -04:00
Tyler Wilding
c162c66118
This PR does two main things: 1. Work through the main low-hanging fruit issues in the formatter keeping it from feeling mature and usable 2. Iterate and prove that point by formatting all of the Jak 1 code base. **This has removed around 100K lines in total.** - The decompiler will now format it's results for jak 1 to keep things from drifting back to where they were. This is controlled by a new config flag `format_code`. How am I confident this hasn't broken anything?: - I compiled the entire project and stored it's `out/jak1/obj` files separately - I then recompiled the project after formatting and wrote a script that md5's each file and compares it (`compare-compilation-outputs.py` - The results (eventually) were the same:  > This proves that the only difference before and after is non-critical whitespace for all code/macros that is actually in use. I'm still aware of improvements that could be made to the formatter, as well as general optimization of it's performance. But in general these are for rare or non-critical situations in my opinion and I'll work through them before doing Jak 2. The vast majority looks great and is working properly at this point. Those known issues are the following if you are curious: 
136 lines
4.7 KiB
Common Lisp
136 lines
4.7 KiB
Common Lisp
;;-*-Lisp-*-
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(in-package goal)
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(bundles "ENGINE.CGO" "GAME.CGO")
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(require "kernel-defs.gc")
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;; There are two sources for timing:
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;; - EE TIMER1, used for the frame profiler. There are 9765 counts of this per frame. It gets reset in drawable.
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;; - The "stopwatch" system, used for reading the CPU clock cycle counter, at 300 MHz (32-bit)
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;; The Emotion Engine has 4 hardware timers, timer1 is used as the
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(defconstant TIMER0_BANK #x10000000) ;; has HOLD register!
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(defconstant TIMER1_BANK #x10000800) ;; has HOLD register!
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(defconstant TIMER2_BANK #x10001000) ;; does NOT have HOLD register!
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(defconstant TIMER3_BANK #x10001800) ;; does NOT have HOLD register!
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; PC Port Timer
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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(defmacro get-cpu-clock ()
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"Read the 300 MHz clock."
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;; __read-ee-timer is a 300 MHz timer from the C Kernel.
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;; it's a real timer.
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`(the uint (logand #xffffffff (__read-ee-timer))))
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(defmacro get-bus-clock/256 ()
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"Read the 150 MHz / 256 clock."
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;; 300 MHz / (2^9)
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`(the uint (logand #xffffffff (shr (__read-ee-timer) 9))))
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(#when PC_PORT
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;; the bus clock can be reset, which just stores the current count here.
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(define *timer-reset-value* (the uint 0)))
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; Timer HW
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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(defenum timer-clock-selection
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:type uint8
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(busclk 0)
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(busclk/16 1)
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(busclk/256 2)
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(hblank 3))
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;; DECOMP BEGINS
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;; this matches the Tn_MODE register structure of the ps2 EE timers.
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;; Only the lower 32 bits of these registers are usable, and the upper 16 hardwired to zero
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(deftype timer-mode (uint32)
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((clks timer-clock-selection :offset 0 :size 2)
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(gate uint8 :offset 2 :size 1)
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(gats uint8 :offset 3 :size 1)
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(gatm uint8 :offset 4 :size 2)
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(zret uint8 :offset 6 :size 1)
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(cue uint8 :offset 7 :size 1)
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(cmpe uint8 :offset 8 :size 1)
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(ovfe uint8 :offset 9 :size 1)
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(equf uint8 :offset 10 :size 1)
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(ovff uint8 :offset 11 :size 1)))
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;; this matches an EE timer (without a HOLD register, timers 2 and 3)
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;; Each register is 128-bits wide, but only the lower 32-bits are usable, and the upper
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;; 16-bits of that are hardwired to zero.
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(deftype timer-bank (structure)
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((count uint32 :offset 0)
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(mode timer-mode :offset 16)
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(comp uint32 :offset 32)))
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;; this matches an EE timer (with a HOLD register, timers 0 and 1)
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(deftype timer-hold-bank (timer-bank)
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((hold uint32 :offset 48)))
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;; stopwatches are used to measure CPU clock cycles
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;; they don't use the timer above, but instead the Count COP0 register
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;; which counts CPU clock cycles directly
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(deftype stopwatch (basic)
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((prev-time-elapsed time-frame)
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(start-time time-frame)
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(begin-level int32)))
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;; Confusing! What IS this measuring exactly? Hmm...
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;; this is set by default for NTSC, it will later be changed if PAL.
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(define *ticks-per-frame* (/ 2500000 256)) ;; 2 500 000 / 256 = 9765
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(defun timer-init ((timer timer-bank) (mode timer-mode))
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"Initiate a timer, start counting at a rate of 1 every 256 bus clocks (BUSCLK: ~147.456MHz)."
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(set! (-> timer mode) mode)
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(set! (-> timer count) 0))
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;; needs PS2 TIMER porting
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(#unless PC_PORT
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(timer-init (the-as timer-bank TIMER1_BANK) (new 'static 'timer-mode :clks (timer-clock-selection busclk/16) :cue 1)))
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; Profiler
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; The profiler uses the EE Timer 1 to record how long is spent in each part of the frame.
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;; There is a EE and VU1 profiler. The EE profiler relies on code manually reporting how long
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;; it takes to run, and the VU1 profiler uses VIF interrupts to do this automatically on
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;; microprogram completion.
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;; A single thing in the profiler
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(deftype profile-frame (structure)
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((name symbol)
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(time-stamp uint32)
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(color rgba)))
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;; A "bar" to display all the timed events
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(declare-type dma-buffer basic)
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(deftype profile-bar (basic)
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((profile-frame-count int32)
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(cache-time time-frame)
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(data profile-frame 1024 :inline))
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(:methods
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(new (symbol type) _type_)
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(get-last-frame-time-stamp (_type_) uint)
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(reset (_type_) _type_)
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(add-frame (_type_ symbol rgba) profile-frame)
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(add-end-frame (_type_ symbol rgba) profile-frame)
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(draw (_type_ dma-buffer int) float)))
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(defmacro add-ee-profile-frame (name &key (r 0) &key (g 0) &key (b 0) &key (a #x80))
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`(if *debug-segment*
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(add-frame (-> *display* frames (-> *display* on-screen) frame profile-bar 0)
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,name
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(new 'static 'rgba :r ,r :g ,g :b ,b :a ,a))))
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;; tentative name
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(defmethod get-last-frame-time-stamp ((this profile-bar))
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"Returns the timestamp of the last (non-remaining) frame on the profiler bar."
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(-> this data (+ (-> this profile-frame-count) -2) time-stamp))
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