mirror of
https://github.com/open-goal/jak-project
synced 2026-09-12 12:55:22 -04:00
water
747 lines
18 KiB
C++
747 lines
18 KiB
C++
/*!
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* @file IGen.h
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* Instruction Generation for x86-64
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* Generate Instruction objects
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*/
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#ifndef JAK_IGEN_H
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#define JAK_IGEN_H
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#include <cstdint>
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#include "Instruction.h"
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class IGen {
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public:
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//;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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// MOVES
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//;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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/*!
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* mov gpr, gpr, 64 bits
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*/
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static Instruction mov_gpr64_gpr64(uint8_t dst, uint8_t src) {
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Instruction instr(0x89);
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instr.set_modrm_and_rex(src, dst, 3, true);
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return instr;
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}
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/*!
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* Move a 64-bit constant into a register.
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*/
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static Instruction mov_gpr64_u64(uint8_t dst, uint64_t val) {
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bool rex_b = false;
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if (dst >= 8) {
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dst -= 8;
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rex_b = true;
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}
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if (dst < 8) {
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Instruction instr(0xb8 + dst);
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instr.set(REX(true, false, false, rex_b));
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instr.set(Imm(8, val));
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return instr;
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} else {
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throw std::runtime_error("bad instruction mov_gpr64_u64");
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}
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}
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/*!
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* Move a 32-bit constant into a register.
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*/
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static Instruction mov_gpr64_u32(uint8_t dst, uint64_t val) {
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assert(val <= UINT32_MAX);
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bool rex_b = false;
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if (dst >= 8) {
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dst -= 8;
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rex_b = true;
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}
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if (dst < 8) {
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Instruction instr(0xb8 + dst);
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if (rex_b) {
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instr.set(REX(false, false, false, rex_b));
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}
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instr.set(Imm(4, val));
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return instr;
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} else {
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throw std::runtime_error("bad instruction mov_gpr64_u32");
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}
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}
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/*!
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* Move a signed 32-bit constant into a register.
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* When possible prefer mov_gpr64_u32. (use this only for negative values...)
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*/
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static Instruction mov_gpr64_s32(uint8_t dst, int64_t val) {
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assert(val >= INT32_MIN && val <= INT32_MAX);
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Instruction instr(0xc7);
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instr.set_modrm_and_rex(0, dst, 3, true);
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instr.set(Imm(4, val));
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return instr;
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}
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/*!
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* Move 32-bits of xmm to 32 bits of gpr (no sign extension).
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*/
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static Instruction movd_gpr32_xmm32(uint8_t dst, uint8_t src) {
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Instruction instr(0x66);
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instr.set_op2(0x0f);
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instr.set_op3(0x7e);
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instr.set_modrm_and_rex(src, dst, 3, false);
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instr.swap_op0_rex();
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return instr;
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}
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/*!
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* Move 32-bits of gpr to 32-bits of xmm (no sign extenion)
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*/
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static Instruction movd_xmm32_gpr32(uint8_t dst, uint8_t src) {
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Instruction instr(0x66);
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instr.set_op2(0x0f);
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instr.set_op3(0x6e);
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instr.set_modrm_and_rex(dst, src, 3, false);
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instr.swap_op0_rex();
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return instr;
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}
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/*!
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* Move 32-bits between xmm's
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*/
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static Instruction mov_xmm32_xmm32(uint8_t dst, uint8_t src) {
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Instruction instr(0xf3);
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instr.set_op2(0x0f);
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instr.set_op3(0x10);
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instr.set_modrm_and_rex(dst, src, 3, false);
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return instr;
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}
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//;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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// LOADS n' STORES
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//;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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/*!
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* Store 8-bits from register into a memory location that is the sum of a 64-bit register
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* and signed 32-bit offset.
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*/
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static Instruction store8_r64off32s_gpr8(uint8_t dst_reg, int32_t offset, uint8_t src_reg) {
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Instruction instr(0x88);
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instr.set_modrm_and_rex_for_addr(src_reg, dst_reg, 2, false);
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instr.set_disp(Imm(4, offset));
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if (src_reg > RBX) {
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instr.add_rex();
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}
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return instr;
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}
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/*!
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* Store 16-bits from register into a memory location that is the sum of a 64-bit register
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* and signed 32-bit offset.
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*/
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static Instruction store16_r64off32s_gpr16(uint8_t dst_reg, int32_t offset, uint8_t src_reg) {
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Instruction instr(0x66);
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instr.set_op2(0x89);
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instr.set_modrm_and_rex_for_addr(src_reg, dst_reg, 2, false);
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instr.set_disp(Imm(4, offset));
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return instr;
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}
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/*!
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* Store 32-bits from register into a memory location that is the sum of a 64-bit register
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* and signed 32-bit offset.
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*/
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static Instruction store32_r64off32s_gpr32(uint8_t dst_reg, int32_t offset, uint8_t src_reg) {
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Instruction instr(0x89);
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instr.set_modrm_and_rex_for_addr(src_reg, dst_reg, 2, false);
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instr.set_disp(Imm(4, offset));
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return instr;
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}
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/*!
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* Store 64-bits from gpr into memory located at 64-bit reg + 32-bit signed offset.
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*/
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static Instruction store64_r64off32s_gpr64(uint8_t dst_reg, int32_t offset, uint8_t src_reg) {
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Instruction instr(0x89);
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instr.set_modrm_rex_sib_for_reg_reg_disp32(src_reg, 2, dst_reg, true);
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instr.set_disp(Imm(4, offset));
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return instr;
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}
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/*!
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* Load 8-bits from memory (at address of 64-bit reg + 32-bit signed offset) into gpr (zero
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* extended)
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*/
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static Instruction load16_gpr8z_r64off32s(uint8_t dst, uint8_t src, int32_t offset) {
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Instruction instr(0x0f);
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instr.set_op2(0xb6);
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instr.set_modrm_rex_sib_for_reg_reg_disp32(dst, 2, src, true);
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instr.set_disp(Imm(4, offset));
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return instr;
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}
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/*!
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* Load 16-bits from memory (at address of 64-bit reg + 32-bit signed offset) into gpr (zero
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* extended)
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*/
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static Instruction load16_gpr16z_r64off32s(uint8_t dst, uint8_t src, int32_t offset) {
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Instruction instr(0x0f);
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instr.set_op2(0xb7);
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instr.set_modrm_rex_sib_for_reg_reg_disp32(dst, 2, src, true);
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instr.set_disp(Imm(4, offset));
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return instr;
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}
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/*!
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* Load 16-bits from memory (at address of 64-bit reg + 32-bit signed offset) into gpr (sign
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* extended)
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*/
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static Instruction load16_gpr16s_r64off32s(uint8_t dst, uint8_t src, int32_t offset) {
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Instruction instr(0x0f);
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instr.set_op2(0xbf);
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instr.set_modrm_rex_sib_for_reg_reg_disp32(dst, 2, src, true);
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instr.set_disp(Imm(4, offset));
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return instr;
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}
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/*!
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* Load 32-bits from memory (at address of 64-bit reg + 32-bit signed offset) into gpr.
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* Use the sext flag to enable sign extension.
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*/
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static Instruction load32_gpr32sz_r64off32s(uint8_t dst_reg,
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int32_t offset,
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uint8_t src_reg,
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bool sext = false) {
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Instruction instr(0x8b);
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if (sext) {
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instr.op = 0x63;
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}
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instr.set_modrm_rex_sib_for_reg_reg_disp32(dst_reg, 2, src_reg, sext);
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instr.set_disp(Imm(4, offset));
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return instr;
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}
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/*!
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* Load 64-bits from memory located at 64-bit reg + 32-bit signed offset into gpr
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*/
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static Instruction load64_gpr64_r64off32s(uint8_t dst_reg, int32_t offset, uint8_t src_reg) {
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Instruction instr(0x8b);
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instr.set_modrm_rex_sib_for_reg_reg_disp32(dst_reg, 2, src_reg, true);
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instr.set_disp(Imm(4, offset));
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return instr;
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}
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/*!
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* Load 32-bits form memory located at 64-bit reg + 32-bit signed offset into xmm (32-bits)
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* movss
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*/
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static Instruction load32_xmm32_r64off32s(uint8_t dst, uint8_t src, int32_t offset) {
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Instruction instr(0xf3);
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instr.set_op2(0x0f);
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instr.set_op3(0x10);
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instr.set_modrm_rex_sib_for_reg_reg_disp32(dst, 2, src, false);
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instr.set_disp(Imm(4, offset));
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instr.swap_op0_rex();
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return instr;
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}
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//;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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// FUNCTION STUFF
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//;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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/*!
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* Return instruction
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*/
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static Instruction ret() { return Instruction(0xc3); }
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/*!
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* Instruction to push gpr (64-bits) onto the stack
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*/
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static Instruction push_gpr64(uint8_t reg) {
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if (reg >= 8) {
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auto i = Instruction(0x50 + reg - 8);
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i.set(REX(false, false, false, true));
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return i;
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}
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return Instruction(0x50 + reg);
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}
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/*!
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* Instruction to pop 64 bit gpr from the stack
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*/
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static Instruction pop_gpr64(uint8_t reg) {
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if (reg >= 8) {
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auto i = Instruction(0x58 + reg - 8);
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i.set(REX(false, false, false, true));
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return i;
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}
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return Instruction(0x58 + reg);
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}
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/*!
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* Call a function stored in a 64-bit gpr
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*/
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static Instruction call_r64(uint8_t reg) {
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Instruction instr(0xff);
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if (reg >= 8) {
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instr.set(REX(false, false, false, true));
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reg -= 8;
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}
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assert(reg < 8);
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ModRM mrm;
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mrm.rm = reg;
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mrm.reg_op = 2;
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mrm.mod = 3;
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instr.set(mrm);
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return instr;
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}
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/*!
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* Call a function stored in a 64-bit gpr
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*/
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static Instruction jmp_r64(uint8_t reg) {
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Instruction instr(0xff);
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if (reg >= 8) {
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instr.set(REX(false, false, false, true));
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reg -= 8;
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}
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assert(reg < 8);
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ModRM mrm;
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mrm.rm = reg;
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mrm.reg_op = 4;
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mrm.mod = 3;
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instr.set(mrm);
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return instr;
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}
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//;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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// INTEGER MATH
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//;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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/*!
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* Add 64-bit registers.
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*/
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static Instruction add_gpr64_gpr64(uint8_t dst, uint8_t src) {
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Instruction instr(0x01);
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instr.set_modrm_and_rex(src, dst, 3, true);
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return instr;
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}
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/*!
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* Add a signed 32 bit immediate to a 64 bit register
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* TODO: determine if we can decrease to imm16?
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*/
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static Instruction add_gpr64_imm32s(uint8_t dst, int32_t offset) {
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Instruction instr(0x81);
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instr.set_modrm_and_rex(0, dst, 3, true);
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instr.set(Imm(4, offset));
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return instr;
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}
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/*!
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* Add a signed 32 bit immediate to a 64 bit register
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* TODO: determine if we can decrease to imm16?
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*/
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static Instruction add_gpr64_imm8s(uint8_t dst, int8_t v) {
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Instruction instr(0x83);
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instr.set_modrm_and_rex(0, dst, 3, true);
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instr.set(Imm(1, v));
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return instr;
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}
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/*!
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* Subtract 64-bit registers
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*/
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static Instruction sub_gpr64_gpr64(uint8_t dst, uint8_t src) {
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Instruction instr(0x29);
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instr.set_modrm_and_rex(src, dst, 3, true);
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return instr;
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}
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/*!
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* Multiply gprs (32-bit, signed).
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*/
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static Instruction imul_gpr32_gpr32(uint8_t dst, uint8_t src) {
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Instruction instr(0xf);
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instr.set_op2(0xaf);
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instr.set_modrm_and_rex(dst, src, 3, false);
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return instr;
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}
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/*!
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* Divide (idiv, 32 bit)
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*/
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static Instruction idiv_gpr32(uint8_t reg) {
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Instruction instr(0xf7);
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instr.set_modrm_and_rex(7, reg, 3, false);
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return instr;
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}
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/*!
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* Convert doubleword to quadword for division.
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* Blame Intel for this disaster.
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*/
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static Instruction cdq() {
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Instruction instr(0x99);
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return instr;
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}
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/*!
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* Move from gpr32 to gpr64, with sign extension.
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* Needed for division madness.
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*/
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static Instruction movsx_r64_r32(uint8_t dst, uint8_t src) {
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Instruction instr(0x63);
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instr.set_modrm_and_rex(dst, src, 3, true);
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return instr;
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}
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/*!
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* Compare gpr64. This sets the flags for the jumps.
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*/
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static Instruction cmp_gpr64_gpr64(uint8_t a, uint8_t b) {
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Instruction instr(0x3b);
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instr.set_modrm_and_rex(a, b, 3, true);
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return instr;
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}
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//;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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// BIT STUFF
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//;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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/*!
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* Or of two gprs
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*/
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static Instruction or_gpr64_gpr64(uint8_t dst, uint8_t src) {
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Instruction instr(0x0b);
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instr.set_modrm_and_rex(dst, src, 3, true);
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return instr;
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}
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/*!
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* And of two gprs
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*/
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static Instruction and_gpr64_gpr64(uint8_t dst, uint8_t src) {
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Instruction instr(0x23);
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instr.set_modrm_and_rex(dst, src, 3, true);
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return instr;
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}
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/*!
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* Xor of two gprs
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*/
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static Instruction xor_gpr64_gpr64(uint8_t dst, uint8_t src) {
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Instruction instr(0x33);
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instr.set_modrm_and_rex(dst, src, 3, true);
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return instr;
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}
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/*!
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* This is the way "real" compilers zero registers, so we should do it too.
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*/
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static Instruction xor_zero_gpr(uint8_t reg) {
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Instruction instr(0x31);
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instr.set_modrm_and_rex(reg, reg, 3, false);
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return instr;
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}
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/*!
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* Bitwise not a gpr
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*/
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static Instruction not_gpr64(uint8_t reg) {
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Instruction instr(0xf7);
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instr.set_modrm_and_rex(2, reg, 3, true);
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return instr;
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}
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/*!
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* Shift 64-bit gpr left by CL register
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*/
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static Instruction shl_gpr64_cl(uint8_t reg) {
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Instruction instr(0xd3);
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instr.set_modrm_and_rex(4, reg, 3, true);
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return instr;
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}
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/*!
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* Shift 64-bit gpr right (logical) by CL register
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*/
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static Instruction shr_gpr64_cl(uint8_t reg) {
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Instruction instr(0xd3);
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instr.set_modrm_and_rex(5, reg, 3, true);
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return instr;
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}
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/*!
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* Shift 64-bit gpr right (arithmetic) by CL register
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*/
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static Instruction sar_gpr64_cl(uint8_t reg) {
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Instruction instr(0xd3);
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instr.set_modrm_and_rex(7, reg, 3, true);
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return instr;
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}
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/*!
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* Shift 64-ptr left (logical) by the constant shift amount "sa".
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*/
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static Instruction shl_gpr64_u8(uint8_t reg, uint8_t sa) {
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Instruction instr(0xc1);
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instr.set_modrm_and_rex(4, reg, 3, true);
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instr.set(Imm(1, sa));
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return instr;
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}
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/*!
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* Shift 64-ptr right (logical) by the constant shift amount "sa".
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*/
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static Instruction shr_gpr64_u8(uint8_t reg, uint8_t sa) {
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Instruction instr(0xc1);
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instr.set_modrm_and_rex(5, reg, 3, true);
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instr.set(Imm(1, sa));
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return instr;
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}
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/*!
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* Shift 64-ptr right (arithmetic) by the constant shift amount "sa".
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*/
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static Instruction sar_gpr64_u8(uint8_t reg, uint8_t sa) {
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Instruction instr(0xc1);
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instr.set_modrm_and_rex(7, reg, 3, true);
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instr.set(Imm(1, sa));
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return instr;
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}
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//;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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// CONTROL FLOW
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//;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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/*!
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* Jump, 32-bit constant offset. The offset is by default 0 and must be patched later.
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*/
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static Instruction jmp_32() {
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Instruction instr(0xe9);
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instr.set(Imm(4, 0));
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return instr;
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}
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/*!
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* Jump if equal.
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* TODO - can we get away with 16 bits?
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*/
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static Instruction je_32() {
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Instruction instr(0x0f);
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instr.set_op2(0x84);
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instr.set(Imm(4, 0));
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return instr;
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}
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/*!
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* Jump not equal.
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* TODO - can we get away with 16 bits?
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*/
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static Instruction jne_32() {
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Instruction instr(0x0f);
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instr.set_op2(0x85);
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instr.set(Imm(4, 0));
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return instr;
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}
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/*!
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* Jump less than or equal.
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* TODO - can we get away with 16 bits?
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*/
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static Instruction jle_32() {
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Instruction instr(0x0f);
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instr.set_op2(0x8e);
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instr.set(Imm(4, 0));
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return instr;
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}
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/*!
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* Jump greater than or equal.
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|
* TODO - can we get away with 16 bits?
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|
*/
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static Instruction jge_32() {
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Instruction instr(0x0f);
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instr.set_op2(0x8d);
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instr.set(Imm(4, 0));
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return instr;
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}
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/*!
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* Jump less than
|
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* TODO - can we get away with 16 bits?
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|
*/
|
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static Instruction jl_32() {
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Instruction instr(0x0f);
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instr.set_op2(0x8c);
|
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instr.set(Imm(4, 0));
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return instr;
|
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}
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|
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/*!
|
|
* Jump greater than
|
|
* TODO - can we get away with 16 bits?
|
|
*/
|
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static Instruction jg_32() {
|
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Instruction instr(0x0f);
|
|
instr.set_op2(0x8f);
|
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instr.set(Imm(4, 0));
|
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return instr;
|
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}
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/*!
|
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* Jump below or equal
|
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* TODO - can we get away with 16 bits?
|
|
*/
|
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static Instruction jbe_32() {
|
|
Instruction instr(0x0f);
|
|
instr.set_op2(0x86);
|
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instr.set(Imm(4, 0));
|
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return instr;
|
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}
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|
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/*!
|
|
* Jump above or equal
|
|
* TODO - can we get away with 16 bits?
|
|
*/
|
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static Instruction jae_32() {
|
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Instruction instr(0x0f);
|
|
instr.set_op2(0x83);
|
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instr.set(Imm(4, 0));
|
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return instr;
|
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}
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|
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/*!
|
|
* Jump below
|
|
* TODO - can we get away with 16 bits?
|
|
*/
|
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static Instruction jb_32() {
|
|
Instruction instr(0x0f);
|
|
instr.set_op2(0x82);
|
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instr.set(Imm(4, 0));
|
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return instr;
|
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}
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|
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/*!
|
|
* Jump above
|
|
* TODO - can we get away with 16 bits?
|
|
*/
|
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static Instruction ja_32() {
|
|
Instruction instr(0x0f);
|
|
instr.set_op2(0x87);
|
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instr.set(Imm(4, 0));
|
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return instr;
|
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}
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|
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//;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
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// FLOAT MATH
|
|
//;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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|
|
/*!
|
|
* Compare two floats and set flag register for jump
|
|
*/
|
|
static Instruction cmp_flt_flt(uint8_t a, uint8_t b) {
|
|
Instruction instr(0x0f);
|
|
instr.set_op2(0x2e);
|
|
instr.set_modrm_and_rex(a, b, 3, false);
|
|
return instr;
|
|
}
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|
|
/*!
|
|
* Multiply two floats in xmm's
|
|
*/
|
|
static Instruction mulss_xmm_xmm(uint8_t dst, uint8_t src) {
|
|
Instruction instr(0xf3);
|
|
instr.set_op2(0x0f);
|
|
instr.set_op3(0x59);
|
|
instr.set_modrm_and_rex(dst, src, 3, false);
|
|
instr.swap_op0_rex();
|
|
return instr;
|
|
}
|
|
|
|
/*!
|
|
* Divide two floats in xmm's
|
|
*/
|
|
static Instruction divss_xmm_xmm(uint8_t dst, uint8_t src) {
|
|
Instruction instr(0xf3);
|
|
instr.set_op2(0x0f);
|
|
instr.set_op3(0x5e);
|
|
instr.set_modrm_and_rex(dst, src, 3, false);
|
|
instr.swap_op0_rex();
|
|
return instr;
|
|
}
|
|
|
|
/*!
|
|
* Subtract two floats in xmm's
|
|
*/
|
|
static Instruction subss_xmm_xmm(uint8_t dst, uint8_t src) {
|
|
Instruction instr(0xf3);
|
|
instr.set_op2(0x0f);
|
|
instr.set_op3(0x5c);
|
|
instr.set_modrm_and_rex(dst, src, 3, false);
|
|
instr.swap_op0_rex();
|
|
return instr;
|
|
}
|
|
|
|
/*!
|
|
* Add two floats in xmm's
|
|
*/
|
|
static Instruction addss_xmm_xmm(uint8_t dst, uint8_t src) {
|
|
Instruction instr(0xf3);
|
|
instr.set_op2(0x0f);
|
|
instr.set_op3(0x58);
|
|
instr.set_modrm_and_rex(dst, src, 3, false);
|
|
instr.swap_op0_rex();
|
|
return instr;
|
|
}
|
|
|
|
/*!
|
|
* Convert GPR int32 to XMM float (single precision)
|
|
*/
|
|
static Instruction int32_to_float(uint8_t dst, uint8_t src) {
|
|
Instruction instr(0xf3);
|
|
instr.set_op2(0x0f);
|
|
instr.set_op3(0x2a);
|
|
instr.set_modrm_and_rex(dst, src, 3, false);
|
|
instr.swap_op0_rex();
|
|
return instr;
|
|
}
|
|
|
|
/*!
|
|
* Convert XMM float to GPR int32(single precision) (truncate)
|
|
*/
|
|
static Instruction float_to_int64(uint8_t dst, uint8_t src) {
|
|
Instruction instr(0xf3);
|
|
instr.set_op2(0x0f);
|
|
instr.set_op3(0x2c);
|
|
instr.set_modrm_and_rex(dst, src, 3, true);
|
|
instr.swap_op0_rex();
|
|
return instr;
|
|
}
|
|
|
|
//;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
|
// UTILITIES
|
|
//;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
|
|
|
/*!
|
|
* A "null" instruction. This instruction does not generate any bytes
|
|
* but can be referred to by a label. Useful to insert in place of a real instruction
|
|
* if the real instruction has been optimized out.
|
|
*/
|
|
static Instruction null() {
|
|
Instruction i(0);
|
|
i.is_null = true;
|
|
return i;
|
|
}
|
|
|
|
/*!
|
|
* A "function start" instruction. This emits no opcodes, but is used
|
|
* to determine where to insert the function type tag and how to align a function.
|
|
*/
|
|
static Instruction function_start() {
|
|
Instruction i(0);
|
|
i.is_null = true;
|
|
i.is_function_start = true;
|
|
return i;
|
|
}
|
|
};
|
|
|
|
#endif // JAK_IGEN_H
|