mirror of
https://github.com/open-goal/jak-project
synced 2026-08-03 08:53:42 -04:00
water111
e26efcc4f3
Implements the jak 2 lightning renderer as an alternate path through Generic2. Also set up some generic stuff in the goal code. There is a problem with the texture pool, which doesn't support the case where two textures have the same tbp, but different cluts. So lightning is often the wrong color (usually red).
517 lines
18 KiB
C++
517 lines
18 KiB
C++
#include "Generic2.h"
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#include "game/graphics/opengl_renderer/AdgifHandler.h"
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/*!
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* Advance through DMA data that has no effect on rendering (NOP codes) and see if this is the
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* end of the data.
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* The DmaFollower will either point to the start of the next bucket (and the function will return
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* true), or to the beginning of the next non-NOP DMA for this bucket.
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*/
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bool Generic2::check_for_end_of_generic_data(DmaFollower& dma, u32 next_bucket) {
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while (dma.current_tag().qwc == 0 && dma.current_tag_vifcode0().kind == VifCode::Kind::NOP &&
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dma.current_tag_vifcode1().kind == VifCode::Kind::NOP) {
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// this "CALL" tag is inserted by the engine to reset the GS. It's always inserted at the end of
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// the bucket. if we see it here, we should be able to skip over this resetting stuff (always 4
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// tags) and then see the start of the next bucket.
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if (dma.current_tag().kind == DmaTag::Kind::CALL) {
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for (int i = 0; i < 4; i++) {
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dma.read_and_advance();
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m_stats.dma_tags++;
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}
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ASSERT(dma.current_tag_offset() == next_bucket);
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return true;
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}
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m_stats.dma_tags++;
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dma.read_and_advance();
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}
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return false;
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}
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/*!
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* Process the first DMA of a generic bucket.
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* Return true if the generic bucket is empty and there is nothing to do.
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*
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* Otherwise, populates m_drawing_config which contains the common draw settings for all data being
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* rendered in this bucket.
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*/
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bool Generic2::handle_bucket_setup_dma(DmaFollower& dma, u32 next_bucket) {
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// if the engine didn't run the generic renderer setup function, this bucket will end here.
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if (check_for_end_of_generic_data(dma, next_bucket)) {
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return true;
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}
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// next, the generic setup. This reads the data generated by generic-init-buf.
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// setup packet 1 is GS settings
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auto test_and_zbuf = dma.read_and_advance();
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ASSERT(test_and_zbuf.size_bytes == 48);
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// first qw is the gif tag. Can ignore.
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// second qw is test, this is always the same, so can ignore it too.
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// (new 'static 'gs-test
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// :ate #x1
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// :atst (gs-atest greater-equal)
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// :aref #x26
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// :afail #x1
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// :zte #x1
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// :ztst (gs-ztest greater-equal)
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// )
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// third qw is zbuf:
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// the only thing that changes is zmsk, we need to store this value for later.
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u64 zbuf_val;
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memcpy(&zbuf_val, test_and_zbuf.data + 32, 8);
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m_drawing_config.zmsk = GsZbuf(zbuf_val).zmsk();
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// setup packet 2 is constants that normally go to VU1 data memory.
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// we're not going to be super strict checking the exact details of the unpack command, it's
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// a waste of time since we're the ones generating it anyway.
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auto constants = dma.read_and_advance();
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ASSERT(constants.size_bytes == 160);
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ASSERT(constants.vifcode0().kind == VifCode::Kind::STCYCL);
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ASSERT(constants.vifcode1().kind == VifCode::Kind::UNPACK_V4_32);
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// (fog vector :inline :offset-assert 0)
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memcpy(&m_drawing_config.pfog0, constants.data + 0, 4);
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memcpy(&m_drawing_config.fog_min, constants.data + 4, 4);
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memcpy(&m_drawing_config.fog_max, constants.data + 8, 4);
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// (adgif gs-gif-tag :inline :offset-assert 16) ;; was qword
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// (giftag gs-gif-tag :inline :offset-assert 32) ;; was qword
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// (hvdf-offset vector :inline :offset-assert 48)
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memcpy(m_drawing_config.hvdf_offset.data(), constants.data + 48, 16);
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// (hmge-scale vector :inline :offset-assert 64)
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// (invh-scale vector :inline :offset-assert 80)
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// (guard vector :inline :offset-assert 96)
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// (adnop qword :inline :offset-assert 112)
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// (flush qword :inline :offset-assert 128)
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// (stores qword :inline :offset-assert 144)
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auto vu_setup = dma.read_and_advance();
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ASSERT(vu_setup.size_bytes == 32);
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// this sets offset/base to 0, sets row to 0 and runs program 0 to set up VU regs
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// todo: any setup required from running this program.
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// if there was nothing rendered by generic on this frame in this bucket, the bucket will end
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// here.
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if (check_for_end_of_generic_data(dma, next_bucket)) {
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return true;
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}
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return false;
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}
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void Generic2::reset_buffers() {
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m_max_frags_seen = std::max(m_next_free_frag, m_max_frags_seen);
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m_max_verts_seen = std::max(m_next_free_vert, m_max_verts_seen);
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m_max_adgifs_seen = std::max(m_next_free_adgif, m_max_adgifs_seen);
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m_max_buckets_seen = std::max(m_next_free_bucket, m_max_buckets_seen);
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m_max_indices_seen = std::max(m_next_free_idx, m_max_indices_seen);
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m_next_free_frag = 0;
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m_next_free_vert = 0;
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m_next_free_adgif = 0;
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m_next_free_bucket = 0;
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m_next_free_idx = 0;
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}
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bool is_nop_vif(const u8* data) {
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u32 tag0_data;
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memcpy(&tag0_data, data, 4);
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return VifCode(tag0_data).kind == VifCode::Kind::NOP;
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}
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bool is_nop_or_flushe_vif(const u8* data) {
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u32 tag0_data;
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memcpy(&tag0_data, data, 4);
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auto k = VifCode(tag0_data).kind;
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return k == VifCode::Kind::NOP || k == VifCode::Kind::FLUSHE;
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}
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u32 unpack_vtx_positions(Generic2::Vertex* vtx, const u8* data, int vtx_count) {
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for (int i = 0; i < vtx_count; i++) {
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memcpy(vtx[i].xyz.data(), data + (i * 12), 12);
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}
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return vtx_count * 12;
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}
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u32 unpack_vertex_colors(Generic2::Vertex* vtx, const u8* data, int vtx_count) {
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for (int i = 0; i < vtx_count; i++) {
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memcpy(vtx[i].rgba.data(), data + (i * 4), 4);
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}
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return vtx_count * 4;
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}
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u32 unpack_vtx_tcs(Generic2::Vertex* vtx, const u8* data, int vtx_count) {
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for (int i = 0; i < vtx_count; i++) {
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s16 s, t;
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memcpy(&s, data + (i * 4), 2);
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memcpy(&t, data + (i * 4) + 2, 2);
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s16 s_masked = s & (s16)0xfffe;
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// note: int to float happening here.
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// if this is a bottleneck, we can possible keep integers and do this in the shader.
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// I've avoided this for now because only some integer formats are inefficient on the GPU
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// and it's hard to know what's supported well on all drivers/GPUs
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vtx[i].st[0] = s_masked;
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vtx[i].st[1] = t;
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vtx[i].adc = s_masked == s;
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}
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return vtx_count * 4;
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}
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u32 Generic2::handle_fragments_after_unpack_v4_32(const u8* data,
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u32 off,
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u32 first_unpack_bytes,
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u32 end_of_vif,
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Fragment* frag,
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bool loop) {
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// note: they rely on _something_ aligning this?
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u32 off_aligned = (off + 15) & ~15;
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// each header should have 7 qw header + at least 5 qw for a single adgif.
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ASSERT(first_unpack_bytes >= FRAG_HEADER_SIZE + sizeof(AdGifData));
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// grab the 7 qw header
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memcpy(frag->header, data + off_aligned, FRAG_HEADER_SIZE);
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// figure out how many adgifs and grab those.
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u32 adgif_bytes = (first_unpack_bytes - FRAG_HEADER_SIZE);
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u32 adgifs = adgif_bytes / sizeof(AdGifData);
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frag->adgif_idx = m_next_free_adgif;
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frag->adgif_count = adgifs;
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ASSERT(frag->adgif_count > 0);
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ASSERT(adgif_bytes == adgifs * sizeof(AdGifData));
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for (u32 i = 0; i < adgifs; i++) {
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auto& add = next_adgif();
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memcpy(&add.data, data + off_aligned + FRAG_HEADER_SIZE + (i * sizeof(AdGifData)),
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sizeof(AdGifData));
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}
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// continue in this transfer
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off += first_unpack_bytes;
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if (off == end_of_vif) {
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ASSERT_MSG(false, "nothing after header upload");
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}
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// the next thing is the vertex positions.
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while (is_nop_vif(data + off) && off < end_of_vif) {
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off += 4;
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}
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u32 stcycl_tag_data;
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memcpy(&stcycl_tag_data, data + off, 4);
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off += 4;
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VifCode stcycl_tag(stcycl_tag_data);
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ASSERT(stcycl_tag.kind == VifCode::Kind::STCYCL);
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ASSERT(stcycl_tag.immediate == 0x103);
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u32 vtx_pos_unpack_tag_data;
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memcpy(&vtx_pos_unpack_tag_data, data + off, 4);
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VifCode vtx_pos_unpack_tag(vtx_pos_unpack_tag_data);
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if (vtx_pos_unpack_tag.kind == VifCode::Kind::UNPACK_V4_8) {
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ASSERT(loop);
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} else {
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ASSERT(!loop);
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ASSERT(vtx_pos_unpack_tag.kind == VifCode::Kind::UNPACK_V3_32);
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off += 4;
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frag->vtx_idx = m_next_free_vert;
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frag->vtx_count = vtx_pos_unpack_tag.num;
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alloc_vtx(frag->vtx_count);
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off += unpack_vtx_positions(&m_verts[frag->vtx_idx], data + off, frag->vtx_count);
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ASSERT(off < end_of_vif);
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while (is_nop_vif(data + off) && off < end_of_vif) {
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off += 4;
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}
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ASSERT(off < end_of_vif);
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}
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if (loop) {
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// next, vertex colors
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u32 unpack_vtx_color_tag_data;
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memcpy(&unpack_vtx_color_tag_data, data + off, 4);
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off += 4;
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VifCode unpack_vtx_color_tag(unpack_vtx_color_tag_data);
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ASSERT(unpack_vtx_color_tag.kind == VifCode::Kind::UNPACK_V4_8);
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frag->vtx_idx = m_next_free_vert;
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frag->vtx_count = unpack_vtx_color_tag.num;
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alloc_vtx(frag->vtx_count);
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off += unpack_vertex_colors(&m_verts[frag->vtx_idx], data + off, frag->vtx_count);
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} else {
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// next, vertex colors
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u32 unpack_vtx_color_tag_data;
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memcpy(&unpack_vtx_color_tag_data, data + off, 4);
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off += 4;
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VifCode unpack_vtx_color_tag(unpack_vtx_color_tag_data);
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ASSERT(unpack_vtx_color_tag.kind == VifCode::Kind::UNPACK_V4_8);
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ASSERT(unpack_vtx_color_tag.num == frag->vtx_count);
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off += unpack_vertex_colors(&m_verts[frag->vtx_idx], data + off, frag->vtx_count);
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}
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ASSERT(off < end_of_vif);
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while (is_nop_vif(data + off) && off < end_of_vif) {
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off += 4;
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}
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ASSERT(off < end_of_vif);
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// next, vertex tcs
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u32 unpack_vtx_tc_tag_data;
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memcpy(&unpack_vtx_tc_tag_data, data + off, 4);
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off += 4;
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VifCode unpack_vtx_tc_tag(unpack_vtx_tc_tag_data);
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ASSERT(unpack_vtx_tc_tag.kind == VifCode::Kind::UNPACK_V2_16);
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ASSERT(unpack_vtx_tc_tag.num == frag->vtx_count);
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off += unpack_vtx_tcs(&m_verts[frag->vtx_idx], data + off, frag->vtx_count);
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if (off == end_of_vif) {
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return off;
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}
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ASSERT(off < end_of_vif);
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while (is_nop_vif(data + off) && off < end_of_vif) {
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off += 4;
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}
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ASSERT(off < end_of_vif);
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u32 stcycl_reset_data;
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memcpy(&stcycl_reset_data, data + off, 4);
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off += 4;
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VifCode stcycl_reset(stcycl_reset_data);
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if (stcycl_reset.kind == VifCode::Kind::STCYCL) {
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ASSERT(off < end_of_vif);
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while (is_nop_vif(data + off) && off < end_of_vif) {
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off += 4;
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}
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ASSERT(off < end_of_vif);
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u32 mscal_data;
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memcpy(&mscal_data, data + off, 4);
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off += 4;
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VifCode mscal(mscal_data);
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ASSERT(mscal.kind == VifCode::Kind::MSCAL);
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frag->mscal_addr = mscal.immediate;
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} else {
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ASSERT(stcycl_reset.kind == VifCode::Kind::MSCAL);
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frag->mscal_addr = stcycl_reset.immediate;
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ASSERT(off < end_of_vif);
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while (is_nop_vif(data + off) && off < end_of_vif) {
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off += 4;
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}
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ASSERT(off < end_of_vif);
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u32 stcycl_data;
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memcpy(&stcycl_data, data + off, 4);
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off += 4;
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VifCode stcycl(stcycl_data);
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ASSERT(stcycl.kind == VifCode::Kind::STCYCL);
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}
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ASSERT(off < end_of_vif);
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while (is_nop_or_flushe_vif(data + off) && off < end_of_vif) {
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off += 4;
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}
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return off;
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}
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void Generic2::process_dma(DmaFollower& dma, u32 next_bucket) {
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reset_buffers();
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// handle the stuff at the beginning.
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if (handle_bucket_setup_dma(dma, next_bucket)) {
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return;
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}
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// loop over "fragments"
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// each "fragment" consists of a series of uploads, followed by a MSCAL VIFCODE that runs
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// VU program that does vertex transformation and sends to the GS.
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Fragment* continued_fragment = nullptr;
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while (dma.current_tag_offset() != next_bucket) {
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if (continued_fragment) {
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auto continue_vif_transfer = dma.read_and_advance();
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ASSERT(continue_vif_transfer.vifcode0().kind == VifCode::Kind::NOP);
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auto up = continue_vif_transfer.vifcode1();
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ASSERT(up.kind == VifCode::Kind::UNPACK_V3_32);
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ASSERT(continue_vif_transfer.size_bytes * 4 / 48 == up.num);
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ASSERT(up.num == continued_fragment->vtx_count);
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unpack_vtx_positions(&m_verts[continued_fragment->vtx_idx], continue_vif_transfer.data,
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continued_fragment->vtx_count);
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continued_fragment = nullptr;
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auto call = dma.read_and_advance();
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ASSERT(call.size_bytes == 0);
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ASSERT(call.vifcode1().kind == VifCode::Kind::MSCAL);
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if (check_for_end_of_generic_data(dma, next_bucket)) {
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return;
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}
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} else {
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auto vif_transfer = dma.read_and_advance();
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auto v1 = vif_transfer.vifcode1();
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// if (vif_transfer.vifcode0().kind != VifCode::Kind::STCYCL ||
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// vif_transfer.vifcode1().kind != VifCode::Kind::UNPACK_V4_32) {
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// fmt::print("failing tag: {} {} {}\n", vif_transfer.vifcode0().print(),
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// vif_transfer.vifcode1().print(), vif_transfer.size_bytes);
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// }
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ASSERT(vif_transfer.vifcode0().kind == VifCode::Kind::STCYCL);
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ASSERT(v1.kind == VifCode::Kind::UNPACK_V4_32);
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u32 unpack_bytes = v1.num * 16;
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auto& frag = next_frag();
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u32 off = handle_fragments_after_unpack_v4_32(vif_transfer.data, 0, unpack_bytes,
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vif_transfer.size_bytes, &frag, false);
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if (check_for_end_of_generic_data(dma, next_bucket)) {
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return;
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}
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if (off < vif_transfer.size_bytes) {
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u32 stcycl_reset;
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memcpy(&stcycl_reset, vif_transfer.data + off, 4);
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ASSERT(VifCode(stcycl_reset).kind == VifCode::Kind::STCYCL);
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off += 4;
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// while (off < vif_transfer.size_bytes) {
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u32 next;
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memcpy(&next, vif_transfer.data + off, 4);
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VifCode next_unpack(next);
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ASSERT(next_unpack.kind == VifCode::Kind::UNPACK_V4_32);
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auto& continue_frag = next_frag();
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off = handle_fragments_after_unpack_v4_32(vif_transfer.data, off, next_unpack.num * 16,
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vif_transfer.size_bytes, &continue_frag, true);
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continued_fragment = &continue_frag;
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ASSERT(off == vif_transfer.size_bytes);
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// }
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}
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}
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}
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}
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bool is_nop_zero(const DmaTransfer& xf) {
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return xf.size_bytes == 0 && xf.vifcode0().kind == VifCode::Kind::NOP &&
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xf.vifcode1().kind == VifCode::Kind::NOP;
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}
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void unpack_vertex(Generic2::Vertex* out, const u8* in, int count) {
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for (int i = 0; i < count; i++) {
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// st:
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s32 s, t;
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memcpy(&s, in, 4);
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memcpy(&t, in + 4, 4);
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s32 s_masked = s & 0xfffffffe;
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out->st[0] = s_masked;
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out->st[1] = t;
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out->adc = s_masked == s;
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// rgba
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u32 data[4];
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memcpy(data, in + 16, 16);
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for (int j = 0; j < 4; j++) {
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out->rgba[j] = data[j];
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}
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// pos
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float p[4];
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memcpy(p, in + 32, 16);
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for (int j = 0; j < 3; j++) {
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out->xyz[j] = p[j];
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}
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out++;
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in += (16 * 3);
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}
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}
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void Generic2::process_dma_lightning(DmaFollower& dma, u32 next_bucket) {
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reset_buffers();
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auto first_data = dma.read_and_advance();
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// if unused, sends 0 nop nop
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if (is_nop_zero(first_data) && next_bucket == dma.current_tag_offset()) {
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return;
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}
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|
|
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// intro:
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// 0: MARK NOP (profiling)
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auto v0k = first_data.vifcode0().kind;
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ASSERT((v0k == VifCode::Kind::MARK || v0k == VifCode::Kind::NOP) &&
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first_data.vifcode1().kind == VifCode::Kind::NOP);
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// 32: NOP DIRECT (set GS registers)
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// for lightning, this is always masking z writes
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|
auto direct_setup = dma.read_and_advance();
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ASSERT(direct_setup.size_bytes == 32 && direct_setup.vifcode0().kind == VifCode::Kind::NOP &&
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|
direct_setup.vifcode1().kind == VifCode::Kind::DIRECT);
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m_drawing_config.zmsk = true;
|
|
|
|
// 128: STCYCL cl: 4 wl: 4 UNPACK-V4-32: 8 addr: 897 us: false tops: false
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|
// upload VU1 constants
|
|
|
|
/*
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|
(deftype generic-constants (structure)
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|
((fog vector :inline :offset-assert 0)
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|
(adgif gs-gif-tag :inline :offset-assert 16) ;; was qword
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|
(hvdf-offset vector :inline :offset-assert 32)
|
|
(hmge-scale vector :inline :offset-assert 48)
|
|
(invh-scale vector :inline :offset-assert 64)
|
|
(guard vector :inline :offset-assert 80)
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|
(flush qword :inline :offset-assert 96)
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|
(stores qword :inline :offset-assert 112)
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|
)
|
|
)
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|
*/
|
|
auto constants = dma.read_and_advance();
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|
ASSERT(constants.size_bytes == 128);
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|
ASSERT(constants.vifcode0().kind == VifCode::Kind::STCYCL);
|
|
ASSERT(constants.vifcode1().kind == VifCode::Kind::UNPACK_V4_32);
|
|
memcpy(&m_drawing_config.pfog0, constants.data + 0, 4);
|
|
memcpy(&m_drawing_config.fog_min, constants.data + 4, 4);
|
|
memcpy(&m_drawing_config.fog_max, constants.data + 8, 4);
|
|
memcpy(m_drawing_config.hvdf_offset.data(), constants.data + 32, 16);
|
|
|
|
// 32: MSCALF 0x0 STMOD 0b0
|
|
auto mscalf = dma.read_and_advance();
|
|
ASSERT(mscalf.vifcode0().kind == VifCode::Kind::MSCALF &&
|
|
mscalf.vifcode1().kind == VifCode::Kind::STMOD);
|
|
// 0: NOP NOP
|
|
auto another_nop = dma.read_and_advance();
|
|
ASSERT(is_nop_zero(another_nop));
|
|
|
|
auto maybe_first_upload = dma.read_and_advance();
|
|
while (maybe_first_upload.vifcode1().kind == VifCode::Kind::UNPACK_V4_32) {
|
|
auto second_upload = dma.read_and_advance();
|
|
auto mscal = dma.read_and_advance();
|
|
(void)mscal;
|
|
|
|
auto* frag = &next_frag();
|
|
ASSERT(maybe_first_upload.size_bytes == Generic2::FRAG_HEADER_SIZE + 5 * 16); // header + adgif
|
|
memcpy(frag->header, maybe_first_upload.data, Generic2::FRAG_HEADER_SIZE);
|
|
frag->adgif_idx = m_next_free_adgif;
|
|
frag->adgif_count = 1;
|
|
frag->mscal_addr = 6;
|
|
frag->uses_hud = false;
|
|
auto* adgif = &next_adgif();
|
|
memcpy(&adgif->data, maybe_first_upload.data + Generic2::FRAG_HEADER_SIZE, sizeof(AdGifData));
|
|
// (new 'static 'gif-tag-regs-32 :regs0 (gif-reg-id st) :regs1 (gif-reg-id rgbaq) :regs2
|
|
// (gif-reg-id xyzf2))
|
|
int num_vtx = second_upload.size_bytes / (16 * 3);
|
|
frag->vtx_count = num_vtx;
|
|
frag->vtx_idx = m_next_free_vert;
|
|
alloc_vtx(num_vtx);
|
|
unpack_vertex(&m_verts[frag->vtx_idx], second_upload.data, num_vtx);
|
|
|
|
// run
|
|
// 192: NOP UNPACK-V4-32: 12 addr: 837 us: false tops: false
|
|
// 1536: NOP UNPACK-V4-32: 96 addr: 9 us: false tops: false
|
|
// 0: NOP MSCAL 0x6
|
|
|
|
maybe_first_upload = dma.read_and_advance();
|
|
}
|
|
|
|
// ending:
|
|
// 0: NOP NOP
|
|
// 160: FLUSHA DIRECT
|
|
// 0: NOP NOP
|
|
auto flusha = dma.read_and_advance();
|
|
(void)flusha;
|
|
auto end = dma.read_and_advance();
|
|
(void)end;
|
|
ASSERT(next_bucket == dma.current_tag_offset());
|
|
} |