From 448841d9a2bcb81962bcf8beb6db8da4d377ee29 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 18 Feb 2022 17:15:19 +0100 Subject: [PATCH 1/5] dt-bindings: usb: dwc2: fix compatible of Intel Agilex Intel Agilex USB DWC2 node is used as compatible with generic snps,dwc2 (just like Altera's Stratix10). Acked-by: Rob Herring Signed-off-by: Krzysztof Kozlowski Signed-off-by: Dinh Nguyen --- Documentation/devicetree/bindings/usb/dwc2.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/usb/dwc2.yaml b/Documentation/devicetree/bindings/usb/dwc2.yaml index f00867ebc147..048e352c531a 100644 --- a/Documentation/devicetree/bindings/usb/dwc2.yaml +++ b/Documentation/devicetree/bindings/usb/dwc2.yaml @@ -41,6 +41,7 @@ properties: - amlogic,meson8b-usb - amlogic,meson-gxbb-usb - amlogic,meson-g12a-usb + - intel,socfpga-agilex-hsotg - const: snps,dwc2 - const: amcc,dwc-otg - const: apm,apm82181-dwc-otg From 1b5f9a0487594bae57a6b60d11ee2e274648ec05 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 18 Feb 2022 17:15:20 +0100 Subject: [PATCH 2/5] dt-bindings: usb: dwc2: add iommus The DWC2 node might use IOMMU (e.g. Altera Stratix10), so add "iommus" property. This fixes warnings like: arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dt.yaml: usb@ffb40000: 'iommus' does not match any of the regexes: 'pinctrl-[0-9]+' Acked-by: Rob Herring Signed-off-by: Krzysztof Kozlowski Signed-off-by: Dinh Nguyen --- Documentation/devicetree/bindings/usb/dwc2.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/dwc2.yaml b/Documentation/devicetree/bindings/usb/dwc2.yaml index 048e352c531a..1ba96706bbcb 100644 --- a/Documentation/devicetree/bindings/usb/dwc2.yaml +++ b/Documentation/devicetree/bindings/usb/dwc2.yaml @@ -68,6 +68,9 @@ properties: items: - const: otg + iommus: + maxItems: 1 + resets: items: - description: common reset From 4b9ff41f22d69f06dd6bfc929eec0f2a1f05789c Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 18 Feb 2022 17:15:21 +0100 Subject: [PATCH 3/5] dt-bindings: usb: dwc2: add disable-over-current The driver parses disable-over-current protection and some implementations use it (e.g. Altera Stratix10), so document it in the bindings. Acked-by: Rob Herring Signed-off-by: Krzysztof Kozlowski Signed-off-by: Dinh Nguyen --- Documentation/devicetree/bindings/usb/dwc2.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/dwc2.yaml b/Documentation/devicetree/bindings/usb/dwc2.yaml index 1ba96706bbcb..1addab83f4fd 100644 --- a/Documentation/devicetree/bindings/usb/dwc2.yaml +++ b/Documentation/devicetree/bindings/usb/dwc2.yaml @@ -68,6 +68,10 @@ properties: items: - const: otg + disable-over-current: + type: boolean + description: whether to disable detection of over-current condition. + iommus: maxItems: 1 From 4b557e171ae7b5c5b69f7a5eee553714f7c52435 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 18 Feb 2022 17:15:22 +0100 Subject: [PATCH 4/5] arm64: dts: agilex/stratix10: add clock-names to USB DWC2 node USB DWC2 requires clock-names: arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dt.yaml: usb@ffb00000: 'clock-names' is a required property Signed-off-by: Krzysztof Kozlowski Signed-off-by: Dinh Nguyen --- arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 1 + arch/arm64/boot/dts/intel/socfpga_agilex.dtsi | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi index da032a6f71da..884bda106399 100644 --- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi @@ -485,6 +485,7 @@ resets = <&rst USB0_RESET>, <&rst USB0_OCP_RESET>; reset-names = "dwc2", "dwc2-ecc"; clocks = <&clkmgr STRATIX10_USB_CLK>; + clock-names = "otg"; iommus = <&smmu 6>; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi index 1f4618c1062e..e593d7797d31 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi +++ b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi @@ -510,6 +510,7 @@ resets = <&rst USB0_RESET>, <&rst USB0_OCP_RESET>; reset-names = "dwc2", "dwc2-ecc"; clocks = <&clkmgr AGILEX_USB_CLK>; + clock-names = "otg"; iommus = <&smmu 6>; status = "disabled"; }; From ef82c9be844f6b249a69d8fa190d4d686121d55c Mon Sep 17 00:00:00 2001 From: Dinh Nguyen Date: Thu, 24 Feb 2022 10:29:56 -0600 Subject: [PATCH 5/5] arm64: dts: n5x: add sdr edac support The N5X platform has the Synopsys DDR controller the includes an EDAC controller. Add the entry for the controller in the DTS file instead of the base Agilex DTSI because the base Agilex does not have the controller. Signed-off-by: Dinh Nguyen --- arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts b/arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts index 5609d8df6729..50b29fa7ee01 100644 --- a/arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts +++ b/arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts @@ -24,6 +24,16 @@ /* We expect the bootloader to fill in the reg */ reg = <0 0 0 0>; }; + + soc { + sdram_edac: sdr_edac@f87f8000 { + compatible = "snps,ddrc-3.80a"; + reg = <0xf87f8000 0x400>; + interrupts = <0 175 4>; + intel,sysmgr-syscon = <&sysmgr 0xb8>; + status = "okay"; + }; + }; }; &clkmgr {