dt-bindings: display/msm: hdmi: split and convert to yaml
Convert Qualcomm HDMI binding into HDMI TX and PHY yaml bindings. Changes to schema: HDMI: - fixed reg-names numbering to match 0..3 instead 0,1,3,4 - dropped qcom,tx-ddc-* from example, they were not documented - make phy-names deprecated, drop it from the examples PHY: - moved into phy/ directory - split into QMP and non-QMP PHY schemas Co-developed-by: David Heidelberg <david@ixit.cz> Signed-off-by: David Heidelberg <david@ixit.cz> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/488850/ Link: https://lore.kernel.org/r/20220609122350.3157529-2-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
This commit is contained in:
Dmitry Baryshkov
parent
a18a44e926
commit
2f14bc38d8
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@ -1,99 +0,0 @@
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Qualcomm adreno/snapdragon hdmi output
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Required properties:
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- compatible: one of the following
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* "qcom,hdmi-tx-8996"
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* "qcom,hdmi-tx-8994"
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* "qcom,hdmi-tx-8084"
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* "qcom,hdmi-tx-8974"
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* "qcom,hdmi-tx-8660"
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* "qcom,hdmi-tx-8960"
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- reg: Physical base address and length of the controller's registers
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- reg-names: "core_physical"
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- interrupts: The interrupt signal from the hdmi block.
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- power-domains: Should be <&mmcc MDSS_GDSC>.
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- clocks: device clocks
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See ../clocks/clock-bindings.txt for details.
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- core-vdda-supply: phandle to supply regulator
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- hdmi-mux-supply: phandle to mux regulator
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- phys: the phandle for the HDMI PHY device
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- phy-names: the name of the corresponding PHY device
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Optional properties:
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- hpd-gpios: hpd pin
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- qcom,hdmi-tx-mux-en-gpios: hdmi mux enable pin
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- qcom,hdmi-tx-mux-sel-gpios: hdmi mux select pin
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- qcom,hdmi-tx-mux-lpm-gpios: hdmi mux lpm pin
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- power-domains: reference to the power domain(s), if available.
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- pinctrl-names: the pin control state names; should contain "default"
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- pinctrl-0: the default pinctrl state (active)
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- pinctrl-1: the "sleep" pinctrl state
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HDMI PHY:
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Required properties:
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- compatible: Could be the following
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* "qcom,hdmi-phy-8660"
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* "qcom,hdmi-phy-8960"
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* "qcom,hdmi-phy-8974"
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* "qcom,hdmi-phy-8084"
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* "qcom,hdmi-phy-8996"
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- #phy-cells: Number of cells in a PHY specifier; Should be 0.
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- reg: Physical base address and length of the registers of the PHY sub blocks.
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- reg-names: The names of register regions. The following regions are required:
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* "hdmi_phy"
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* "hdmi_pll"
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For HDMI PHY on msm8996, these additional register regions are required:
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* "hdmi_tx_l0"
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* "hdmi_tx_l1"
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* "hdmi_tx_l3"
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* "hdmi_tx_l4"
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- power-domains: Should be <&mmcc MDSS_GDSC>.
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- clocks: device clocks
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See Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
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- core-vdda-supply: phandle to vdda regulator device node
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Example:
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/ {
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...
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hdmi: hdmi@4a00000 {
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compatible = "qcom,hdmi-tx-8960";
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reg-names = "core_physical";
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reg = <0x04a00000 0x2f0>;
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interrupts = <GIC_SPI 79 0>;
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power-domains = <&mmcc MDSS_GDSC>;
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clock-names =
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"core",
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"master_iface",
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"slave_iface";
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clocks =
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<&mmcc HDMI_APP_CLK>,
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<&mmcc HDMI_M_AHB_CLK>,
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<&mmcc HDMI_S_AHB_CLK>;
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qcom,hdmi-tx-ddc-clk = <&msmgpio 70 GPIO_ACTIVE_HIGH>;
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qcom,hdmi-tx-ddc-data = <&msmgpio 71 GPIO_ACTIVE_HIGH>;
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qcom,hdmi-tx-hpd = <&msmgpio 72 GPIO_ACTIVE_HIGH>;
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core-vdda-supply = <&pm8921_hdmi_mvs>;
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hdmi-mux-supply = <&ext_3p3v>;
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&hpd_active &ddc_active &cec_active>;
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pinctrl-1 = <&hpd_suspend &ddc_suspend &cec_suspend>;
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phys = <&hdmi_phy>;
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phy-names = "hdmi_phy";
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};
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hdmi_phy: phy@4a00400 {
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compatible = "qcom,hdmi-phy-8960";
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reg-names = "hdmi_phy",
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"hdmi_pll";
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reg = <0x4a00400 0x60>,
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<0x4a00500 0x100>;
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#phy-cells = <0>;
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power-domains = <&mmcc MDSS_GDSC>;
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clock-names = "slave_iface";
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clocks = <&mmcc HDMI_S_AHB_CLK>;
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core-vdda-supply = <&pm8921_hdmi_mvs>;
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};
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};
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@ -0,0 +1,228 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/msm/hdmi.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Adreno/Snapdragon HDMI output
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maintainers:
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- Rob Clark <robdclark@gmail.com>
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properties:
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compatible:
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enum:
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- qcom,hdmi-tx-8084
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- qcom,hdmi-tx-8660
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- qcom,hdmi-tx-8960
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- qcom,hdmi-tx-8974
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- qcom,hdmi-tx-8994
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- qcom,hdmi-tx-8996
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clocks:
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minItems: 1
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maxItems: 5
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clock-names:
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minItems: 1
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maxItems: 5
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reg:
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minItems: 1
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maxItems: 3
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reg-names:
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minItems: 1
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items:
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- const: core_physical
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- const: qfprom_physical
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- const: hdcp_physical
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interrupts:
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maxItems: 1
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phys:
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maxItems: 1
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phy-names:
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enum:
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- hdmi_phy
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- hdmi-phy
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deprecated: true
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core-vdda-supply:
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description: phandle to VDDA supply regulator
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hdmi-mux-supply:
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description: phandle to mux regulator
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core-vcc-supply:
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description: phandle to VCC supply regulator
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hpd-gpios:
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maxItems: 1
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description: hpd pin
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qcom,hdmi-tx-mux-en-gpios:
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maxItems: 1
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description: HDMI mux enable pin
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qcom,hdmi-tx-mux-sel-gpios:
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maxItems: 1
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description: HDMI mux select pin
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qcom,hdmi-tx-mux-lpm-gpios:
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maxItems: 1
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description: HDMI mux lpm pin
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'#sound-dai-cells':
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const: 1
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ports:
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type: object
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$ref: /schemas/graph.yaml#/properties/ports
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properties:
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port@0:
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$ref: /schemas/graph.yaml#/$defs/port-base
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description: |
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Input endpoints of the controller.
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port@1:
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$ref: /schemas/graph.yaml#/$defs/port-base
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description: |
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Output endpoints of the controller.
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required:
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- port@0
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required:
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- compatible
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- clocks
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- clock-names
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- reg
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- reg-names
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- interrupts
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- phys
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allOf:
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,hdmi-tx-8960
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- qcom,hdmi-tx-8660
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then:
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properties:
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clocks:
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minItems: 3
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maxItems: 3
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clock-names:
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items:
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- const: core
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- const: master_iface
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- const: slave_iface
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core-vcc-supplies: false
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,hdmi-tx-8974
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- qcom,hdmi-tx-8084
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- qcom,hdmi-tx-8994
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- qcom,hdmi-tx-8996
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then:
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properties:
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clocks:
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minItems: 5
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clock-names:
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items:
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- const: mdp_core
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- const: iface
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- const: core
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- const: alt_iface
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- const: extp
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hdmi-mux-supplies: false
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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hdmi: hdmi@4a00000 {
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compatible = "qcom,hdmi-tx-8960";
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reg-names = "core_physical";
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reg = <0x04a00000 0x2f0>;
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interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
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clock-names = "core",
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"master_iface",
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"slave_iface";
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clocks = <&clk 61>,
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<&clk 72>,
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<&clk 98>;
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hpd-gpios = <&msmgpio 72 GPIO_ACTIVE_HIGH>;
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core-vdda-supply = <&pm8921_hdmi_mvs>;
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hdmi-mux-supply = <&ext_3p3v>;
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&hpd_active &ddc_active &cec_active>;
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pinctrl-1 = <&hpd_suspend &ddc_suspend &cec_suspend>;
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phys = <&hdmi_phy>;
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};
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- |
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#include <dt-bindings/clock/qcom,gcc-msm8996.h>
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#include <dt-bindings/clock/qcom,mmcc-msm8996.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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hdmi@9a0000 {
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compatible = "qcom,hdmi-tx-8996";
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reg = <0x009a0000 0x50c>,
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<0x00070000 0x6158>,
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<0x009e0000 0xfff>;
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reg-names = "core_physical",
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"qfprom_physical",
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"hdcp_physical";
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interrupt-parent = <&mdss>;
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interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mmcc MDSS_MDP_CLK>,
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<&mmcc MDSS_AHB_CLK>,
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<&mmcc MDSS_HDMI_CLK>,
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<&mmcc MDSS_HDMI_AHB_CLK>,
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<&mmcc MDSS_EXTPCLK_CLK>;
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clock-names = "mdp_core",
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"iface",
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"core",
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"alt_iface",
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"extp";
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phys = <&hdmi_phy>;
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#sound-dai-cells = <1>;
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&hdmi_hpd_active &hdmi_ddc_active>;
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pinctrl-1 = <&hdmi_hpd_suspend &hdmi_ddc_suspend>;
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core-vdda-supply = <&vreg_l12a_1p8>;
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core-vcc-supply = <&vreg_s4a_1p8>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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endpoint {
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remote-endpoint = <&mdp5_intf3_out>;
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};
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};
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};
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};
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...
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@ -0,0 +1,104 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/phy/qcom,hdmi-phy-other.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Adreno/Snapdragon HDMI phy
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maintainers:
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- Rob Clark <robdclark@gmail.com>
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properties:
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compatible:
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enum:
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- qcom,hdmi-phy-8660
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- qcom,hdmi-phy-8960
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- qcom,hdmi-phy-8974
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- qcom,hdmi-phy-8084
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reg:
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maxItems: 2
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reg-names:
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items:
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- const: hdmi_phy
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- const: hdmi_pll
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clocks:
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minItems: 1
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maxItems: 2
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clock-names:
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minItems: 1
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maxItems: 2
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power-domains:
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maxItems: 1
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core-vdda-supply:
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description: phandle to VDDA supply regulator
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vddio-supply:
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description: phandle to VDD I/O supply regulator
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'#phy-cells':
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const: 0
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allOf:
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,hdmi-phy-8660
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- qcom,hdmi-phy-8960
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then:
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properties:
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clocks:
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maxItems: 1
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clock-names:
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items:
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- const: slave_iface
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vddio-supply: false
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,hdmi-phy-8084
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- qcom,hdmi-phy-8974
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then:
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properties:
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clocks:
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maxItems: 2
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clock-names:
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items:
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- const: iface
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- const: alt_iface
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required:
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- compatible
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- clocks
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- reg
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- reg-names
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- '#phy-cells'
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additionalProperties: false
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examples:
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- |
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hdmi_phy: phy@4a00400 {
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compatible = "qcom,hdmi-phy-8960";
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reg-names = "hdmi_phy",
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"hdmi_pll";
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reg = <0x4a00400 0x60>,
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<0x4a00500 0x100>;
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#phy-cells = <0>;
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power-domains = <&mmcc 1>;
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clock-names = "slave_iface";
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clocks = <&clk 21>;
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core-vdda-supply = <&pm8921_hdmi_mvs>;
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};
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@ -0,0 +1,85 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/phy/qcom,hdmi-phy-qmp.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Adreno/Snapdragon QMP HDMI phy
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maintainers:
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- Rob Clark <robdclark@gmail.com>
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properties:
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compatible:
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enum:
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- qcom,hdmi-phy-8996
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reg:
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maxItems: 6
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reg-names:
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items:
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- const: hdmi_pll
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- const: hdmi_tx_l0
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- const: hdmi_tx_l1
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- const: hdmi_tx_l2
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- const: hdmi_tx_l3
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- const: hdmi_phy
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clocks:
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maxItems: 2
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clock-names:
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items:
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- const: iface
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- const: ref
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power-domains:
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maxItems: 1
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vcca-supply:
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description: phandle to VCCA supply regulator
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vddio-supply:
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description: phandle to VDD I/O supply regulator
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'#phy-cells':
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const: 0
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required:
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- compatible
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- clocks
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- clock-names
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||||
- reg
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- reg-names
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- '#phy-cells'
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additionalProperties: false
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|
||||
examples:
|
||||
- |
|
||||
hdmi-phy@9a0600 {
|
||||
compatible = "qcom,hdmi-phy-8996";
|
||||
reg = <0x009a0600 0x1c4>,
|
||||
<0x009a0a00 0x124>,
|
||||
<0x009a0c00 0x124>,
|
||||
<0x009a0e00 0x124>,
|
||||
<0x009a1000 0x124>,
|
||||
<0x009a1200 0x0c8>;
|
||||
reg-names = "hdmi_pll",
|
||||
"hdmi_tx_l0",
|
||||
"hdmi_tx_l1",
|
||||
"hdmi_tx_l2",
|
||||
"hdmi_tx_l3",
|
||||
"hdmi_phy";
|
||||
|
||||
clocks = <&mmcc 116>,
|
||||
<&gcc 214>;
|
||||
clock-names = "iface",
|
||||
"ref";
|
||||
#phy-cells = <0>;
|
||||
|
||||
vddio-supply = <&vreg_l12a_1p8>;
|
||||
vcca-supply = <&vreg_l28a_0p925>;
|
||||
};
|
||||
Loading…
Reference in New Issue