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drm/amd/powerplay: cache the watermark settings on system memory 

So that we do not need to allocate a piece of VRAM for it. This
is a preparation for coming change which unifies the VRAM address
for all driver tables interaction with SMU.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Evan Quan 2019-12-31 10:33:19 +08:00 committed by Alex Deucher
parent d5ec4b4568
commit 9fa1ed5bf6
6 changed files with 24 additions and 16 deletions
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25
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
View File

@ -1929,32 +1929,25 @@ int smu_set_df_cstate(struct smu_context *smu,
int smu_write_watermarks_table(struct smu_context *smu)
{
int ret = 0;
struct smu_table_context *smu_table = &smu->smu_table;
struct smu_table *table = NULL;
void *watermarks_table = smu->smu_table.watermarks_table;
table = &smu_table->tables[SMU_TABLE_WATERMARKS];
if (!table->cpu_addr)
if (!watermarks_table)
return -EINVAL;
ret = smu_update_table(smu, SMU_TABLE_WATERMARKS, 0, table->cpu_addr,
return smu_update_table(smu,
SMU_TABLE_WATERMARKS,
0,
watermarks_table,
true);
return ret;
}
int smu_set_watermarks_for_clock_ranges(struct smu_context *smu,
struct dm_pp_wm_sets_with_clock_ranges_soc15 *clock_ranges)
{
struct smu_table *watermarks;
void *table;
void *table = smu->smu_table.watermarks_table;
if (!smu->smu_table.tables)
return 0;
watermarks = &smu->smu_table.tables[SMU_TABLE_WATERMARKS];
table = watermarks->cpu_addr;
if (!table)
return -EINVAL;
mutex_lock(&smu->mutex);

1
drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
View File

@ -254,6 +254,7 @@ struct smu_table_context
unsigned long metrics_time;
void *metrics_table;
void *clocks_table;
void *watermarks_table;
void *max_sustainable_clocks;
struct smu_bios_boot_up_values boot_values;

4
drivers/gpu/drm/amd/powerplay/navi10_ppt.c
View File

@ -555,6 +555,10 @@ static int navi10_tables_init(struct smu_context *smu, struct smu_table *tables)
return -ENOMEM;
smu_table->metrics_time = 0;
smu_table->watermarks_table = kzalloc(sizeof(Watermarks_t), GFP_KERNEL);
if (!smu_table->watermarks_table)
return -ENOMEM;
return 0;
}

4
drivers/gpu/drm/amd/powerplay/renoir_ppt.c
View File

@ -209,6 +209,10 @@ static int renoir_tables_init(struct smu_context *smu, struct smu_table *tables)
return -ENOMEM;
smu_table->metrics_time = 0;
smu_table->watermarks_table = kzalloc(sizeof(Watermarks_t), GFP_KERNEL);
if (!smu_table->watermarks_table)
return -ENOMEM;
return 0;
}

2
drivers/gpu/drm/amd/powerplay/smu_v11_0.c
View File

@ -450,8 +450,10 @@ int smu_v11_0_fini_smc_tables(struct smu_context *smu)
kfree(smu_table->tables);
kfree(smu_table->metrics_table);
kfree(smu_table->watermarks_table);
smu_table->tables = NULL;
smu_table->metrics_table = NULL;
smu_table->watermarks_table = NULL;
smu_table->metrics_time = 0;
ret = smu_v11_0_fini_dpm_context(smu);

4
drivers/gpu/drm/amd/powerplay/vega20_ppt.c
View File

@ -338,6 +338,10 @@ static int vega20_tables_init(struct smu_context *smu, struct smu_table *tables)
return -ENOMEM;
smu_table->metrics_time = 0;
smu_table->watermarks_table = kzalloc(sizeof(Watermarks_t), GFP_KERNEL);
if (!smu_table->watermarks_table)
return -ENOMEM;
return 0;
}