staging: comedi: cb_pcimdda: cleanup the analog out read/write
Use the register map define to work out the i/o address. Cleanup the comments about the simultaneous transfer mode for the analog outputs. Change the return to 'insn->n', the comedi core expects the return to be the number of data elements used. Technically the 'i' value is correct but 'insn->n' just makes it clearer. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Cc: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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committed by
Greg Kroah-Hartman
parent
b9616b18c1
commit
aee815b53b
@@ -110,62 +110,51 @@ static int cb_pcimdda_ao_winsn(struct comedi_device *dev,
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unsigned int *data)
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{
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struct cb_pcimdda_private *devpriv = dev->private;
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unsigned int chan = CR_CHAN(insn->chanspec);
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unsigned long offset = dev->iobase + PCIMDDA_DA_CHAN(chan);
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unsigned int val = 0;
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int i;
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int chan = CR_CHAN(insn->chanspec);
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unsigned long offset = dev->iobase + chan * 2;
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/* Writing a list of values to an AO channel is probably not
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* very useful, but that's how the interface is defined. */
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for (i = 0; i < insn->n; i++) {
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/* first, load the low byte */
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outb((char)(data[i] & 0x00ff), offset);
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/* next, write the high byte -- only after this is written is
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the channel voltage updated in the DAC, unless
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we're in simultaneous xfer mode (jumper on card)
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then a rinsn is necessary to actually update the DAC --
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see cb_pcimdda_ao_rinsn() below... */
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outb((char)(data[i] >> 8 & 0x00ff), offset + 1);
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val = data[i];
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/* for testing only.. the actual rinsn SHOULD do an inw!
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(see the stuff about simultaneous XFER mode on this board) */
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devpriv->ao_readback[chan] = data[i];
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/*
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* Write the LSB then MSB.
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*
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* If the simultaneous xfer mode is selected by the
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* jumper on the card, a read instruction is needed
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* in order to initiate the simultaneous transfer.
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* Otherwise, the DAC will be updated when the MSB
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* is written.
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*/
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outb(val & 0x00ff, offset);
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outb((val >> 8) & 0x00ff, offset + 1);
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}
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/* return the number of samples read/written */
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return i;
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/* Cache the last value for readback */
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devpriv->ao_readback[chan] = val;
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return insn->n;
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}
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/* AO subdevices should have a read insn as well as a write insn.
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Usually this means copying a value stored in devpriv->ao_readback.
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However, since this board has this jumper setting called "Simultaneous
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Xfer mode" (off by default), we will support it. Simultaneaous xfer
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mode is accomplished by loading ALL the values you want for AO in all the
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channels, then READing off one of the AO registers to initiate the
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instantaneous simultaneous update of all DAC outputs, which makes
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all AO channels update simultaneously. This is useful for some control
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applications, I would imagine.
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*/
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static int cb_pcimdda_ao_rinsn(struct comedi_device *dev,
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struct comedi_subdevice *s,
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struct comedi_insn *insn,
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unsigned int *data)
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{
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struct cb_pcimdda_private *devpriv = dev->private;
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int i;
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int chan = CR_CHAN(insn->chanspec);
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unsigned long offset = dev->iobase + PCIMDDA_DA_CHAN(chan);
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int i;
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for (i = 0; i < insn->n; i++) {
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inw(dev->iobase + chan * 2);
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/*
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* should I set data[i] to the result of the actual read
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* on the register or the cached unsigned int in
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* devpriv->ao_readback[]?
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*/
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/* Initiate the simultaneous transfer */
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inw(offset);
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data[i] = devpriv->ao_readback[chan];
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}
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return i;
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return insn->n;
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}
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static struct pci_dev *cb_pcimdda_probe(struct comedi_device *dev,
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