can: ems_pci: Add read/write register and post irq functions
Add functions to read and write SJA1000 registers and also the post irq routine Signed-off-by: Gerhard Uttenthaler <uttenthaler@ems-wuensche.com> Link: https://lore.kernel.org/all/20230120112616.6071-5-uttenthaler@ems-wuensche.com Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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@ -172,6 +172,24 @@ static void ems_pci_v2_post_irq(const struct sja1000_priv *priv)
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writel(PLX_ICSR_ENA_CLR, card->conf_addr + PLX_ICSR);
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}
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static u8 ems_pci_v3_read_reg(const struct sja1000_priv *priv, int port)
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{
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return readb(priv->reg_base + port);
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}
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static void ems_pci_v3_write_reg(const struct sja1000_priv *priv,
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int port, u8 val)
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{
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writeb(val, priv->reg_base + port);
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}
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static void ems_pci_v3_post_irq(const struct sja1000_priv *priv)
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{
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struct ems_pci_card *card = (struct ems_pci_card *)priv->priv;
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writel(ASIX_LINTSR_INT0AC, card->conf_addr + ASIX_LINTSR);
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}
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/* Check if a CAN controller is present at the specified location
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* by trying to set 'em into the PeliCAN mode
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*/
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@ -330,10 +348,14 @@ static int ems_pci_add_card(struct pci_dev *pdev,
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priv->read_reg = ems_pci_v1_read_reg;
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priv->write_reg = ems_pci_v1_write_reg;
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priv->post_irq = ems_pci_v1_post_irq;
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} else {
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} else if (card->version == 2) {
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priv->read_reg = ems_pci_v2_read_reg;
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priv->write_reg = ems_pci_v2_write_reg;
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priv->post_irq = ems_pci_v2_post_irq;
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} else {
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priv->read_reg = ems_pci_v3_read_reg;
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priv->write_reg = ems_pci_v3_write_reg;
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priv->post_irq = ems_pci_v3_post_irq;
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}
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/* Check if channel is present */
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