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drm/i915/gt: Fix perf limit reasons bit positions 

Perf limit reasons bit positions were off by one.

Fixes: fa68bff7cf ("drm/i915/gt: Add sysfs throttle frequency interfaces")
Cc: stable@vger.kernel.org # v5.18+
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Acked-by: Andi Shyti <andi.shyti@linux.intel.com>
Reviewed-by: Sujaritha Sundaresan <sujaritha.sundaresan@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220908155821.1662110-1-ashutosh.dixit@intel.com
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
(cherry picked from commit 60017f34fc)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
This commit is contained in:
Ashutosh Dixit 2022-09-08 08:58:21 -07:00 committed by Rodrigo Vivi
parent aee5ae7c84
commit d654f60898
1 changed files with 8 additions and 8 deletions
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16
drivers/gpu/drm/i915/i915_reg.h
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@ -1857,14 +1857,14 @@
#define GT0_PERF_LIMIT_REASONS _MMIO(0x1381a8)
#define GT0_PERF_LIMIT_REASONS_MASK 0xde3
#define PROCHOT_MASK REG_BIT(1)
#define THERMAL_LIMIT_MASK REG_BIT(2)
#define RATL_MASK REG_BIT(6)
#define VR_THERMALERT_MASK REG_BIT(7)
#define VR_TDC_MASK REG_BIT(8)
#define POWER_LIMIT_4_MASK REG_BIT(9)
#define POWER_LIMIT_1_MASK REG_BIT(11)
#define POWER_LIMIT_2_MASK REG_BIT(12)
#define PROCHOT_MASK REG_BIT(0)
#define THERMAL_LIMIT_MASK REG_BIT(1)
#define RATL_MASK REG_BIT(5)
#define VR_THERMALERT_MASK REG_BIT(6)
#define VR_TDC_MASK REG_BIT(7)
#define POWER_LIMIT_4_MASK REG_BIT(8)
#define POWER_LIMIT_1_MASK REG_BIT(10)
#define POWER_LIMIT_2_MASK REG_BIT(11)
#define CHV_CLK_CTL1 _MMIO(0x101100)
#define VLV_CLK_CTL2 _MMIO(0x101104)