From 4dca1ca2d74a6d9626421431c0ec0390b361e51b Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 26 Sep 2022 11:21:04 +0200 Subject: [PATCH 001/102] ARM: dts: qcom: align RPM regulators node name with bindings Node names should be generic and new DT schema expects RPM regulators node to be just "regulators". Signed-off-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220926092104.111449-4-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/qcom-apq8026-asus-sparrow.dts | 2 +- arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts | 2 +- arch/arm/boot/dts/qcom-apq8074-dragonboard.dts | 4 ++-- arch/arm/boot/dts/qcom-apq8084.dtsi | 2 +- arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts | 4 ++-- arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine.dtsi | 4 ++-- arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts | 4 ++-- arch/arm/boot/dts/qcom-msm8974pro-samsung-klte.dts | 2 +- .../boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts | 2 +- 9 files changed, 13 insertions(+), 13 deletions(-) diff --git a/arch/arm/boot/dts/qcom-apq8026-asus-sparrow.dts b/arch/arm/boot/dts/qcom-apq8026-asus-sparrow.dts index 215613c65250..7a80e1c9f126 100644 --- a/arch/arm/boot/dts/qcom-apq8026-asus-sparrow.dts +++ b/arch/arm/boot/dts/qcom-apq8026-asus-sparrow.dts @@ -87,7 +87,7 @@ }; &rpm_requests { - pm8226-regulators { + regulators { compatible = "qcom,rpm-pm8226-regulators"; pm8226_s3: s3 { diff --git a/arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts b/arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts index 193569f0ca5f..061c02d1633e 100644 --- a/arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts +++ b/arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts @@ -115,7 +115,7 @@ }; &rpm_requests { - pm8226-regulators { + regulators { compatible = "qcom,rpm-pm8226-regulators"; pm8226_s3: s3 { diff --git a/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts index 91716298ec5e..3eb9275ec6d1 100644 --- a/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts +++ b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts @@ -58,7 +58,7 @@ }; &rpm_requests { - pm8841-regulators { + regulators-0 { compatible = "qcom,rpm-pm8841-regulators"; pm8841_s1: s1 { @@ -82,7 +82,7 @@ }; }; - pm8941-regulators { + regulators-1 { compatible = "qcom,rpm-pm8941-regulators"; vdd_l1_l3-supply = <&pm8941_s1>; diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi index f2fb7c975af8..3cc69af9f320 100644 --- a/arch/arm/boot/dts/qcom-apq8084.dtsi +++ b/arch/arm/boot/dts/qcom-apq8084.dtsi @@ -474,7 +474,7 @@ compatible = "qcom,rpm-apq8084"; qcom,smd-channels = "rpm_requests"; - pma8084-regulators { + regulators-0 { compatible = "qcom,rpm-pma8084-regulators"; pma8084_s1: s1 {}; diff --git a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts index 6daceaa87802..3d5d0f2e2d96 100644 --- a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts +++ b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts @@ -344,7 +344,7 @@ }; &rpm_requests { - pm8841-regulators { + regulators-0 { compatible = "qcom,rpm-pm8841-regulators"; pm8841_s1: s1 { @@ -368,7 +368,7 @@ }; }; - pm8941-regulators { + regulators-1 { compatible = "qcom,rpm-pm8941-regulators"; vdd_l1_l3-supply = <&pm8941_s1>; diff --git a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine.dtsi b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine.dtsi index 5a70683d9103..320c9bf397f8 100644 --- a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine.dtsi @@ -214,7 +214,7 @@ }; &rpm_requests { - pm8841-regulators { + regulators-0 { compatible = "qcom,rpm-pm8841-regulators"; pm8841_s1: s1 { @@ -238,7 +238,7 @@ }; }; - pm8941-regulators { + regulators-1 { compatible = "qcom,rpm-pm8941-regulators"; vdd_l1_l3-supply = <&pm8941_s1>; diff --git a/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts b/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts index ff6e0066768b..9107bc6f24db 100644 --- a/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts +++ b/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts @@ -190,7 +190,7 @@ }; &rpm_requests { - pm8841-regulators { + regulators-0 { compatible = "qcom,rpm-pm8841-regulators"; pm8841_s1: s1 { @@ -209,7 +209,7 @@ }; }; - pm8941-regulators { + regulators-1 { compatible = "qcom,rpm-pm8941-regulators"; vdd_l1_l3-supply = <&pm8941_s1>; diff --git a/arch/arm/boot/dts/qcom-msm8974pro-samsung-klte.dts b/arch/arm/boot/dts/qcom-msm8974pro-samsung-klte.dts index 983e10c3d863..156023204c1e 100644 --- a/arch/arm/boot/dts/qcom-msm8974pro-samsung-klte.dts +++ b/arch/arm/boot/dts/qcom-msm8974pro-samsung-klte.dts @@ -470,7 +470,7 @@ }; &rpm_requests { - pma8084-regulators { + regulators-0 { compatible = "qcom,rpm-pma8084-regulators"; pma8084_s1: s1 { diff --git a/arch/arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts b/arch/arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts index 3f45f5c5d37b..e4580ed996e6 100644 --- a/arch/arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts +++ b/arch/arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts @@ -319,7 +319,7 @@ }; &rpm_requests { - pm8941-regulators { + regulators-0 { compatible = "qcom,rpm-pm8941-regulators"; vdd_l1_l3-supply = <&pm8941_s1>; From 0139f183bcddcf5b36f805254bb0f0625963f783 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 6 Oct 2022 14:46:28 +0200 Subject: [PATCH 002/102] ARM: dts: qcom: sdx55: add gpio-ranges to TLMM pinctrl Add required gpio-ranges property to TLMM pinctrl node: qcom-sdx55-mtp.dtb: pinctrl@f100000: 'gpio-ranges' is a required property Signed-off-by: Krzysztof Kozlowski Reviewed-by: Bjorn Andersson Reviewed-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221006124659.217540-4-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/qcom-sdx55.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom-sdx55.dtsi index c72540223fa9..f1c0dab40992 100644 --- a/arch/arm/boot/dts/qcom-sdx55.dtsi +++ b/arch/arm/boot/dts/qcom-sdx55.dtsi @@ -559,6 +559,7 @@ #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + gpio-ranges = <&tlmm 0 0 109>; }; sram@1468f000 { From bda79af488a3e75769433fb961800c39bb07b29c Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 6 Oct 2022 14:46:29 +0200 Subject: [PATCH 003/102] ARM: dts: qcom: sdx55: align TLMM pin configuration with DT schema DT schema expects TLMM pin configuration nodes to be named with '-state' suffix and their optional children with '-pins' suffix. Schema also requires 'function' property, so two nodes for the same gpio (mux and config) should be merged into one. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Bjorn Andersson Reviewed-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221006124659.217540-5-krzysztof.kozlowski@linaro.org --- .../boot/dts/qcom-sdx55-telit-fn980-tlb.dts | 45 +++++++------------ 1 file changed, 15 insertions(+), 30 deletions(-) diff --git a/arch/arm/boot/dts/qcom-sdx55-telit-fn980-tlb.dts b/arch/arm/boot/dts/qcom-sdx55-telit-fn980-tlb.dts index a4fa468a095f..ac8b4626ae9a 100644 --- a/arch/arm/boot/dts/qcom-sdx55-telit-fn980-tlb.dts +++ b/arch/arm/boot/dts/qcom-sdx55-telit-fn980-tlb.dts @@ -282,40 +282,25 @@ }; &tlmm { - pcie_ep_clkreq_default: pcie_ep_clkreq_default { - mux { - pins = "gpio56"; - function = "pcie_clkreq"; - }; - config { - pins = "gpio56"; - drive-strength = <2>; - bias-disable; - }; + pcie_ep_clkreq_default: pcie-ep-clkreq-default-state { + pins = "gpio56"; + function = "pcie_clkreq"; + drive-strength = <2>; + bias-disable; }; - pcie_ep_perst_default: pcie_ep_perst_default { - mux { - pins = "gpio57"; - function = "gpio"; - }; - config { - pins = "gpio57"; - drive-strength = <2>; - bias-pull-down; - }; + pcie_ep_perst_default: pcie-ep-perst-default-state { + pins = "gpio57"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; }; - pcie_ep_wake_default: pcie_ep_wake_default { - mux { - pins = "gpio53"; - function = "gpio"; - }; - config { - pins = "gpio53"; - drive-strength = <2>; - bias-disable; - }; + pcie_ep_wake_default: pcie-ep-wake-default-state { + pins = "gpio53"; + function = "gpio"; + drive-strength = <2>; + bias-disable; }; }; From df9c86025510c45a6d90669347129e8000e1bbbc Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 6 Oct 2022 14:46:30 +0200 Subject: [PATCH 004/102] ARM: dts: qcom: msm8226: align TLMM pin configuration with DT schema DT schema expects TLMM pin configuration nodes to be named with '-state' suffix and their optional children with '-pins' suffix. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Bjorn Andersson Reviewed-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221006124659.217540-6-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts | 6 +++--- arch/arm/boot/dts/qcom-msm8226.dtsi | 24 ++++++++++----------- 2 files changed, 15 insertions(+), 15 deletions(-) diff --git a/arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts b/arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts index 061c02d1633e..682fbbcb71f2 100644 --- a/arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts +++ b/arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts @@ -299,8 +299,8 @@ input-enable; }; - touch_pins: touch { - irq { + touch_pins: touch-state { + irq-pins { pins = "gpio17"; function = "gpio"; @@ -309,7 +309,7 @@ input-enable; }; - reset { + reset-pins { pins = "gpio16"; function = "gpio"; diff --git a/arch/arm/boot/dts/qcom-msm8226.dtsi b/arch/arm/boot/dts/qcom-msm8226.dtsi index cf2d56929428..3b6e746a4af9 100644 --- a/arch/arm/boot/dts/qcom-msm8226.dtsi +++ b/arch/arm/boot/dts/qcom-msm8226.dtsi @@ -354,35 +354,35 @@ #interrupt-cells = <2>; interrupts = ; - blsp1_i2c1_pins: blsp1-i2c1 { + blsp1_i2c1_pins: blsp1-i2c1-state { pins = "gpio2", "gpio3"; function = "blsp_i2c1"; drive-strength = <2>; bias-disable; }; - blsp1_i2c2_pins: blsp1-i2c2 { + blsp1_i2c2_pins: blsp1-i2c2-state { pins = "gpio6", "gpio7"; function = "blsp_i2c2"; drive-strength = <2>; bias-disable; }; - blsp1_i2c3_pins: blsp1-i2c3 { + blsp1_i2c3_pins: blsp1-i2c3-state { pins = "gpio10", "gpio11"; function = "blsp_i2c3"; drive-strength = <2>; bias-disable; }; - blsp1_i2c4_pins: blsp1-i2c4 { + blsp1_i2c4_pins: blsp1-i2c4-state { pins = "gpio14", "gpio15"; function = "blsp_i2c4"; drive-strength = <2>; bias-disable; }; - blsp1_i2c5_pins: blsp1-i2c5 { + blsp1_i2c5_pins: blsp1-i2c5-state { pins = "gpio18", "gpio19"; function = "blsp_i2c5"; drive-strength = <2>; @@ -390,13 +390,13 @@ }; sdhc1_default_state: sdhc1-default-state { - clk { + clk-pins { pins = "sdc1_clk"; drive-strength = <10>; bias-disable; }; - cmd-data { + cmd-data-pins { pins = "sdc1_cmd", "sdc1_data"; drive-strength = <10>; bias-pull-up; @@ -404,13 +404,13 @@ }; sdhc2_default_state: sdhc2-default-state { - clk { + clk-pins { pins = "sdc2_clk"; drive-strength = <10>; bias-disable; }; - cmd-data { + cmd-data-pins { pins = "sdc2_cmd", "sdc2_data"; drive-strength = <10>; bias-pull-up; @@ -418,21 +418,21 @@ }; sdhc3_default_state: sdhc3-default-state { - clk { + clk-pins { pins = "gpio44"; function = "sdc3"; drive-strength = <8>; bias-disable; }; - cmd { + cmd-pins { pins = "gpio43"; function = "sdc3"; drive-strength = <8>; bias-pull-up; }; - data { + data-pins { pins = "gpio39", "gpio40", "gpio41", "gpio42"; function = "sdc3"; drive-strength = <8>; From 6cd72414abc7345e277fcab5e1c763c3a017dc6a Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 6 Oct 2022 14:46:31 +0200 Subject: [PATCH 005/102] ARM: dts: qcom: msm8974: align TLMM pin configuration with DT schema DT schema expects TLMM pin configuration nodes to be named with '-state' suffix and their optional children with '-pins' suffix. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Bjorn Andersson Reviewed-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221006124659.217540-7-krzysztof.kozlowski@linaro.org --- .../qcom-msm8974-lge-nexus5-hammerhead.dts | 30 +++++++++---------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts index 3d5d0f2e2d96..7c8ca5ffcbb3 100644 --- a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts +++ b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts @@ -573,43 +573,43 @@ }; &tlmm { - sdc1_on: sdc1-on { - clk { + sdc1_on: sdc1-on-state { + clk-pins { pins = "sdc1_clk"; drive-strength = <16>; bias-disable; }; - cmd-data { + cmd-data-pins { pins = "sdc1_cmd", "sdc1_data"; drive-strength = <10>; bias-pull-up; }; }; - sdc2_on: sdc2-on { - clk { + sdc2_on: sdc2-on-state { + clk-pins { pins = "sdc2_clk"; drive-strength = <6>; bias-disable; }; - cmd-data { + cmd-data-pins { pins = "sdc2_cmd", "sdc2_data"; drive-strength = <6>; bias-pull-up; }; }; - mpu6515_pin: mpu6515 { + mpu6515_pin: mpu6515-state { pins = "gpio73"; function = "gpio"; bias-disable; input-enable; }; - touch_pin: touch { - int { + touch_pin: touch-state { + int-pins { pins = "gpio5"; function = "gpio"; @@ -618,7 +618,7 @@ input-enable; }; - reset { + reset-pins { pins = "gpio8"; function = "gpio"; @@ -627,25 +627,25 @@ }; }; - panel_pin: panel { + panel_pin: panel-state { pins = "gpio12"; function = "mdp_vsync"; drive-strength = <2>; bias-disable; }; - bt_pin: bt { - hostwake { + bt_pin: bt-state { + hostwake-pins { pins = "gpio42"; function = "gpio"; }; - devwake { + devwake-pins { pins = "gpio62"; function = "gpio"; }; - shutdown { + shutdown-pins { pins = "gpio41"; function = "gpio"; }; From 9707fc66ab40c62b459cf83fa9a32c4b7f39dc0c Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Fri, 30 Sep 2022 21:52:14 +0300 Subject: [PATCH 006/102] ARM: dts: qcom: apq8064: disable HDMI nodes by default Disable HDMI nodes. Individual board can enable them if required. The only APQ8064 board that has working HDMI output is IFC6410, which enables these devices explicitly. Signed-off-by: Dmitry Baryshkov Reviewed-by: Neil Armstrong Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220930185236.867655-2-dmitry.baryshkov@linaro.org --- arch/arm/boot/dts/qcom-apq8064.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index 942aa2278355..829e197579b9 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -1470,6 +1470,8 @@ phys = <&hdmi_phy>; + status = "disabled"; + ports { #address-cells = <1>; #size-cells = <0>; @@ -1498,6 +1500,8 @@ clocks = <&mmcc HDMI_S_AHB_CLK>; clock-names = "slave_iface"; #phy-cells = <0>; + + status = "disabled"; }; mdp: mdp@5100000 { From 3c9c03cf5033f5a7d5f455f1223fa99f43799b1e Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Fri, 30 Sep 2022 21:52:15 +0300 Subject: [PATCH 007/102] ARM: dts: qcom: apq8064-ifc6410: use labels to patch device tree Use labels to add device-specific properties to DT nodes rather than duplicating SoC DT structure in the device DT. Signed-off-by: Dmitry Baryshkov Reviewed-by: Neil Armstrong Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220930185236.867655-3-dmitry.baryshkov@linaro.org --- arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 593 ++++++++++----------- arch/arm/boot/dts/qcom-apq8064.dtsi | 2 +- 2 files changed, 289 insertions(+), 306 deletions(-) diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts index a7f90217661b..50792f06855e 100644 --- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts @@ -58,109 +58,6 @@ }; soc { - pinctrl@800000 { - card_detect: card_detect { - mux { - pins = "gpio26"; - function = "gpio"; - bias-disable; - }; - }; - - pcie_pins: pcie_pinmux { - mux { - pins = "gpio27"; - function = "gpio"; - }; - conf { - pins = "gpio27"; - drive-strength = <12>; - bias-disable; - }; - }; - }; - - rpm@108000 { - regulators { - vin_lvs1_3_6-supply = <&pm8921_s4>; - vin_lvs2-supply = <&pm8921_s1>; - vin_lvs4_5_7-supply = <&pm8921_s4>; - - vdd_l1_l2_l12_l18-supply = <&pm8921_s4>; - vdd_l24-supply = <&pm8921_s1>; - vdd_l25-supply = <&pm8921_s1>; - vdd_l26-supply = <&pm8921_s7>; - vdd_l27-supply = <&pm8921_s7>; - vdd_l28-supply = <&pm8921_s7>; - - - /* Buck SMPS */ - s1 { - regulator-always-on; - regulator-min-microvolt = <1225000>; - regulator-max-microvolt = <1225000>; - qcom,switch-mode-frequency = <3200000>; - bias-pull-down; - }; - - s3 { - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1400000>; - qcom,switch-mode-frequency = <4800000>; - }; - - s4 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - qcom,switch-mode-frequency = <3200000>; - }; - - s7 { - regulator-min-microvolt = <1300000>; - regulator-max-microvolt = <1300000>; - qcom,switch-mode-frequency = <3200000>; - }; - - l3 { - regulator-min-microvolt = <3050000>; - regulator-max-microvolt = <3300000>; - bias-pull-down; - }; - - l4 { - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1800000>; - bias-pull-down; - }; - - l5 { - regulator-min-microvolt = <2750000>; - regulator-max-microvolt = <3000000>; - bias-pull-down; - }; - - l6 { - regulator-min-microvolt = <2950000>; - regulator-max-microvolt = <2950000>; - bias-pull-down; - }; - - l23 { - regulator-min-microvolt = <1700000>; - regulator-max-microvolt = <1900000>; - bias-pull-down; - }; - - lvs1 { - bias-pull-down; - }; - - lvs6 { - bias-pull-down; - }; - }; - }; - ext_3p3v: regulator-fixed@1 { compatible = "regulator-fixed"; regulator-min-microvolt = <3300000>; @@ -172,211 +69,297 @@ enable-active-high; regulator-boot-on; }; + }; +}; - gsbi3: gsbi@16200000 { - status = "okay"; - qcom,mode = ; - i2c@16280000 { - status = "okay"; - }; +&gsbi1 { + qcom,mode = ; + status = "okay"; +}; + +&gsbi1_i2c { + clock-frequency = <200000>; + status = "okay"; + + eeprom@52 { + compatible = "atmel,24c128"; + reg = <0x52>; + pagesize = <32>; + }; +}; + +&gsbi3 { + qcom,mode = ; + status = "okay"; +}; + +&gsbi3_i2c { + status = "okay"; +}; + +&gsbi4 { + qcom,mode = ; + status = "okay"; +}; + +/* CAM I2C MIPI-CSI connector */ +&gsbi4_i2c { + status = "okay"; +}; + +&gsbi5 { + qcom,mode = ; + status = "okay"; +}; + +&gsbi5_spi { + num-cs = <1>; + cs-gpios = <&tlmm_pinmux 53 0>; + status = "okay"; +}; + +&gsbi6 { + qcom,mode = ; + status = "okay"; +}; + +&gsbi6_serial { + pinctrl-names = "default"; + pinctrl-0 = <&gsbi6_uart_4pins>; + status = "okay"; +}; + +&gsbi7 { + qcom,mode = ; + status = "okay"; +}; + +&gsbi7_serial { + pinctrl-names = "default"; + pinctrl-0 = <&gsbi7_uart_2pins>; + status = "okay"; +}; + +&hdmi { + core-vdda-supply = <&pm8921_hdmi_switch>; + hpd-gpios = <&tlmm_pinmux 72 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&hdmi_in { + remote-endpoint = <&mdp_dtv_out>; +}; + +&hdmi_out { + remote-endpoint = <&hdmi_con>; +}; + +&hdmi_phy { + status = "okay"; + core-vdda-supply = <&pm8921_hdmi_switch>; +}; + +&mdp { + status = "okay"; +}; + +&mdp_dtv_out { + remote-endpoint = <&hdmi_in>; +}; + +&pcie { + status = "okay"; + vdda-supply = <&pm8921_s3>; + vdda_phy-supply = <&pm8921_lvs6>; + vdda_refclk-supply = <&ext_3p3v>; + pinctrl-0 = <&pcie_pins>; + pinctrl-names = "default"; + perst-gpios = <&tlmm_pinmux 27 GPIO_ACTIVE_LOW>; +}; + +&pm8921_gpio { + wlan_default_gpios: wlan-gpios-state { + pinconf { + pins = "gpio43"; + function = "normal"; + bias-disable; + power-source = ; }; + }; - gsbi@16300000 { - status = "okay"; - qcom,mode = ; - /* CAM I2C MIPI-CSI connector */ - i2c@16380000 { - status = "okay"; - }; - }; - - gsbi@12440000 { - status = "okay"; - qcom,mode = ; - - i2c@12460000 { - status = "okay"; - clock-frequency = <200000>; - - eeprom@52 { - compatible = "atmel,24c128"; - reg = <0x52>; - pagesize = <32>; - }; - }; - }; - - gsbi@1a200000 { - qcom,mode = ; - status = "okay"; - spi4: spi@1a280000 { - status = "okay"; - num-cs = <1>; - cs-gpios = <&tlmm_pinmux 53 0>; - }; - }; - - gsbi@16500000 { - status = "okay"; - qcom,mode = ; - - serial@16540000 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&gsbi6_uart_4pins>; - }; - }; - - gsbi@16600000 { - status = "okay"; - qcom,mode = ; - serial@16640000 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&gsbi7_uart_2pins>; - }; - }; - - sata_phy0: phy@1b400000 { - status = "okay"; - }; - - sata0: sata@29000000 { - status = "okay"; - target-supply = <&pm8921_s4>; - }; - - /* OTG */ - usb@12500000 { - status = "okay"; - dr_mode = "otg"; - ulpi { - phy { - v3p3-supply = <&pm8921_l3>; - v1p8-supply = <&pm8921_l4>; - }; - }; - }; - - usb@12520000 { - status = "okay"; - dr_mode = "host"; - ulpi { - phy { - v3p3-supply = <&pm8921_l3>; - v1p8-supply = <&pm8921_l23>; - }; - }; - }; - - usb@12530000 { - status = "okay"; - dr_mode = "host"; - ulpi { - phy { - v3p3-supply = <&pm8921_l3>; - v1p8-supply = <&pm8921_l23>; - }; - }; - }; - - pci@1b500000 { - status = "okay"; - vdda-supply = <&pm8921_s3>; - vdda_phy-supply = <&pm8921_lvs6>; - vdda_refclk-supply = <&ext_3p3v>; - pinctrl-0 = <&pcie_pins>; - pinctrl-names = "default"; - perst-gpios = <&tlmm_pinmux 27 GPIO_ACTIVE_LOW>; - }; - - qcom,ssbi@500000 { - pmic@0 { - gpio@150 { - wlan_default_gpios: wlan-gpios-state { - pinconf { - pins = "gpio43"; - function = "normal"; - bias-disable; - power-source = ; - }; - }; - - notify_led: nled-state { - pinconf { - pins = "gpio18"; - function = "normal"; - bias-disable; - power-source = ; - }; - }; - }; - }; - }; - - amba { - /* eMMC */ - sdcc1: mmc@12400000 { - status = "okay"; - vmmc-supply = <&pm8921_l5>; - vqmmc-supply = <&pm8921_s4>; - }; - - /* External micro SD card */ - sdcc3: mmc@12180000 { - status = "okay"; - vmmc-supply = <&pm8921_l6>; - pinctrl-names = "default"; - pinctrl-0 = <&card_detect>; - cd-gpios = <&tlmm_pinmux 26 GPIO_ACTIVE_LOW>; - }; - /* WLAN */ - sdcc4: mmc@121c0000 { - status = "okay"; - vmmc-supply = <&ext_3p3v>; - vqmmc-supply = <&pm8921_lvs1>; - mmc-pwrseq = <&sdcc4_pwrseq>; - }; - }; - - hdmi-tx@4a00000 { - status = "okay"; - - core-vdda-supply = <&pm8921_hdmi_switch>; - - hpd-gpios = <&tlmm_pinmux 72 GPIO_ACTIVE_HIGH>; - - ports { - port@0 { - endpoint { - remote-endpoint = <&mdp_dtv_out>; - }; - }; - - port@1 { - endpoint { - remote-endpoint = <&hdmi_con>; - }; - }; - }; - }; - - hdmi-phy@4a00400 { - status = "okay"; - - core-vdda-supply = <&pm8921_hdmi_switch>; - }; - - mdp@5100000 { - status = "okay"; - - ports { - port@3 { - endpoint { - remote-endpoint = <&hdmi_in>; - }; - }; - }; + notify_led: nled-state { + pinconf { + pins = "gpio18"; + function = "normal"; + bias-disable; + power-source = ; }; }; }; + +&rpm { + regulators { + vin_lvs1_3_6-supply = <&pm8921_s4>; + vin_lvs2-supply = <&pm8921_s1>; + vin_lvs4_5_7-supply = <&pm8921_s4>; + + vdd_l1_l2_l12_l18-supply = <&pm8921_s4>; + vdd_l24-supply = <&pm8921_s1>; + vdd_l25-supply = <&pm8921_s1>; + vdd_l26-supply = <&pm8921_s7>; + vdd_l27-supply = <&pm8921_s7>; + vdd_l28-supply = <&pm8921_s7>; + + + /* Buck SMPS */ + s1 { + regulator-always-on; + regulator-min-microvolt = <1225000>; + regulator-max-microvolt = <1225000>; + qcom,switch-mode-frequency = <3200000>; + bias-pull-down; + }; + + s3 { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1400000>; + qcom,switch-mode-frequency = <4800000>; + }; + + s4 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + qcom,switch-mode-frequency = <3200000>; + }; + + s7 { + regulator-min-microvolt = <1300000>; + regulator-max-microvolt = <1300000>; + qcom,switch-mode-frequency = <3200000>; + }; + + l3 { + regulator-min-microvolt = <3050000>; + regulator-max-microvolt = <3300000>; + bias-pull-down; + }; + + l4 { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1800000>; + bias-pull-down; + }; + + l5 { + regulator-min-microvolt = <2750000>; + regulator-max-microvolt = <3000000>; + bias-pull-down; + }; + + l6 { + regulator-min-microvolt = <2950000>; + regulator-max-microvolt = <2950000>; + bias-pull-down; + }; + + l23 { + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <1900000>; + bias-pull-down; + }; + + lvs1 { + bias-pull-down; + }; + + lvs6 { + bias-pull-down; + }; + }; +}; + +&sata_phy0 { + status = "okay"; +}; + +&sata0 { + target-supply = <&pm8921_s4>; + status = "okay"; +}; + +/* eMMC */ +&sdcc1 { + vmmc-supply = <&pm8921_l5>; + vqmmc-supply = <&pm8921_s4>; + status = "okay"; +}; + +/* External micro SD card */ +&sdcc3 { + vmmc-supply = <&pm8921_l6>; + pinctrl-names = "default"; + pinctrl-0 = <&card_detect>; + cd-gpios = <&tlmm_pinmux 26 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +/* WLAN */ +&sdcc4 { + vmmc-supply = <&ext_3p3v>; + vqmmc-supply = <&pm8921_lvs1>; + mmc-pwrseq = <&sdcc4_pwrseq>; + status = "okay"; +}; + +&tlmm_pinmux { + card_detect: card_detect { + mux { + pins = "gpio26"; + function = "gpio"; + bias-disable; + }; + }; + + pcie_pins: pcie_pinmux { + mux { + pins = "gpio27"; + function = "gpio"; + }; + conf { + pins = "gpio27"; + drive-strength = <12>; + bias-disable; + }; + }; +}; + +&usb_hs1_phy { + v3p3-supply = <&pm8921_l3>; + v1p8-supply = <&pm8921_l4>; +}; + +&usb_hs3_phy { + v3p3-supply = <&pm8921_l3>; + v1p8-supply = <&pm8921_l23>; +}; + +&usb_hs4_phy { + v3p3-supply = <&pm8921_l3>; + v1p8-supply = <&pm8921_l23>; +}; + +/* OTG */ +&usb1 { + dr_mode = "otg"; + status = "okay"; +}; + +&usb3 { + dr_mode = "host"; + status = "okay"; +}; + +&usb4 { + dr_mode = "host"; + status = "okay"; +}; diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index 829e197579b9..b6f1ef50fb1e 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -884,7 +884,7 @@ reg = <0x2011000 0x1000>; }; - rpm@108000 { + rpm: rpm@108000 { compatible = "qcom,rpm-apq8064"; reg = <0x108000 0x1000>; qcom,ipc = <&l2cc 0x8 2>; From 632546ad232761b65ffc8cca5499c6e8b6d67222 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Fri, 30 Sep 2022 21:52:16 +0300 Subject: [PATCH 008/102] ARM: dts: qcom: apq8064-ifc6410: pull ext-3p3v regulator from soc node The ext 3.3V regulator is not part of the SoC, so pull it from the SoC node. Signed-off-by: Dmitry Baryshkov Reviewed-by: Neil Armstrong Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220930185236.867655-4-dmitry.baryshkov@linaro.org --- arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 22 ++++++++++------------ 1 file changed, 10 insertions(+), 12 deletions(-) diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts index 50792f06855e..f718b37192e9 100644 --- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts @@ -57,18 +57,16 @@ }; }; - soc { - ext_3p3v: regulator-fixed@1 { - compatible = "regulator-fixed"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "ext_3p3v"; - regulator-type = "voltage"; - startup-delay-us = <0>; - gpio = <&tlmm_pinmux 77 GPIO_ACTIVE_HIGH>; - enable-active-high; - regulator-boot-on; - }; + ext_3p3v: regulator-ext-3p3v { + compatible = "regulator-fixed"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "ext_3p3v"; + regulator-type = "voltage"; + startup-delay-us = <0>; + gpio = <&tlmm_pinmux 77 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-boot-on; }; }; From 5564d5337f839a24439dda4dbd9477e52a0eeaf5 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Fri, 30 Sep 2022 21:52:17 +0300 Subject: [PATCH 009/102] ARM: dts: qcom: apq8064-ifc6410: fix user1 LED node name There are no address-cells for the gpio-leds child nodes, so rename led@1 node to led-user1. Signed-off-by: Dmitry Baryshkov Reviewed-by: Neil Armstrong Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220930185236.867655-5-dmitry.baryshkov@linaro.org --- arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts index f718b37192e9..610fb8d652c3 100644 --- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts @@ -38,7 +38,7 @@ pinctrl-names = "default"; pinctrl-0 = <¬ify_led>; - led@1 { + led-user1 { label = "apq8064:green:user1"; color = ; gpios = <&pm8921_gpio 18 GPIO_ACTIVE_HIGH>; From 36e9b3420768e2c883eaa443de53df167c589922 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Fri, 30 Sep 2022 21:52:18 +0300 Subject: [PATCH 010/102] ARM: dts: qcom: apq8064-ifc6410: pull SDCC pwrseq node up one level There are no need to add additional simple-bus nodes just to populate a single pwrseq device. Pull it up one level into /. While we are at it also fix node name replacing underscore with dash. Signed-off-by: Dmitry Baryshkov Reviewed-by: Neil Armstrong Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220930185236.867655-6-dmitry.baryshkov@linaro.org --- arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 18 +++++++----------- 1 file changed, 7 insertions(+), 11 deletions(-) diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts index 610fb8d652c3..96307550523a 100644 --- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts @@ -22,17 +22,6 @@ stdout-path = "serial0:115200n8"; }; - pwrseq { - compatible = "simple-bus"; - - sdcc4_pwrseq: sdcc4_pwrseq { - pinctrl-names = "default"; - pinctrl-0 = <&wlan_default_gpios>; - compatible = "mmc-pwrseq-simple"; - reset-gpios = <&pm8921_gpio 43 GPIO_ACTIVE_LOW>; - }; - }; - leds { compatible = "gpio-leds"; pinctrl-names = "default"; @@ -57,6 +46,13 @@ }; }; + sdcc4_pwrseq: pwrseq-sdcc4 { + pinctrl-names = "default"; + pinctrl-0 = <&wlan_default_gpios>; + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&pm8921_gpio 43 GPIO_ACTIVE_LOW>; + }; + ext_3p3v: regulator-ext-3p3v { compatible = "regulator-fixed"; regulator-min-microvolt = <3300000>; From 2aadb0e9835962fb1d4e0a214293b0592c5e8b70 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Fri, 30 Sep 2022 21:52:19 +0300 Subject: [PATCH 011/102] ARM: dts: qcom: apq8064-flo: use labels to patch device tree Use labels to add device-specific properties to DT nodes rather than duplicating SoC DT structure in the device DT. Signed-off-by: Dmitry Baryshkov Reviewed-by: Neil Armstrong Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220930185236.867655-7-dmitry.baryshkov@linaro.org --- .../boot/dts/qcom-apq8064-asus-nexus7-flo.dts | 557 +++++++++--------- 1 file changed, 273 insertions(+), 284 deletions(-) diff --git a/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts b/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts index fee278e32cb6..2c661bc51488 100644 --- a/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts +++ b/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts @@ -57,290 +57,6 @@ }; soc { - rpm@108000 { - regulators { - vdd_l1_l2_l12_l18-supply = <&pm8921_s4>; - vin_lvs1_3_6-supply = <&pm8921_s4>; - vin_lvs4_5_7-supply = <&pm8921_s4>; - - - vdd_l24-supply = <&pm8921_s1>; - vdd_l25-supply = <&pm8921_s1>; - vin_lvs2-supply = <&pm8921_s1>; - - vdd_l26-supply = <&pm8921_s7>; - vdd_l27-supply = <&pm8921_s7>; - vdd_l28-supply = <&pm8921_s7>; - - vdd_ncp-supply = <&pm8921_l6>; - - /* Buck SMPS */ - s1 { - regulator-always-on; - regulator-min-microvolt = <1225000>; - regulator-max-microvolt = <1225000>; - qcom,switch-mode-frequency = <3200000>; - bias-pull-down; - }; - - /* msm otg HSUSB_VDDCX */ - s3 { - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1150000>; - qcom,switch-mode-frequency = <4800000>; - }; - - /* - * msm_sdcc.1-sdc-vdd_io - * tabla2x-slim-CDC_VDDA_RX - * tabla2x-slim-CDC_VDDA_TX - * tabla2x-slim-CDC_VDD_CP - * tabla2x-slim-VDDIO_CDC - */ - s4 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - qcom,switch-mode-frequency = <3200000>; - regulator-always-on; - }; - - s7 { - regulator-min-microvolt = <1300000>; - regulator-max-microvolt = <1300000>; - qcom,switch-mode-frequency = <3200000>; - }; - - /* mipi_dsi.1-dsi1_pll_vdda */ - l2 { - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-always-on; - }; - - /* msm_otg-HSUSB_3p3 */ - l3 { - regulator-min-microvolt = <3075000>; - regulator-max-microvolt = <3075000>; - bias-pull-down; - }; - - /* msm_otg-HSUSB_1p8 */ - l4 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - bias-pull-down; - }; - - /* msm_sdcc.1-sdc_vdd */ - l5 { - regulator-min-microvolt = <2950000>; - regulator-max-microvolt = <2950000>; - regulator-always-on; - bias-pull-down; - }; - - l6 { - regulator-min-microvolt = <2950000>; - regulator-max-microvolt = <2950000>; - }; - - /* mipi_dsi.1-dsi1_avdd */ - l11 { - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - bias-pull-down; - regulator-always-on; - }; - - /* pwm_power for backlight */ - l17 { - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-always-on; - }; - - /* camera, qdsp6 */ - l23 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - bias-pull-down; - }; - - /* - * tabla2x-slim-CDC_VDDA_A_1P2V - * tabla2x-slim-VDDD_CDC_D - */ - l25 { - regulator-min-microvolt = <1250000>; - regulator-max-microvolt = <1250000>; - bias-pull-down; - }; - - lvs1 { - bias-pull-down; - }; - - lvs4 { - bias-pull-down; - }; - - lvs5 { - bias-pull-down; - }; - - lvs6 { - bias-pull-down; - }; - /* - * mipi_dsi.1-dsi1_vddio - * pil_riva-pll_vdd - */ - lvs7 { - bias-pull-down; - }; - }; - }; - - mdp@5100000 { - status = "okay"; - ports { - port@1 { - mdp_dsi1_out: endpoint { - remote-endpoint = <&dsi0_in>; - }; - }; - }; - }; - - dsi0: dsi@4700000 { - status = "okay"; - vdda-supply = <&pm8921_l2>;/*VDD_MIPI1 to 4*/ - vdd-supply = <&pm8921_l8>; - vddio-supply = <&pm8921_lvs7>; - avdd-supply = <&pm8921_l11>; - - panel@0 { - reg = <0>; - compatible = "jdi,lt070me05000"; - - vddp-supply = <&pm8921_l17>; - iovcc-supply = <&pm8921_lvs7>; - - enable-gpios = <&pm8921_gpio 36 GPIO_ACTIVE_HIGH>; - reset-gpios = <&tlmm_pinmux 54 GPIO_ACTIVE_LOW>; - dcdc-en-gpios = <&pm8921_gpio 23 GPIO_ACTIVE_HIGH>; - - port { - panel_in: endpoint { - remote-endpoint = <&dsi0_out>; - }; - }; - }; - ports { - port@0 { - dsi0_in: endpoint { - remote-endpoint = <&mdp_dsi1_out>; - }; - }; - - port@1 { - dsi0_out: endpoint { - remote-endpoint = <&panel_in>; - data-lanes = <0 1 2 3>; - }; - }; - }; - }; - - dsi-phy@4700200 { - status = "okay"; - vddio-supply = <&pm8921_lvs7>;/*VDD_PLL2_1 to 7*/ - }; - - gsbi@16200000 { - status = "okay"; - qcom,mode = ; - i2c@16280000 { - status = "okay"; - clock-frequency = <200000>; - pinctrl-0 = <&i2c3_pins>; - pinctrl-names = "default"; - - trackpad@10 { - compatible = "elan,ekth3500"; - reg = <0x10>; - interrupt-parent = <&tlmm_pinmux>; - interrupts = <6 IRQ_TYPE_EDGE_FALLING>; - }; - }; - }; - - - gsbi@12440000 { - status = "okay"; - qcom,mode = ; - - i2c@12460000 { - status = "okay"; - clock-frequency = <200000>; - pinctrl-0 = <&i2c1_pins>; - pinctrl-names = "default"; - - eeprom@52 { - compatible = "atmel,24c128"; - reg = <0x52>; - pagesize = <32>; - }; - - bq27541@55 { - compatible = "ti,bq27541"; - reg = <0x55>; - }; - - }; - }; - - gsbi@16500000 { - status = "okay"; - qcom,mode = ; - - serial@16540000 { - status = "okay"; - - pinctrl-names = "default"; - pinctrl-0 = <&gsbi6_uart_4pins>; - }; - }; - - gsbi@16600000 { - status = "okay"; - qcom,mode = ; - serial@16640000 { - status = "okay"; - }; - }; - - /* OTG */ - usb@12500000 { - status = "okay"; - dr_mode = "otg"; - ulpi { - phy { - v3p3-supply = <&pm8921_l3>; - v1p8-supply = <&pm8921_l4>; - }; - }; - }; - - amba { - /* eMMC */ - mmc@12400000 { - status = "okay"; - vmmc-supply = <&pm8921_l5>; - vqmmc-supply = <&pm8921_s4>; - }; - }; - sram@2a03f000 { compatible = "qcom,apq8064-imem", "syscon", "simple-mfd"; reg = <0x2a03f000 0x1000>; @@ -356,3 +72,276 @@ }; }; }; + +&dsi0 { + vdda-supply = <&pm8921_l2>;/*VDD_MIPI1 to 4*/ + vdd-supply = <&pm8921_l8>; + vddio-supply = <&pm8921_lvs7>; + avdd-supply = <&pm8921_l11>; + status = "okay"; + + panel@0 { + reg = <0>; + compatible = "jdi,lt070me05000"; + + vddp-supply = <&pm8921_l17>; + iovcc-supply = <&pm8921_lvs7>; + + enable-gpios = <&pm8921_gpio 36 GPIO_ACTIVE_HIGH>; + reset-gpios = <&tlmm_pinmux 54 GPIO_ACTIVE_LOW>; + dcdc-en-gpios = <&pm8921_gpio 23 GPIO_ACTIVE_HIGH>; + + port { + panel_in: endpoint { + remote-endpoint = <&dsi0_out>; + }; + }; + }; +}; + +&dsi0_in { + remote-endpoint = <&mdp_dsi1_out>; +}; + +&dsi0_out { + remote-endpoint = <&panel_in>; + data-lanes = <0 1 2 3>; +}; + +&dsi0_phy { + vddio-supply = <&pm8921_lvs7>;/*VDD_PLL2_1 to 7*/ + status = "okay"; +}; + +&gsbi1 { + qcom,mode = ; + status = "okay"; +}; + +&gsbi1_i2c { + status = "okay"; + clock-frequency = <200000>; + pinctrl-0 = <&i2c1_pins>; + pinctrl-names = "default"; + + eeprom@52 { + compatible = "atmel,24c128"; + reg = <0x52>; + pagesize = <32>; + }; + + bq27541@55 { + compatible = "ti,bq27541"; + reg = <0x55>; + }; + +}; + +&gsbi3 { + qcom,mode = ; + status = "okay"; +}; + +&gsbi3_i2c { + clock-frequency = <200000>; + pinctrl-0 = <&i2c3_pins>; + pinctrl-names = "default"; + status = "okay"; + + trackpad@10 { + compatible = "elan,ekth3500"; + reg = <0x10>; + interrupt-parent = <&tlmm_pinmux>; + interrupts = <6 IRQ_TYPE_EDGE_FALLING>; + }; +}; + +&gsbi6 { + qcom,mode = ; + status = "okay"; +}; + +&gsbi6_serial { + pinctrl-names = "default"; + pinctrl-0 = <&gsbi6_uart_4pins>; + status = "okay"; +}; + +&gsbi7 { + qcom,mode = ; + status = "okay"; +}; + +&gsbi7_serial { + status = "okay"; +}; + +&mdp { + status = "okay"; +}; + +/* eMMC */ +&sdcc1 { + vmmc-supply = <&pm8921_l5>; + vqmmc-supply = <&pm8921_s4>; + status = "okay"; +}; + +&mdp_dsi1_out { + remote-endpoint = <&dsi0_in>; +}; + +&rpm { + regulators { + vdd_l1_l2_l12_l18-supply = <&pm8921_s4>; + vin_lvs1_3_6-supply = <&pm8921_s4>; + vin_lvs4_5_7-supply = <&pm8921_s4>; + + + vdd_l24-supply = <&pm8921_s1>; + vdd_l25-supply = <&pm8921_s1>; + vin_lvs2-supply = <&pm8921_s1>; + + vdd_l26-supply = <&pm8921_s7>; + vdd_l27-supply = <&pm8921_s7>; + vdd_l28-supply = <&pm8921_s7>; + + vdd_ncp-supply = <&pm8921_l6>; + + /* Buck SMPS */ + s1 { + regulator-always-on; + regulator-min-microvolt = <1225000>; + regulator-max-microvolt = <1225000>; + qcom,switch-mode-frequency = <3200000>; + bias-pull-down; + }; + + /* msm otg HSUSB_VDDCX */ + s3 { + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1150000>; + qcom,switch-mode-frequency = <4800000>; + }; + + /* + * msm_sdcc.1-sdc-vdd_io + * tabla2x-slim-CDC_VDDA_RX + * tabla2x-slim-CDC_VDDA_TX + * tabla2x-slim-CDC_VDD_CP + * tabla2x-slim-VDDIO_CDC + */ + s4 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + qcom,switch-mode-frequency = <3200000>; + regulator-always-on; + }; + + s7 { + regulator-min-microvolt = <1300000>; + regulator-max-microvolt = <1300000>; + qcom,switch-mode-frequency = <3200000>; + }; + + /* mipi_dsi.1-dsi1_pll_vdda */ + l2 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + }; + + /* msm_otg-HSUSB_3p3 */ + l3 { + regulator-min-microvolt = <3075000>; + regulator-max-microvolt = <3075000>; + bias-pull-down; + }; + + /* msm_otg-HSUSB_1p8 */ + l4 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + bias-pull-down; + }; + + /* msm_sdcc.1-sdc_vdd */ + l5 { + regulator-min-microvolt = <2950000>; + regulator-max-microvolt = <2950000>; + regulator-always-on; + bias-pull-down; + }; + + l6 { + regulator-min-microvolt = <2950000>; + regulator-max-microvolt = <2950000>; + }; + + /* mipi_dsi.1-dsi1_avdd */ + l11 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + bias-pull-down; + regulator-always-on; + }; + + /* pwm_power for backlight */ + l17 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + }; + + /* camera, qdsp6 */ + l23 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + bias-pull-down; + }; + + /* + * tabla2x-slim-CDC_VDDA_A_1P2V + * tabla2x-slim-VDDD_CDC_D + */ + l25 { + regulator-min-microvolt = <1250000>; + regulator-max-microvolt = <1250000>; + bias-pull-down; + }; + + lvs1 { + bias-pull-down; + }; + + lvs4 { + bias-pull-down; + }; + + lvs5 { + bias-pull-down; + }; + + lvs6 { + bias-pull-down; + }; + /* + * mipi_dsi.1-dsi1_vddio + * pil_riva-pll_vdd + */ + lvs7 { + bias-pull-down; + }; + }; +}; + +&usb_hs1_phy { + v3p3-supply = <&pm8921_l3>; + v1p8-supply = <&pm8921_l4>; +}; + +/* OTG */ +&usb1 { + dr_mode = "otg"; + status = "okay"; +}; From 5998a762981ad77b44d4389b501a7c114d08a65e Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Fri, 30 Sep 2022 21:52:20 +0300 Subject: [PATCH 012/102] ARM: dts: qcom: apq8064-nexus7-flo: fix node name for ext 3p3v regulator Rename ext 3p3v regulator node, fixing the 'node has a unit name, but no reg or ranges property' warning. Signed-off-by: Dmitry Baryshkov Reviewed-by: Neil Armstrong Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220930185236.867655-8-dmitry.baryshkov@linaro.org --- arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts b/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts index 2c661bc51488..9c02dad9efc9 100644 --- a/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts +++ b/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts @@ -30,7 +30,7 @@ }; }; - ext_3p3v: regulator-fixed@1 { + ext_3p3v: regulator-ext-3p3v { compatible = "regulator-fixed"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; From efbc351abf4770a84e36b1c58ee76ba1cd699864 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Fri, 30 Sep 2022 21:52:21 +0300 Subject: [PATCH 013/102] ARM: dts: qcom: apq8064-cm-qs600: use labels to patch device tree Use labels to add device-specific properties to DT nodes rather than duplicating SoC DT structure in the device DT. Signed-off-by: Dmitry Baryshkov Reviewed-by: Neil Armstrong Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220930185236.867655-9-dmitry.baryshkov@linaro.org --- arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 392 ++++++++++---------- 1 file changed, 193 insertions(+), 199 deletions(-) diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts index 529629a0a9dc..65684da52e2e 100644 --- a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts +++ b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts @@ -30,160 +30,6 @@ }; soc { - pinctrl@800000 { - card_detect: card_detect { - mux { - pins = "gpio26"; - function = "gpio"; - bias-disable; - }; - }; - - pcie_pins: pcie_pinmux { - mux { - pins = "gpio27"; - function = "gpio"; - }; - conf { - pins = "gpio27"; - drive-strength = <12>; - bias-disable; - }; - }; - }; - - rpm@108000 { - regulators { - vin_lvs1_3_6-supply = <&pm8921_s4>; - vin_lvs2-supply = <&pm8921_s1>; - vin_lvs4_5_7-supply = <&pm8921_s4>; - - vdd_l1_l2_l12_l18-supply = <&pm8921_s4>; - vdd_l24-supply = <&pm8921_s1>; - vdd_l25-supply = <&pm8921_s1>; - vdd_l26-supply = <&pm8921_s7>; - vdd_l27-supply = <&pm8921_s7>; - vdd_l28-supply = <&pm8921_s7>; - - - /* Buck SMPS */ - s1 { - regulator-always-on; - regulator-min-microvolt = <1225000>; - regulator-max-microvolt = <1225000>; - qcom,switch-mode-frequency = <3200000>; - bias-pull-down; - }; - - s3 { - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1400000>; - qcom,switch-mode-frequency = <4800000>; - }; - - s4 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - qcom,switch-mode-frequency = <3200000>; - }; - - s7 { - regulator-min-microvolt = <1300000>; - regulator-max-microvolt = <1300000>; - qcom,switch-mode-frequency = <3200000>; - }; - - l3 { - regulator-min-microvolt = <3050000>; - regulator-max-microvolt = <3300000>; - bias-pull-down; - }; - - l4 { - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1800000>; - bias-pull-down; - }; - - l5 { - regulator-min-microvolt = <2750000>; - regulator-max-microvolt = <3000000>; - bias-pull-down; - }; - - l23 { - regulator-min-microvolt = <1700000>; - regulator-max-microvolt = <1900000>; - bias-pull-down; - }; - - pm8921_lvs6: lvs6 { - bias-pull-down; - }; - - }; - }; - - gsbi@12440000 { - status = "okay"; - qcom,mode = ; - - i2c@12460000 { - status = "okay"; - clock-frequency = <200000>; - - eeprom@50 { - compatible = "atmel,24c02"; - reg = <0x50>; - pagesize = <32>; - }; - }; - }; - - gsbi@16600000 { - status = "okay"; - qcom,mode = ; - serial@16640000 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&gsbi7_uart_2pins>; - }; - }; - - /* OTG */ - usb@12500000 { - status = "okay"; - dr_mode = "otg"; - ulpi { - phy { - v3p3-supply = <&pm8921_l3>; - v1p8-supply = <&pm8921_l4>; - }; - }; - }; - - usb@12520000 { - status = "okay"; - dr_mode = "host"; - ulpi { - phy { - v3p3-supply = <&pm8921_l3>; - v1p8-supply = <&pm8921_l23>; - }; - }; - }; - - usb@12530000 { - status = "okay"; - dr_mode = "host"; - ulpi { - phy { - v3p3-supply = <&pm8921_l3>; - v1p8-supply = <&pm8921_l23>; - }; - }; - }; - /* on board fixed 3.3v supply */ v3p3_fixed: v3p3 { compatible = "regulator-fixed"; @@ -193,54 +39,202 @@ regulator-always-on; }; - qcom,ssbi@500000 { - pmic@0 { - gpio@150 { - wlan_default_gpios: wlan-gpios-state { - pinconf { - pins = "gpio43"; - function = "normal"; - bias-disable; - power-source = ; - }; - }; - }; - }; - }; + }; +}; - pci@1b500000 { - status = "okay"; - vdda-supply = <&pm8921_s3>; - vdda_phy-supply = <&pm8921_lvs6>; - vdda_refclk-supply = <&v3p3_fixed>; - pinctrl-0 = <&pcie_pins>; - pinctrl-names = "default"; - perst-gpios = <&tlmm_pinmux 27 GPIO_ACTIVE_LOW>; - }; +&gsbi1 { + qcom,mode = ; + status = "okay"; +}; - amba { - /* eMMC */ - sdcc1: mmc@12400000 { - status = "okay"; - vmmc-supply = <&pm8921_l5>; - vqmmc-supply = <&pm8921_s4>; - }; +&gsbi1_i2c { + clock-frequency = <200000>; + status = "okay"; - /* External micro SD card */ - sdcc3: mmc@12180000 { - status = "okay"; - vmmc-supply = <&v3p3_fixed>; - pinctrl-names = "default"; - pinctrl-0 = <&card_detect>; - cd-gpios = <&tlmm_pinmux 26 GPIO_ACTIVE_LOW>; - }; - /* WLAN */ - sdcc4: mmc@121c0000 { - status = "okay"; - vmmc-supply = <&v3p3_fixed>; - vqmmc-supply = <&v3p3_fixed>; - mmc-pwrseq = <&sdcc4_pwrseq>; - }; + eeprom@50 { + compatible = "atmel,24c02"; + reg = <0x50>; + pagesize = <32>; + }; +}; + +&gsbi7 { + qcom,mode = ; + status = "okay"; +}; + +&gsbi7_serial { + pinctrl-names = "default"; + pinctrl-0 = <&gsbi7_uart_2pins>; + status = "okay"; +}; + +&pcie { + vdda-supply = <&pm8921_s3>; + vdda_phy-supply = <&pm8921_lvs6>; + vdda_refclk-supply = <&v3p3_fixed>; + pinctrl-0 = <&pcie_pins>; + pinctrl-names = "default"; + perst-gpios = <&tlmm_pinmux 27 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +&pm8921_gpio { + wlan_default_gpios: wlan-gpios-state { + pinconf { + pins = "gpio43"; + function = "normal"; + bias-disable; + power-source = ; }; }; }; + +&rpm { + regulators { + vin_lvs1_3_6-supply = <&pm8921_s4>; + vin_lvs2-supply = <&pm8921_s1>; + vin_lvs4_5_7-supply = <&pm8921_s4>; + + vdd_l1_l2_l12_l18-supply = <&pm8921_s4>; + vdd_l24-supply = <&pm8921_s1>; + vdd_l25-supply = <&pm8921_s1>; + vdd_l26-supply = <&pm8921_s7>; + vdd_l27-supply = <&pm8921_s7>; + vdd_l28-supply = <&pm8921_s7>; + + + /* Buck SMPS */ + s1 { + regulator-always-on; + regulator-min-microvolt = <1225000>; + regulator-max-microvolt = <1225000>; + qcom,switch-mode-frequency = <3200000>; + bias-pull-down; + }; + + s3 { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1400000>; + qcom,switch-mode-frequency = <4800000>; + }; + + s4 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + qcom,switch-mode-frequency = <3200000>; + }; + + s7 { + regulator-min-microvolt = <1300000>; + regulator-max-microvolt = <1300000>; + qcom,switch-mode-frequency = <3200000>; + }; + + l3 { + regulator-min-microvolt = <3050000>; + regulator-max-microvolt = <3300000>; + bias-pull-down; + }; + + l4 { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1800000>; + bias-pull-down; + }; + + l5 { + regulator-min-microvolt = <2750000>; + regulator-max-microvolt = <3000000>; + bias-pull-down; + }; + + l23 { + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <1900000>; + bias-pull-down; + }; + + lvs6 { + bias-pull-down; + }; + + }; +}; + +/* eMMC */ +&sdcc1 { + vmmc-supply = <&pm8921_l5>; + vqmmc-supply = <&pm8921_s4>; + status = "okay"; +}; + +/* External micro SD card */ +&sdcc3 { + vmmc-supply = <&v3p3_fixed>; + pinctrl-names = "default"; + pinctrl-0 = <&card_detect>; + cd-gpios = <&tlmm_pinmux 26 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +/* WLAN */ +&sdcc4 { + status = "okay"; + vmmc-supply = <&v3p3_fixed>; + vqmmc-supply = <&v3p3_fixed>; + mmc-pwrseq = <&sdcc4_pwrseq>; +}; + +&tlmm_pinmux { + card_detect: card_detect { + mux { + pins = "gpio26"; + function = "gpio"; + bias-disable; + }; + }; + + pcie_pins: pcie_pinmux { + mux { + pins = "gpio27"; + function = "gpio"; + }; + conf { + pins = "gpio27"; + drive-strength = <12>; + bias-disable; + }; + }; +}; + +&usb_hs1_phy { + v3p3-supply = <&pm8921_l3>; + v1p8-supply = <&pm8921_l4>; +}; + +&usb_hs3_phy { + v3p3-supply = <&pm8921_l3>; + v1p8-supply = <&pm8921_l23>; +}; + +&usb_hs4_phy { + v3p3-supply = <&pm8921_l3>; + v1p8-supply = <&pm8921_l23>; +}; + +/* OTG */ +&usb1 { + dr_mode = "otg"; + status = "okay"; +}; + +&usb3 { + dr_mode = "host"; + status = "okay"; +}; + +&usb4 { + dr_mode = "host"; + status = "okay"; +}; From 5586f54d62237580c58ca0d432a9d17c72fb650d Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Fri, 30 Sep 2022 21:52:22 +0300 Subject: [PATCH 014/102] ARM: dts: qcom: apq8064-cm-qs600: pull 3p3v regulator from soc node The 3.3V regulator is not part of the SoC, so pull it from the SoC node. Signed-off-by: Dmitry Baryshkov Reviewed-by: Neil Armstrong Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220930185236.867655-10-dmitry.baryshkov@linaro.org --- arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 17 +++++++---------- 1 file changed, 7 insertions(+), 10 deletions(-) diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts index 65684da52e2e..5ff0d9a275cc 100644 --- a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts +++ b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts @@ -29,16 +29,13 @@ }; }; - soc { - /* on board fixed 3.3v supply */ - v3p3_fixed: v3p3 { - compatible = "regulator-fixed"; - regulator-name = "PCIE V3P3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - + /* on board fixed 3.3v supply */ + v3p3_fixed: regulator-v3p3 { + compatible = "regulator-fixed"; + regulator-name = "PCIE V3P3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; }; }; From ab1605f45421a1ef112cc917dab8d3b3367813f8 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Fri, 30 Sep 2022 21:52:23 +0300 Subject: [PATCH 015/102] ARM: dts: qcom: apq8064-cm-qs600: pull SDCC pwrseq node up one level There are no need to add additional simple-bus nodes just to populate a single pwrseq device. Pull it up one level into /. While we are at it also fix node name replacing underscore with dash. Signed-off-by: Dmitry Baryshkov Reviewed-by: Neil Armstrong Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220930185236.867655-11-dmitry.baryshkov@linaro.org --- arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 17 +++++------------ 1 file changed, 5 insertions(+), 12 deletions(-) diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts index 5ff0d9a275cc..d6ecfd8addb7 100644 --- a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts +++ b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts @@ -15,18 +15,11 @@ stdout-path = "serial0:115200n8"; }; - pwrseq { - #address-cells = <1>; - #size-cells = <1>; - ranges; - compatible = "simple-bus"; - - sdcc4_pwrseq: sdcc4_pwrseq { - pinctrl-names = "default"; - pinctrl-0 = <&wlan_default_gpios>; - compatible = "mmc-pwrseq-simple"; - reset-gpios = <&pm8921_gpio 43 GPIO_ACTIVE_LOW>; - }; + sdcc4_pwrseq: pwrseq-sdcc4 { + pinctrl-names = "default"; + pinctrl-0 = <&wlan_default_gpios>; + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&pm8921_gpio 43 GPIO_ACTIVE_LOW>; }; /* on board fixed 3.3v supply */ From e10c147eb6ad997288b4ff33289791cf167336b6 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Fri, 30 Sep 2022 21:52:24 +0300 Subject: [PATCH 016/102] ARM: dts: qcom: apq8064-sony-xperia-lagan-yuga: use labels to patch device tree Use labels to add device-specific properties to DT nodes rather than duplicating SoC DT structure in the device DT. Signed-off-by: Dmitry Baryshkov Reviewed-by: Neil Armstrong Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220930185236.867655-12-dmitry.baryshkov@linaro.org --- .../qcom-apq8064-sony-xperia-lagan-yuga.dts | 641 +++++++++--------- 1 file changed, 314 insertions(+), 327 deletions(-) diff --git a/arch/arm/boot/dts/qcom-apq8064-sony-xperia-lagan-yuga.dts b/arch/arm/boot/dts/qcom-apq8064-sony-xperia-lagan-yuga.dts index c07c5474750d..796f47e5b610 100644 --- a/arch/arm/boot/dts/qcom-apq8064-sony-xperia-lagan-yuga.dts +++ b/arch/arm/boot/dts/qcom-apq8064-sony-xperia-lagan-yuga.dts @@ -51,351 +51,338 @@ linux,code = ; }; }; +}; - soc { - pinctrl@800000 { - gsbi5_uart_pin_a: gsbi5-uart-pin-active { - rx { - pins = "gpio52"; - function = "gsbi5"; - drive-strength = <2>; - bias-pull-up; - }; +&gsbi5 { + qcom,mode = ; + status = "okay"; +}; - tx { - pins = "gpio51"; - function = "gsbi5"; - drive-strength = <4>; - bias-disable; - }; - }; +&gsbi5_serial { + pinctrl-names = "default"; + pinctrl-0 = <&gsbi5_uart_pin_a>; + status = "okay"; +}; +&pm8921_gpio { + gpio_keys_pin_a: gpio-keys-active-state { + pins = "gpio3", "gpio4", "gpio29", "gpio35"; + function = "normal"; - sdcc3_cd_pin_a: sdcc3-cd-pin-active { - pins = "gpio26"; - function = "gpio"; + bias-pull-up; + drive-push-pull; + input-enable; + power-source = <2>; + qcom,drive-strength = ; + qcom,pull-up-strength = <0>; + }; +}; - drive-strength = <2>; - bias-disable; - }; +&riva { + pinctrl-names = "default"; + pinctrl-0 = <&riva_wlan_pin_a>, <&riva_bt_pin_a>, <&riva_fm_pin_a>; + status = "okay"; +}; + +&rpm { + regulators { + vin_l1_l2_l12_l18-supply = <&pm8921_s4>; + vin_lvs_1_3_6-supply = <&pm8921_s4>; + vin_lvs_4_5_7-supply = <&pm8921_s4>; + vin_ncp-supply = <&pm8921_l6>; + vin_lvs2-supply = <&pm8921_s4>; + vin_l24-supply = <&pm8921_s1>; + vin_l25-supply = <&pm8921_s1>; + vin_l27-supply = <&pm8921_s7>; + vin_l28-supply = <&pm8921_s7>; + + /* Buck SMPS */ + s1 { + regulator-always-on; + regulator-min-microvolt = <1225000>; + regulator-max-microvolt = <1225000>; + qcom,switch-mode-frequency = <3200000>; + bias-pull-down; }; - - rpm@108000 { - regulators { - vin_l1_l2_l12_l18-supply = <&pm8921_s4>; - vin_lvs_1_3_6-supply = <&pm8921_s4>; - vin_lvs_4_5_7-supply = <&pm8921_s4>; - vin_ncp-supply = <&pm8921_l6>; - vin_lvs2-supply = <&pm8921_s4>; - vin_l24-supply = <&pm8921_s1>; - vin_l25-supply = <&pm8921_s1>; - vin_l27-supply = <&pm8921_s7>; - vin_l28-supply = <&pm8921_s7>; - - /* Buck SMPS */ - s1 { - regulator-always-on; - regulator-min-microvolt = <1225000>; - regulator-max-microvolt = <1225000>; - qcom,switch-mode-frequency = <3200000>; - bias-pull-down; - }; - - s2 { - regulator-min-microvolt = <1300000>; - regulator-max-microvolt = <1300000>; - qcom,switch-mode-frequency = <1600000>; - bias-pull-down; - }; - - s3 { - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1150000>; - qcom,switch-mode-frequency = <4800000>; - bias-pull-down; - }; - - s4 { - regulator-always-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - qcom,switch-mode-frequency = <1600000>; - bias-pull-down; - qcom,force-mode = ; - }; - - s7 { - regulator-min-microvolt = <1300000>; - regulator-max-microvolt = <1300000>; - qcom,switch-mode-frequency = <3200000>; - }; - - s8 { - regulator-min-microvolt = <2200000>; - regulator-max-microvolt = <2200000>; - qcom,switch-mode-frequency = <1600000>; - }; - - /* PMOS LDO */ - l1 { - regulator-always-on; - regulator-min-microvolt = <1100000>; - regulator-max-microvolt = <1100000>; - bias-pull-down; - }; - - l2 { - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - bias-pull-down; - }; - - l3 { - regulator-min-microvolt = <3075000>; - regulator-max-microvolt = <3075000>; - bias-pull-down; - }; - - l4 { - regulator-always-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - bias-pull-down; - }; - - l5 { - regulator-min-microvolt = <2950000>; - regulator-max-microvolt = <2950000>; - bias-pull-down; - }; - - l6 { - regulator-min-microvolt = <2950000>; - regulator-max-microvolt = <2950000>; - bias-pull-down; - }; - - l7 { - regulator-min-microvolt = <1850000>; - regulator-max-microvolt = <2950000>; - bias-pull-down; - }; - - l8 { - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - bias-pull-down; - }; - - l9 { - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - bias-pull-down; - }; - - l10 { - regulator-min-microvolt = <2900000>; - regulator-max-microvolt = <2900000>; - bias-pull-down; - }; - - l11 { - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - bias-pull-down; - }; - - l12 { - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - bias-pull-down; - }; - - l14 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - bias-pull-down; - }; - - l15 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <2950000>; - bias-pull-down; - }; - - l16 { - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - bias-pull-down; - }; - - l17 { - regulator-min-microvolt = <2000000>; - regulator-max-microvolt = <2000000>; - bias-pull-down; - }; - - l18 { - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - bias-pull-down; - }; - - l21 { - regulator-min-microvolt = <1050000>; - regulator-max-microvolt = <1050000>; - bias-pull-down; - }; - - l22 { - regulator-min-microvolt = <2600000>; - regulator-max-microvolt = <2600000>; - bias-pull-down; - }; - - l23 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - bias-pull-down; - }; - - l24 { - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <1150000>; - bias-pull-down; - }; - - l25 { - regulator-always-on; - regulator-min-microvolt = <1250000>; - regulator-max-microvolt = <1250000>; - bias-pull-down; - }; - - l27 { - regulator-min-microvolt = <1100000>; - regulator-max-microvolt = <1100000>; - }; - - l28 { - regulator-min-microvolt = <1050000>; - regulator-max-microvolt = <1050000>; - bias-pull-down; - }; - - l29 { - regulator-min-microvolt = <2000000>; - regulator-max-microvolt = <2000000>; - bias-pull-down; - }; - - /* Low Voltage Switch */ - lvs1 { - bias-pull-down; - }; - - lvs2 { - bias-pull-down; - }; - - lvs3 { - bias-pull-down; - }; - - lvs4 { - bias-pull-down; - }; - - lvs5 { - bias-pull-down; - }; - - lvs6 { - bias-pull-down; - }; - - lvs7 { - bias-pull-down; - }; - - usb-switch {}; - - hdmi-switch {}; - - ncp { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - qcom,switch-mode-frequency = <1600000>; - }; - }; + s2 { + regulator-min-microvolt = <1300000>; + regulator-max-microvolt = <1300000>; + qcom,switch-mode-frequency = <1600000>; + bias-pull-down; }; - qcom,ssbi@500000 { - pmic@0 { - gpio@150 { - gpio_keys_pin_a: gpio-keys-active-state { - pins = "gpio3", "gpio4", "gpio29", "gpio35"; - function = "normal"; - - bias-pull-up; - drive-push-pull; - input-enable; - power-source = <2>; - qcom,drive-strength = ; - qcom,pull-up-strength = <0>; - }; - }; - }; + s3 { + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1150000>; + qcom,switch-mode-frequency = <4800000>; + bias-pull-down; }; - usb@12500000 { - status = "okay"; - dr_mode = "otg"; - ulpi { - phy { - v3p3-supply = <&pm8921_l3>; - v1p8-supply = <&pm8921_l4>; - }; - }; + s4 { + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + qcom,switch-mode-frequency = <1600000>; + bias-pull-down; + qcom,force-mode = ; }; - gsbi@1a200000 { - status = "okay"; - qcom,mode = ; - - serial@1a240000 { - status = "okay"; - - pinctrl-names = "default"; - pinctrl-0 = <&gsbi5_uart_pin_a>; - }; + s7 { + regulator-min-microvolt = <1300000>; + regulator-max-microvolt = <1300000>; + qcom,switch-mode-frequency = <3200000>; }; - amba { - sdcc1: mmc@12400000 { - status = "okay"; - - vmmc-supply = <&pm8921_l5>; - vqmmc-supply = <&pm8921_s4>; - }; - - sdcc3: mmc@12180000 { - status = "okay"; - - vmmc-supply = <&pm8921_l6>; - cd-gpios = <&tlmm_pinmux 26 GPIO_ACTIVE_LOW>; - - pinctrl-names = "default"; - pinctrl-0 = <&sdcc3_pins>, <&sdcc3_cd_pin_a>; - }; + s8 { + regulator-min-microvolt = <2200000>; + regulator-max-microvolt = <2200000>; + qcom,switch-mode-frequency = <1600000>; }; - riva-pil@3204000 { - status = "okay"; + /* PMOS LDO */ + l1 { + regulator-always-on; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + bias-pull-down; + }; - pinctrl-names = "default"; - pinctrl-0 = <&riva_wlan_pin_a>, <&riva_bt_pin_a>, <&riva_fm_pin_a>; + l2 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + bias-pull-down; + }; + + l3 { + regulator-min-microvolt = <3075000>; + regulator-max-microvolt = <3075000>; + bias-pull-down; + }; + + l4 { + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + bias-pull-down; + }; + + l5 { + regulator-min-microvolt = <2950000>; + regulator-max-microvolt = <2950000>; + bias-pull-down; + }; + + l6 { + regulator-min-microvolt = <2950000>; + regulator-max-microvolt = <2950000>; + bias-pull-down; + }; + + l7 { + regulator-min-microvolt = <1850000>; + regulator-max-microvolt = <2950000>; + bias-pull-down; + }; + + l8 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + bias-pull-down; + }; + + l9 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + bias-pull-down; + }; + + l10 { + regulator-min-microvolt = <2900000>; + regulator-max-microvolt = <2900000>; + bias-pull-down; + }; + + l11 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + bias-pull-down; + }; + + l12 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + bias-pull-down; + }; + + l14 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + bias-pull-down; + }; + + l15 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2950000>; + bias-pull-down; + }; + + l16 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + bias-pull-down; + }; + + l17 { + regulator-min-microvolt = <2000000>; + regulator-max-microvolt = <2000000>; + bias-pull-down; + }; + + l18 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + bias-pull-down; + }; + + l21 { + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + bias-pull-down; + }; + + l22 { + regulator-min-microvolt = <2600000>; + regulator-max-microvolt = <2600000>; + bias-pull-down; + }; + + l23 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + bias-pull-down; + }; + + l24 { + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1150000>; + bias-pull-down; + }; + + l25 { + regulator-always-on; + regulator-min-microvolt = <1250000>; + regulator-max-microvolt = <1250000>; + bias-pull-down; + }; + + l27 { + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + }; + + l28 { + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + bias-pull-down; + }; + + l29 { + regulator-min-microvolt = <2000000>; + regulator-max-microvolt = <2000000>; + bias-pull-down; + }; + + /* Low Voltage Switch */ + lvs1 { + bias-pull-down; + }; + + lvs2 { + bias-pull-down; + }; + + lvs3 { + bias-pull-down; + }; + + lvs4 { + bias-pull-down; + }; + + lvs5 { + bias-pull-down; + }; + + lvs6 { + bias-pull-down; + }; + + lvs7 { + bias-pull-down; + }; + + usb-switch {}; + + hdmi-switch {}; + + ncp { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + qcom,switch-mode-frequency = <1600000>; }; }; }; + +&sdcc1 { + vmmc-supply = <&pm8921_l5>; + vqmmc-supply = <&pm8921_s4>; + status = "okay"; +}; + +&sdcc3 { + vmmc-supply = <&pm8921_l6>; + cd-gpios = <&tlmm_pinmux 26 GPIO_ACTIVE_LOW>; + + pinctrl-names = "default"; + pinctrl-0 = <&sdcc3_pins>, <&sdcc3_cd_pin_a>; + + status = "okay"; +}; + +&tlmm_pinmux { + gsbi5_uart_pin_a: gsbi5-uart-pin-active { + rx { + pins = "gpio52"; + function = "gsbi5"; + drive-strength = <2>; + bias-pull-up; + }; + + tx { + pins = "gpio51"; + function = "gsbi5"; + drive-strength = <4>; + bias-disable; + }; + }; + + + sdcc3_cd_pin_a: sdcc3-cd-pin-active { + pins = "gpio26"; + function = "gpio"; + + drive-strength = <2>; + bias-disable; + }; +}; + +&usb_hs1_phy { + v3p3-supply = <&pm8921_l3>; + v1p8-supply = <&pm8921_l4>; +}; + +&usb1 { + dr_mode = "otg"; + status = "okay"; +}; From 967b4b52bfd1dc1490fa8a38a91df1a30a5c66ca Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Fri, 30 Sep 2022 21:52:25 +0300 Subject: [PATCH 017/102] ARM: dts: qcom: apq8064: drop amba device node The separate amba device node doesn't add anything significant to the DT. The OF parsing code already creates amba_device or platform_device depending on the compatibility lists. Drop the amba node and reorder sdcc and sdcc bam nodes according to node addresses. Signed-off-by: Dmitry Baryshkov Reviewed-by: Neil Armstrong Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220930185236.867655-13-dmitry.baryshkov@linaro.org --- arch/arm/boot/dts/qcom-apq8064.dtsi | 131 +++++++++++++--------------- 1 file changed, 62 insertions(+), 69 deletions(-) diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index b6f1ef50fb1e..34d3fce17351 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -1085,15 +1085,22 @@ ports-implemented = <0x1>; }; - /* Temporary fixed regulator */ - sdcc1bam: dma-controller@12402000{ - compatible = "qcom,bam-v1.3.0"; - reg = <0x12402000 0x8000>; - interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc SDC1_H_CLK>; - clock-names = "bam_clk"; - #dma-cells = <1>; - qcom,ee = <0>; + sdcc3: mmc@12180000 { + compatible = "arm,pl18x", "arm,primecell"; + arm,primecell-periphid = <0x00051180>; + status = "disabled"; + reg = <0x12180000 0x2000>; + interrupts = ; + interrupt-names = "cmd_irq"; + clocks = <&gcc SDC3_CLK>, <&gcc SDC3_H_CLK>; + clock-names = "mclk", "apb_pclk"; + bus-width = <4>; + cap-sd-highspeed; + cap-mmc-highspeed; + max-frequency = <192000000>; + no-1-8-v; + dmas = <&sdcc3bam 2>, <&sdcc3bam 1>; + dma-names = "tx", "rx"; }; sdcc3bam: dma-controller@12182000{ @@ -1106,6 +1113,25 @@ qcom,ee = <0>; }; + sdcc4: mmc@121c0000 { + compatible = "arm,pl18x", "arm,primecell"; + arm,primecell-periphid = <0x00051180>; + status = "disabled"; + reg = <0x121c0000 0x2000>; + interrupts = ; + interrupt-names = "cmd_irq"; + clocks = <&gcc SDC4_CLK>, <&gcc SDC4_H_CLK>; + clock-names = "mclk", "apb_pclk"; + bus-width = <4>; + cap-sd-highspeed; + cap-mmc-highspeed; + max-frequency = <48000000>; + dmas = <&sdcc4bam 2>, <&sdcc4bam 1>; + dma-names = "tx", "rx"; + pinctrl-names = "default"; + pinctrl-0 = <&sdc4_gpios>; + }; + sdcc4bam: dma-controller@121c2000{ compatible = "qcom,bam-v1.3.0"; reg = <0x121c2000 0x8000>; @@ -1116,67 +1142,34 @@ qcom,ee = <0>; }; - amba { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - sdcc1: mmc@12400000 { - status = "disabled"; - compatible = "arm,pl18x", "arm,primecell"; - pinctrl-names = "default"; - pinctrl-0 = <&sdcc1_pins>; - arm,primecell-periphid = <0x00051180>; - reg = <0x12400000 0x2000>; - interrupts = ; - interrupt-names = "cmd_irq"; - clocks = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>; - clock-names = "mclk", "apb_pclk"; - bus-width = <8>; - max-frequency = <96000000>; - non-removable; - cap-sd-highspeed; - cap-mmc-highspeed; - dmas = <&sdcc1bam 2>, <&sdcc1bam 1>; - dma-names = "tx", "rx"; - }; + sdcc1: mmc@12400000 { + status = "disabled"; + compatible = "arm,pl18x", "arm,primecell"; + pinctrl-names = "default"; + pinctrl-0 = <&sdcc1_pins>; + arm,primecell-periphid = <0x00051180>; + reg = <0x12400000 0x2000>; + interrupts = ; + interrupt-names = "cmd_irq"; + clocks = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>; + clock-names = "mclk", "apb_pclk"; + bus-width = <8>; + max-frequency = <96000000>; + non-removable; + cap-sd-highspeed; + cap-mmc-highspeed; + dmas = <&sdcc1bam 2>, <&sdcc1bam 1>; + dma-names = "tx", "rx"; + }; - sdcc3: mmc@12180000 { - compatible = "arm,pl18x", "arm,primecell"; - arm,primecell-periphid = <0x00051180>; - status = "disabled"; - reg = <0x12180000 0x2000>; - interrupts = ; - interrupt-names = "cmd_irq"; - clocks = <&gcc SDC3_CLK>, <&gcc SDC3_H_CLK>; - clock-names = "mclk", "apb_pclk"; - bus-width = <4>; - cap-sd-highspeed; - cap-mmc-highspeed; - max-frequency = <192000000>; - no-1-8-v; - dmas = <&sdcc3bam 2>, <&sdcc3bam 1>; - dma-names = "tx", "rx"; - }; - - sdcc4: mmc@121c0000 { - compatible = "arm,pl18x", "arm,primecell"; - arm,primecell-periphid = <0x00051180>; - status = "disabled"; - reg = <0x121c0000 0x2000>; - interrupts = ; - interrupt-names = "cmd_irq"; - clocks = <&gcc SDC4_CLK>, <&gcc SDC4_H_CLK>; - clock-names = "mclk", "apb_pclk"; - bus-width = <4>; - cap-sd-highspeed; - cap-mmc-highspeed; - max-frequency = <48000000>; - dmas = <&sdcc4bam 2>, <&sdcc4bam 1>; - dma-names = "tx", "rx"; - pinctrl-names = "default"; - pinctrl-0 = <&sdc4_gpios>; - }; + sdcc1bam: dma-controller@12402000{ + compatible = "qcom,bam-v1.3.0"; + reg = <0x12402000 0x8000>; + interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&gcc SDC1_H_CLK>; + clock-names = "bam_clk"; + #dma-cells = <1>; + qcom,ee = <0>; }; tcsr: syscon@1a400000 { From db259c5e5a995ed02028615d7d3fa85c7b9ae096 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Fri, 30 Sep 2022 21:52:26 +0300 Subject: [PATCH 018/102] ARM: dts: qcom: apq8064: drop unit ids from PMIC nodes On APQ8064 the PMICs are connected using SSBI devices, which do not have any addressing scheme. Drop the unused unit ids from PMIC device nodes. Signed-off-by: Dmitry Baryshkov Reviewed-by: Neil Armstrong Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220930185236.867655-14-dmitry.baryshkov@linaro.org --- arch/arm/boot/dts/qcom-apq8064.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index 34d3fce17351..6a8f3fd0fcc3 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -672,7 +672,7 @@ reg = <0x00c00000 0x1000>; qcom,controller-type = "pmic-arbiter"; - pm8821: pmic@1 { + pm8821: pmic { compatible = "qcom,pm8821"; interrupt-parent = <&tlmm_pinmux>; interrupts = <76 IRQ_TYPE_LEVEL_LOW>; @@ -698,7 +698,7 @@ reg = <0x00500000 0x1000>; qcom,controller-type = "pmic-arbiter"; - pmicintc: pmic@0 { + pmicintc: pmic { compatible = "qcom,pm8921"; interrupt-parent = <&tlmm_pinmux>; interrupts = <74 8>; From d36ee0683d86c66b5705de23ab8b3d466671de4f Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Fri, 30 Sep 2022 21:52:27 +0300 Subject: [PATCH 019/102] ARM: dts: qcom: apq8064: drop qcom, prefix from SSBI node name Signed-off-by: Dmitry Baryshkov Reviewed-by: Neil Armstrong Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220930185236.867655-15-dmitry.baryshkov@linaro.org --- arch/arm/boot/dts/qcom-apq8064.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index 6a8f3fd0fcc3..be4c82945c53 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -693,7 +693,7 @@ }; }; - qcom,ssbi@500000 { + ssbi@500000 { compatible = "qcom,ssbi"; reg = <0x00500000 0x1000>; qcom,controller-type = "pmic-arbiter"; From 8041a9be6f3862062d26d951d9f9c74823a76595 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Fri, 30 Sep 2022 21:52:28 +0300 Subject: [PATCH 020/102] ARM: dts: qcom: apq8064: fix the riva-pil node id Fix the address of the riva-pil node. The first region address is 0x3200800, so the node should also be called riva-pil@3200800. Signed-off-by: Dmitry Baryshkov Reviewed-by: Neil Armstrong Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220930185236.867655-16-dmitry.baryshkov@linaro.org --- arch/arm/boot/dts/qcom-apq8064.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index be4c82945c53..66f1e504a08e 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -1549,7 +1549,7 @@ }; }; - riva: riva-pil@3204000 { + riva: riva-pil@3200800 { compatible = "qcom,riva-pil"; reg = <0x03200800 0x1000>, <0x03202000 0x2000>, <0x03204000 0x100>; From 44c6b2c22bd350b4a2cd93367deed21adc6143c0 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Fri, 30 Sep 2022 21:52:29 +0300 Subject: [PATCH 021/102] ARM: dts: qcom: msm8960: drop unit ids from PMIC nodes On MSM8960 the PMICs are connected using SSBI devices, which do not have any addressing scheme. Drop the unused unit ids from PMIC device nodes. Signed-off-by: Dmitry Baryshkov Reviewed-by: Neil Armstrong Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220930185236.867655-17-dmitry.baryshkov@linaro.org --- arch/arm/boot/dts/qcom-msm8960.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom-msm8960.dtsi index c5740da3754c..64a3dcb5176c 100644 --- a/arch/arm/boot/dts/qcom-msm8960.dtsi +++ b/arch/arm/boot/dts/qcom-msm8960.dtsi @@ -252,7 +252,7 @@ reg = <0x500000 0x1000>; qcom,controller-type = "pmic-arbiter"; - pmicintc: pmic@0 { + pmicintc: pmic { compatible = "qcom,pm8921"; interrupt-parent = <&msmgpio>; interrupts = <104 8>; From 0ccc49d643d6d80126e6949def3f63f2586d43d8 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Fri, 30 Sep 2022 21:52:30 +0300 Subject: [PATCH 022/102] ARM: dts: qcom: msm8960: drop qcom, prefix from SSBI node name Signed-off-by: Dmitry Baryshkov Reviewed-by: Neil Armstrong Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220930185236.867655-18-dmitry.baryshkov@linaro.org --- arch/arm/boot/dts/qcom-msm8960.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom-msm8960.dtsi index 64a3dcb5176c..487ab9b8d23b 100644 --- a/arch/arm/boot/dts/qcom-msm8960.dtsi +++ b/arch/arm/boot/dts/qcom-msm8960.dtsi @@ -247,7 +247,7 @@ }; }; - qcom,ssbi@500000 { + ssbi@500000 { compatible = "qcom,ssbi"; reg = <0x500000 0x1000>; qcom,controller-type = "pmic-arbiter"; From e0fec2efd508e57e7370ee1cd89a60217ece5205 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Fri, 30 Sep 2022 21:52:31 +0300 Subject: [PATCH 023/102] ARM: dts: qcom: msm8960-cdp: drop unit ids from regulator node Drop the unused unit id from the gpio-regulator node, there is no addessing scheme in the /regulators node. Signed-off-by: Dmitry Baryshkov Reviewed-by: Neil Armstrong Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220930185236.867655-19-dmitry.baryshkov@linaro.org --- arch/arm/boot/dts/qcom-msm8960-cdp.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom-msm8960-cdp.dts b/arch/arm/boot/dts/qcom-msm8960-cdp.dts index 9157e3c4f48f..cb0f612e6c90 100644 --- a/arch/arm/boot/dts/qcom-msm8960-cdp.dts +++ b/arch/arm/boot/dts/qcom-msm8960-cdp.dts @@ -18,7 +18,7 @@ regulators { compatible = "simple-bus"; - ext_l2: gpio-regulator@91 { + ext_l2: gpio-regulator { compatible = "regulator-fixed"; regulator-name = "ext_l2"; gpio = <&msmgpio 91 0>; From 07573320d7df01914453e52307744f8011e9430e Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Fri, 30 Sep 2022 21:52:32 +0300 Subject: [PATCH 024/102] ARM: dts: qcom: msm8960: drop amba device node The separate amba device node doesn't add anything significant to the DT. The OF parsing code already creates amba_device or platform_device depending on the compatibility lists. Drop the amba node and reorder sdcc nodes according to node addresses. Signed-off-by: Dmitry Baryshkov Reviewed-by: Neil Armstrong Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220930185236.867655-20-dmitry.baryshkov@linaro.org --- arch/arm/boot/dts/qcom-msm8960.dtsi | 68 +++++++++++++---------------- 1 file changed, 31 insertions(+), 37 deletions(-) diff --git a/arch/arm/boot/dts/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom-msm8960.dtsi index 487ab9b8d23b..30abf53b062d 100644 --- a/arch/arm/boot/dts/qcom-msm8960.dtsi +++ b/arch/arm/boot/dts/qcom-msm8960.dtsi @@ -297,44 +297,38 @@ clock-names = "core"; }; - amba { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - sdcc1: mmc@12400000 { - status = "disabled"; - compatible = "arm,pl18x", "arm,primecell"; - arm,primecell-periphid = <0x00051180>; - reg = <0x12400000 0x8000>; - interrupts = ; - interrupt-names = "cmd_irq"; - clocks = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>; - clock-names = "mclk", "apb_pclk"; - bus-width = <8>; - max-frequency = <96000000>; - non-removable; - cap-sd-highspeed; - cap-mmc-highspeed; - vmmc-supply = <&vsdcc_fixed>; - }; + sdcc3: mmc@12180000 { + compatible = "arm,pl18x", "arm,primecell"; + arm,primecell-periphid = <0x00051180>; + status = "disabled"; + reg = <0x12180000 0x8000>; + interrupts = ; + interrupt-names = "cmd_irq"; + clocks = <&gcc SDC3_CLK>, <&gcc SDC3_H_CLK>; + clock-names = "mclk", "apb_pclk"; + bus-width = <4>; + cap-sd-highspeed; + cap-mmc-highspeed; + max-frequency = <192000000>; + no-1-8-v; + vmmc-supply = <&vsdcc_fixed>; + }; - sdcc3: mmc@12180000 { - compatible = "arm,pl18x", "arm,primecell"; - arm,primecell-periphid = <0x00051180>; - status = "disabled"; - reg = <0x12180000 0x8000>; - interrupts = ; - interrupt-names = "cmd_irq"; - clocks = <&gcc SDC3_CLK>, <&gcc SDC3_H_CLK>; - clock-names = "mclk", "apb_pclk"; - bus-width = <4>; - cap-sd-highspeed; - cap-mmc-highspeed; - max-frequency = <192000000>; - no-1-8-v; - vmmc-supply = <&vsdcc_fixed>; - }; + sdcc1: mmc@12400000 { + status = "disabled"; + compatible = "arm,pl18x", "arm,primecell"; + arm,primecell-periphid = <0x00051180>; + reg = <0x12400000 0x8000>; + interrupts = ; + interrupt-names = "cmd_irq"; + clocks = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>; + clock-names = "mclk", "apb_pclk"; + bus-width = <8>; + max-frequency = <96000000>; + non-removable; + cap-sd-highspeed; + cap-mmc-highspeed; + vmmc-supply = <&vsdcc_fixed>; }; tcsr: syscon@1a400000 { From cdaf1f11809257b8c5c1fe417c6e0764721b0cf3 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Fri, 30 Sep 2022 21:52:33 +0300 Subject: [PATCH 025/102] ARM: dts: qcom: msm8660: move pm8058 LED devices to the main DT file Declare PM8058 LED devices in the main msm8660 DT file to allow them to be used by other devices. Signed-off-by: Dmitry Baryshkov Reviewed-by: Neil Armstrong Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220930185236.867655-21-dmitry.baryshkov@linaro.org --- .../arm/boot/dts/qcom-apq8060-dragonboard.dts | 12 +++------ arch/arm/boot/dts/qcom-msm8660.dtsi | 26 ++++++++++++++++++- 2 files changed, 29 insertions(+), 9 deletions(-) diff --git a/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts b/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts index 573e4dc66bb0..dd409ff31e21 100644 --- a/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts +++ b/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts @@ -436,39 +436,35 @@ * ambient light and proximity sensor * Capella Microsystems CM3605. */ - compatible = "qcom,pm8058-keypad-led"; - reg = <0x48>; label = "pm8058:infrared:proximitysensor"; default-state = "off"; linux,default-trigger = "cm3605"; + status = "okay"; }; led@131 { - compatible = "qcom,pm8058-led"; - reg = <0x131>; label = "pm8058:red"; color = ; default-state = "off"; + status = "okay"; }; led@132 { /* * This is actually green too on my * board, but documented as yellow. */ - compatible = "qcom,pm8058-led"; - reg = <0x132>; label = "pm8058:yellow"; color = ; default-state = "off"; linux,default-trigger = "mmc0"; + status = "okay"; }; led@133 { - compatible = "qcom,pm8058-led"; - reg = <0x133>; label = "pm8058:green"; function = LED_FUNCTION_HEARTBEAT; color = ; default-state = "on"; linux,default-trigger = "heartbeat"; + status = "okay"; }; }; }; diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom-msm8660.dtsi index ddce7d64ba99..35e90d188e05 100644 --- a/arch/arm/boot/dts/qcom-msm8660.dtsi +++ b/arch/arm/boot/dts/qcom-msm8660.dtsi @@ -359,6 +359,12 @@ }; + pm8058_led48: led@48 { + compatible = "qcom,pm8058-keypad-led"; + reg = <0x48>; + status = "disabled"; + }; + pm8058_mpps: mpps@50 { compatible = "qcom,pm8058-mpp", "qcom,ssbi-mpp"; @@ -379,7 +385,25 @@ pull-up; }; - keypad@148 { + pm8058_led131: led@131 { + compatible = "qcom,pm8058-led"; + reg = <0x131>; + status = "disabled"; + }; + + pm8058_led132: led@132 { + compatible = "qcom,pm8058-led"; + reg = <0x132>; + status = "disabled"; + }; + + pm8058_led133: led@133 { + compatible = "qcom,pm8058-led"; + reg = <0x133>; + status = "disabled"; + }; + + pm8058_keypad: keypad@148 { compatible = "qcom,pm8058-keypad"; reg = <0x148>; interrupt-parent = <&pm8058>; From be60ae9be73fb6463a0687d4aa1fb40418faa3b2 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Fri, 30 Sep 2022 21:52:34 +0300 Subject: [PATCH 026/102] ARM: dts: qcom: apq8060-dragonboard: use labels to patch device tree Use labels to add device-specific properties to DT nodes rather than duplicating SoC DT structure in the device DT. Signed-off-by: Dmitry Baryshkov Reviewed-by: Neil Armstrong Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220930185236.867655-22-dmitry.baryshkov@linaro.org --- .../arm/boot/dts/qcom-apq8060-dragonboard.dts | 1798 ++++++++--------- arch/arm/boot/dts/qcom-msm8660.dtsi | 51 +- 2 files changed, 923 insertions(+), 926 deletions(-) diff --git a/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts b/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts index dd409ff31e21..0baf202a82ba 100644 --- a/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts +++ b/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts @@ -81,927 +81,923 @@ pinctrl-names = "default"; pinctrl-0 = <&dragon_cm3605_gpios>, <&dragon_cm3605_mpps>; }; +}; - soc { - pinctrl@800000 { - /* eMMC pins, all 8 data lines connected */ - dragon_sdcc1_pins: sdcc1 { - mux { - pins = "gpio159", "gpio160", "gpio161", - "gpio162", "gpio163", "gpio164", - "gpio165", "gpio166", "gpio167", - "gpio168"; - function = "sdc1"; - }; - clk { - pins = "gpio167"; /* SDC1 CLK */ - drive-strength = <16>; - bias-disable; - }; - cmd { - pins = "gpio168"; /* SDC1 CMD */ - drive-strength = <10>; - bias-pull-up; - }; - data { - /* SDC1 D0 to D7 */ - pins = "gpio159", "gpio160", "gpio161", "gpio162", - "gpio163", "gpio164", "gpio165", "gpio166"; - drive-strength = <10>; - bias-pull-up; - }; - }; +&ebi2 { + /* The EBI2 will instantiate first, then populate its children */ + pinctrl-names = "default"; + pinctrl-0 = <&dragon_ebi2_pins>; + status = "okay"; - /* - * The SDCC3 pins are hardcoded (non-muxable) but need some pin - * configuration. - */ - dragon_sdcc3_pins: sdcc3 { - clk { - pins = "sdc3_clk"; - drive-strength = <8>; - bias-disable; - }; - cmd { - pins = "sdc3_cmd"; - drive-strength = <8>; - bias-pull-up; - }; - data { - pins = "sdc3_data"; - drive-strength = <8>; - bias-pull-up; - }; - }; + /* + * An on-board SMSC LAN9221 chip for "debug ethernet", + * which is actually just an ordinary ethernet on the + * EBI2. This has a 25MHz chrystal next to it, so no + * clocking is needed. + */ + ethernet@2,0 { + compatible = "smsc,lan9221", "smsc,lan9115"; + reg = <2 0x0 0x100>; + /* + * The second interrupt is the PME interrupt + * for network wakeup, connected to the TLMM. + */ + interrupts-extended = <&pm8058_gpio 7 IRQ_TYPE_EDGE_FALLING>, + <&tlmm 29 IRQ_TYPE_EDGE_RISING>; + reset-gpios = <&tlmm 30 GPIO_ACTIVE_LOW>; + vdd33a-supply = <&dragon_veth>; + vddvario-supply = <&dragon_vario>; + pinctrl-names = "default"; + pinctrl-0 = <&dragon_ethernet_gpios>; + phy-mode = "mii"; + reg-io-width = <2>; + smsc,force-external-phy; + smsc,irq-push-pull; - /* Second SD card slot pins */ - dragon_sdcc5_pins: sdcc5 { - mux { - pins = "gpio95", "gpio96", "gpio97", - "gpio98", "gpio99", "gpio100"; - function = "sdc5"; - }; - clk { - pins = "gpio97"; /* SDC5 CLK */ - drive-strength = <16>; - bias-disable; - }; - cmd { - pins = "gpio95"; /* SDC5 CMD */ - drive-strength = <10>; - bias-pull-up; - }; - data { - /* SDC5 D0 to D3 */ - pins = "gpio96", "gpio98", "gpio99", "gpio100"; - drive-strength = <10>; - bias-pull-up; - }; - }; + /* + * SLOW chipselect config + * Delay 9 cycles (140ns@64MHz) between SMSC + * LAN9221 Ethernet controller reads and writes + * on CS2. + */ + qcom,xmem-recovery-cycles = <0>; + qcom,xmem-write-hold-cycles = <3>; + qcom,xmem-write-delta-cycles = <31>; + qcom,xmem-read-delta-cycles = <28>; + qcom,xmem-write-wait-cycles = <9>; + qcom,xmem-read-wait-cycles = <9>; + }; +}; - dragon_gsbi3_i2c_pins: gsbi3_i2c { - mux { - pins = "gpio43", "gpio44"; - function = "gsbi3"; - }; - pinconf { - pins = "gpio43", "gpio44"; - drive-strength = <8>; - /* These have external pull-up 2.2kOhm to 1.8V */ - bias-disable; - }; - }; +&gsbi3 { + qcom,mode = ; + status = "okay"; +}; - dragon_gsbi8_i2c_pins: gsbi8_i2c { - mux { - pins = "gpio64", "gpio65"; - function = "gsbi8"; - }; - pinconf { - pins = "gpio64", "gpio65"; - drive-strength = <16>; - /* These have external pull-up 2.2kOhm to 1.8V */ - bias-disable; - }; - }; +&gsbi3_i2c { + pinctrl-names = "default"; + pinctrl-0 = <&dragon_gsbi3_i2c_pins>; + status = "okay"; - dragon_gsbi12_i2c_pins: gsbi12_i2c { - mux { - pins = "gpio115", "gpio116"; - function = "gsbi12"; - }; - pinconf { - pins = "gpio115", "gpio116"; - drive-strength = <16>; - /* These have external pull-up 4.7kOhm to 1.8V */ - bias-disable; - }; - }; + touchscreen@24 { + compatible = "cypress,cy8ctma340"; + reg = <0x24>; + /* Certainly we can do at least 400 kHz */ + clock-frequency = <400000>; + /* IRQ on GPIO61 called /CTP_INT */ + interrupt-parent = <&tlmm>; + interrupts = <61 IRQ_TYPE_EDGE_FALLING>; + /* + * The I2C bus is using a PCA9306 level translator from L16A + * to L2B so these two voltages are needed and L16A is + * kind of the IO voltage, however L16Aisn't really fed to + * the TMA340, which relies entirely on L2B (PM8901 L2). + */ + vcpin-supply = <&pm8058_l16>; + vdd-supply = <&pm8901_l2>; + /* GPIO58, called WAKE_CTP */ + reset-gpios = <&tlmm 58 GPIO_ACTIVE_LOW>; + touchscreen-size-x = <480>; + touchscreen-size-y = <800>; + active-interval-ms = <0>; + touch-timeout-ms = <255>; + lowpower-interval-ms = <10>; + bootloader-key = /bits/ 8 <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07>; + pinctrl-names = "default"; + pinctrl-0 = <&dragon_tma340_gpios>; + }; +}; - /* Primary serial port uart 0 pins */ - dragon_gsbi12_serial_pins: gsbi12_serial { - mux { - pins = "gpio117", "gpio118"; - function = "gsbi12"; - }; - tx { - pins = "gpio117"; - drive-strength = <8>; - bias-disable; - }; - rx { - pins = "gpio118"; - drive-strength = <2>; - bias-pull-up; - }; - }; +&gsbi8 { + qcom,mode = ; + status = "okay"; +}; - dragon_ebi2_pins: ebi2 { - /* - * Pins used by EBI2 on the Dragonboard, actually only - * CS2 is used by a real peripheral. CS0 is just - * routed to a test point. - */ - mux0 { - pins = - /* "gpio39", CS1A_N this is not good to mux */ - "gpio40", /* CS2A_N */ - "gpio134"; /* CS0_N testpoint TP29 */ - function = "ebi2cs"; - }; - mux1 { - pins = - /* EBI2_ADDR_7 downto EBI2_ADDR_0 address bus */ - "gpio123", "gpio124", "gpio125", "gpio126", - "gpio127", "gpio128", "gpio129", "gpio130", - /* EBI2_DATA_15 downto EBI2_DATA_0 data bus */ - "gpio135", "gpio136", "gpio137", "gpio138", - "gpio139", "gpio140", "gpio141", "gpio142", - "gpio143", "gpio144", "gpio145", "gpio146", - "gpio147", "gpio148", "gpio149", "gpio150", - "gpio151", /* EBI2_OE_N */ - "gpio153", /* EBI2_ADV */ - "gpio157"; /* EBI2_WE_N */ - function = "ebi2"; - }; - }; +&gsbi8_i2c { + pinctrl-names = "default"; + pinctrl-0 = <&dragon_gsbi8_i2c_pins>; + status = "okay"; - /* Interrupt line for the KXSD9 accelerometer */ - dragon_kxsd9_gpios: kxsd9 { - irq { - pins = "gpio57"; /* IRQ line */ - bias-pull-up; - }; - }; + eeprom@52 { + /* A 16KiB Platform ID EEPROM on the CPU carrier board */ + compatible = "atmel,24c128"; + reg = <0x52>; + vcc-supply = <&pm8058_s3>; + pagesize = <64>; + }; + wm8903: wm8903@1a { + /* This Woolfson Micro device has an unrouted interrupt line */ + compatible = "wlf,wm8903"; + reg = <0x1a>; - dragon_tma340_gpios: tma340 { - reset { - /* RESET line, TS_ATTN, WAKE_CTP */ - pins = "gpio58"; - function = "gpio"; - drive-strength = <6>; - bias-disable; - }; - irq { - pins = "gpio61"; /* IRQ line */ - function = "gpio"; - drive-strength = <2>; - bias-pull-up; - }; - }; - }; + AVDD-supply = <&pm8058_l16>; + CPVDD-supply = <&pm8058_l16>; + DBVDD-supply = <&pm8058_s3>; + DCVDD-supply = <&pm8058_l0>; - qcom,ssbi@500000 { - pmic@0 { - keypad@148 { - linux,keymap = < - MATRIX_KEY(0, 0, KEY_MENU) - MATRIX_KEY(0, 2, KEY_1) - MATRIX_KEY(0, 3, KEY_4) - MATRIX_KEY(0, 4, KEY_7) - MATRIX_KEY(1, 0, KEY_UP) - MATRIX_KEY(1, 1, KEY_LEFT) - MATRIX_KEY(1, 2, KEY_DOWN) - MATRIX_KEY(1, 3, KEY_5) - MATRIX_KEY(1, 3, KEY_8) - MATRIX_KEY(2, 0, KEY_HOME) - MATRIX_KEY(2, 1, KEY_REPLY) - MATRIX_KEY(2, 2, KEY_2) - MATRIX_KEY(2, 3, KEY_6) - MATRIX_KEY(3, 0, KEY_VOLUMEUP) - MATRIX_KEY(3, 1, KEY_RIGHT) - MATRIX_KEY(3, 2, KEY_3) - MATRIX_KEY(3, 3, KEY_9) - MATRIX_KEY(3, 4, KEY_SWITCHVIDEOMODE) - MATRIX_KEY(4, 0, KEY_VOLUMEDOWN) - MATRIX_KEY(4, 1, KEY_BACK) - MATRIX_KEY(4, 2, KEY_CAMERA) - MATRIX_KEY(4, 3, KEY_KBDILLUMTOGGLE) - >; - keypad,num-rows = <6>; - keypad,num-columns = <5>; - }; + gpio-controller; + #gpio-cells = <2>; - gpio@150 { - dragon_ethernet_gpios: ethernet-state { - pinconf { - pins = "gpio7"; - function = "normal"; - input-enable; - bias-disable; - power-source = ; - }; - }; - dragon_bmp085_gpios: bmp085-state { - pinconf { - pins = "gpio16"; - function = "normal"; - input-enable; - bias-disable; - power-source = ; - }; - }; - dragon_mpu3050_gpios: mpu3050-state { - pinconf { - pins = "gpio17"; - function = "normal"; - input-enable; - bias-disable; - power-source = ; - }; - }; - dragon_sdcc3_gpios: sdcc3-state { - pinconf { - pins = "gpio22"; - function = "normal"; - input-enable; - bias-disable; - power-source = ; - }; - }; - dragon_sdcc5_gpios: sdcc5-state { - pinconf { - pins = "gpio26"; - function = "normal"; - input-enable; - bias-pull-up; - qcom,pull-up-strength = ; - power-source = ; - }; - }; - dragon_ak8975_gpios: ak8975-state { - pinconf { - pins = "gpio33"; - function = "normal"; - input-enable; - bias-disable; - power-source = ; - }; - }; - dragon_cm3605_gpios: cm3605-state { - /* Pin 34 connected to the proxy IRQ */ - gpio34-pins { - pins = "gpio34"; - function = "normal"; - input-enable; - bias-disable; - power-source = ; - }; - /* Pin 35 connected to ASET */ - gpio35-pins { - pins = "gpio35"; - function = "normal"; - output-high; - bias-disable; - power-source = ; - }; - }; - dragon_veth_gpios: veth-state { - pinconf { - pins = "gpio40"; - function = "normal"; - bias-disable; - drive-push-pull; - }; - }; - }; + micdet-cfg = <0>; + micdet-delay = <100>; + gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>; + }; +}; - mpps@50 { - dragon_cm3605_mpps: cm3605-mpps-state { - mpp5 { - pins = "mpp5"; - function = "analog"; - input-enable; - bias-high-impedance; - /* Let's use channel 5 */ - qcom,amux-route = ; - power-source = ; - }; - }; - }; +&gsbi12 { + qcom,mode = ; + status = "okay"; +}; - xoadc@197 { - /* Reference voltage 2.2 V */ - xoadc-ref-supply = <&pm8058_l18>; +&gsbi12_serial { + pinctrl-names = "default"; + pinctrl-0 = <&dragon_gsbi12_serial_pins>; + status = "okay"; +}; - /* Board-specific channels */ - mpp5@5 { - /* Connected to AOUT of ALS sensor */ - reg = <0x00 0x05>; - }; - mpp6@6 { - /* Connected to test point TP43 */ - reg = <0x00 0x06>; - }; - mpp7@7 { - /* Connected to battery thermistor */ - reg = <0x00 0x07>; - }; - mpp8@8 { - /* Connected to battery ID detector */ - reg = <0x00 0x08>; - }; - mpp9@9 { - /* Connected to XO thermistor */ - reg = <0x00 0x09>; - }; - }; +&gsbi12_i2c { + pinctrl-names = "default"; + pinctrl-0 = <&dragon_gsbi12_i2c_pins>; + status = "okay"; - led@48 { - /* - * The keypad LED @0x48 is routed to - * the sensor board where it is - * connected to an infrared LED - * SFH4650 (60mW, @850nm) next to the - * ambient light and proximity sensor - * Capella Microsystems CM3605. - */ - label = "pm8058:infrared:proximitysensor"; - default-state = "off"; - linux,default-trigger = "cm3605"; - status = "okay"; - }; - led@131 { - label = "pm8058:red"; - color = ; - default-state = "off"; - status = "okay"; - }; - led@132 { - /* - * This is actually green too on my - * board, but documented as yellow. - */ - label = "pm8058:yellow"; - color = ; - default-state = "off"; - linux,default-trigger = "mmc0"; - status = "okay"; - }; - led@133 { - label = "pm8058:green"; - function = LED_FUNCTION_HEARTBEAT; - color = ; - default-state = "on"; - linux,default-trigger = "heartbeat"; - status = "okay"; - }; - }; - }; + ak8975@c { + compatible = "asahi-kasei,ak8975"; + reg = <0x0c>; + interrupt-parent = <&pm8058_gpio>; + interrupts = <33 IRQ_TYPE_EDGE_RISING>; + pinctrl-names = "default"; + pinctrl-0 = <&dragon_ak8975_gpios>; + vid-supply = <&pm8058_lvs0>; // 1.8V + vdd-supply = <&pm8058_l14>; // 2.85V + }; + bmp085@77 { + compatible = "bosch,bmp085"; + reg = <0x77>; + interrupt-parent = <&pm8058_gpio>; + interrupts = <16 IRQ_TYPE_EDGE_RISING>; + reset-gpios = <&tlmm 86 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&dragon_bmp085_gpios>; + vddd-supply = <&pm8058_lvs0>; // 1.8V + vdda-supply = <&pm8058_l14>; // 2.85V + }; + mpu3050@68 { + compatible = "invensense,mpu3050"; + reg = <0x68>; + /* + * GPIO17 is pulled high by a 10k + * resistor to VLOGIC so needs to be + * active low/falling edge. + */ + interrupts-extended = <&pm8058_gpio 17 IRQ_TYPE_EDGE_FALLING>; + pinctrl-names = "default"; + pinctrl-0 = <&dragon_mpu3050_gpios>; + vlogic-supply = <&pm8058_lvs0>; // 1.8V + vdd-supply = <&pm8058_l14>; // 2.85V - gsbi@16200000 { - qcom,mode = ; - status = "okay"; + /* + * The MPU-3050 acts as a hub for the + * accelerometer. + */ + i2c-gate { + #address-cells = <1>; + #size-cells = <0>; - gsbi3_i2c: i2c@16280000 { + kxsd9@18 { + compatible = "kionix,kxsd9"; + reg = <0x18>; + interrupt-parent = <&tlmm>; + interrupts = <57 IRQ_TYPE_EDGE_FALLING>; pinctrl-names = "default"; - pinctrl-0 = <&dragon_gsbi3_i2c_pins>; - status = "okay"; - - touchscreen@24 { - compatible = "cypress,cy8ctma340"; - reg = <0x24>; - /* Certainly we can do at least 400 kHz */ - clock-frequency = <400000>; - /* IRQ on GPIO61 called /CTP_INT */ - interrupt-parent = <&tlmm>; - interrupts = <61 IRQ_TYPE_EDGE_FALLING>; - /* - * The I2C bus is using a PCA9306 level translator from L16A - * to L2B so these two voltages are needed and L16A is - * kind of the IO voltage, however L16Aisn't really fed to - * the TMA340, which relies entirely on L2B (PM8901 L2). - */ - vcpin-supply = <&pm8058_l16>; - vdd-supply = <&pm8901_l2>; - /* GPIO58, called WAKE_CTP */ - reset-gpios = <&tlmm 58 GPIO_ACTIVE_LOW>; - touchscreen-size-x = <480>; - touchscreen-size-y = <800>; - active-interval-ms = <0>; - touch-timeout-ms = <255>; - lowpower-interval-ms = <10>; - bootloader-key = /bits/ 8 <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07>; - pinctrl-names = "default"; - pinctrl-0 = <&dragon_tma340_gpios>; - }; - }; - }; - - gsbi@19800000 { - status = "okay"; - qcom,mode = ; - - i2c@19880000 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&dragon_gsbi8_i2c_pins>; - - eeprom@52 { - /* A 16KiB Platform ID EEPROM on the CPU carrier board */ - compatible = "atmel,24c128"; - reg = <0x52>; - vcc-supply = <&pm8058_s3>; - pagesize = <64>; - }; - wm8903: wm8903@1a { - /* This Woolfson Micro device has an unrouted interrupt line */ - compatible = "wlf,wm8903"; - reg = <0x1a>; - - AVDD-supply = <&pm8058_l16>; - CPVDD-supply = <&pm8058_l16>; - DBVDD-supply = <&pm8058_s3>; - DCVDD-supply = <&pm8058_l0>; - - gpio-controller; - #gpio-cells = <2>; - - micdet-cfg = <0>; - micdet-delay = <100>; - gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>; - }; - }; - }; - - gsbi@19c00000 { - status = "okay"; - qcom,mode = ; - - serial@19c40000 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&dragon_gsbi12_serial_pins>; - }; - - i2c@19c80000 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&dragon_gsbi12_i2c_pins>; - - ak8975@c { - compatible = "asahi-kasei,ak8975"; - reg = <0x0c>; - interrupt-parent = <&pm8058_gpio>; - interrupts = <33 IRQ_TYPE_EDGE_RISING>; - pinctrl-names = "default"; - pinctrl-0 = <&dragon_ak8975_gpios>; - vid-supply = <&pm8058_lvs0>; // 1.8V - vdd-supply = <&pm8058_l14>; // 2.85V - }; - bmp085@77 { - compatible = "bosch,bmp085"; - reg = <0x77>; - interrupt-parent = <&pm8058_gpio>; - interrupts = <16 IRQ_TYPE_EDGE_RISING>; - reset-gpios = <&tlmm 86 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&dragon_bmp085_gpios>; - vddd-supply = <&pm8058_lvs0>; // 1.8V - vdda-supply = <&pm8058_l14>; // 2.85V - }; - mpu3050@68 { - compatible = "invensense,mpu3050"; - reg = <0x68>; - /* - * GPIO17 is pulled high by a 10k - * resistor to VLOGIC so needs to be - * active low/falling edge. - */ - interrupts-extended = <&pm8058_gpio 17 IRQ_TYPE_EDGE_FALLING>; - pinctrl-names = "default"; - pinctrl-0 = <&dragon_mpu3050_gpios>; - vlogic-supply = <&pm8058_lvs0>; // 1.8V - vdd-supply = <&pm8058_l14>; // 2.85V - - /* - * The MPU-3050 acts as a hub for the - * accelerometer. - */ - i2c-gate { - #address-cells = <1>; - #size-cells = <0>; - - kxsd9@18 { - compatible = "kionix,kxsd9"; - reg = <0x18>; - interrupt-parent = <&tlmm>; - interrupts = <57 IRQ_TYPE_EDGE_FALLING>; - pinctrl-names = "default"; - pinctrl-0 = <&dragon_kxsd9_gpios>; - iovdd-supply = <&pm8058_lvs0>; // 1.8V - vdd-supply = <&pm8058_l14>; // 2.85V - }; - }; - }; - }; - }; - - external-bus@1a100000 { - /* The EBI2 will instantiate first, then populate its children */ - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&dragon_ebi2_pins>; - - /* - * An on-board SMSC LAN9221 chip for "debug ethernet", - * which is actually just an ordinary ethernet on the - * EBI2. This has a 25MHz chrystal next to it, so no - * clocking is needed. - */ - ethernet@2,0 { - compatible = "smsc,lan9221", "smsc,lan9115"; - reg = <2 0x0 0x100>; - /* - * The second interrupt is the PME interrupt - * for network wakeup, connected to the TLMM. - */ - interrupts-extended = <&pm8058_gpio 7 IRQ_TYPE_EDGE_FALLING>, - <&tlmm 29 IRQ_TYPE_EDGE_RISING>; - reset-gpios = <&tlmm 30 GPIO_ACTIVE_LOW>; - vdd33a-supply = <&dragon_veth>; - vddvario-supply = <&dragon_vario>; - pinctrl-names = "default"; - pinctrl-0 = <&dragon_ethernet_gpios>; - phy-mode = "mii"; - reg-io-width = <2>; - smsc,force-external-phy; - smsc,irq-push-pull; - - /* - * SLOW chipselect config - * Delay 9 cycles (140ns@64MHz) between SMSC - * LAN9221 Ethernet controller reads and writes - * on CS2. - */ - qcom,xmem-recovery-cycles = <0>; - qcom,xmem-write-hold-cycles = <3>; - qcom,xmem-write-delta-cycles = <31>; - qcom,xmem-read-delta-cycles = <28>; - qcom,xmem-write-wait-cycles = <9>; - qcom,xmem-read-wait-cycles = <9>; - }; - }; - - rpm@104000 { - /* - * Set up of the PMIC RPM regulators for this board - * PM8901 supplies "preliminary regulators" whatever - * that means - */ - pm8901-regulators { - vdd_l0-supply = <&pm8901_s4>; - vdd_l1-supply = <&vph>; - vdd_l2-supply = <&vph>; - vdd_l3-supply = <&vph>; - vdd_l4-supply = <&vph>; - vdd_l5-supply = <&vph>; - vdd_l6-supply = <&vph>; - /* vdd_s0-supply, vdd_s1-supply: SAW regulators */ - vdd_s2-supply = <&vph>; - vdd_s3-supply = <&vph>; - vdd_s4-supply = <&vph>; - lvs0_in-supply = <&pm8058_s3>; - lvs1_in-supply = <&pm8901_s4>; - lvs2_in-supply = <&pm8058_l0>; - lvs3_in-supply = <&pm8058_s2>; - mvs_in-supply = <&pm8058_s3>; - - l0 { - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - bias-pull-down; - }; - l1 { - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - bias-pull-down; - }; - l2 { - /* TMA340 requires strictly 3.3V */ - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - bias-pull-down; - }; - l3 { - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - bias-pull-down; - }; - l4 { - regulator-min-microvolt = <2600000>; - regulator-max-microvolt = <2600000>; - bias-pull-down; - }; - l5 { - regulator-min-microvolt = <2850000>; - regulator-max-microvolt = <2850000>; - bias-pull-down; - }; - l6 { - regulator-min-microvolt = <2200000>; - regulator-max-microvolt = <2200000>; - bias-pull-down; - }; - - /* s0 and s1 are SAW regulators controlled over SPM */ - s2 { - regulator-min-microvolt = <1300000>; - regulator-max-microvolt = <1300000>; - qcom,switch-mode-frequency = <1600000>; - bias-pull-down; - }; - s3 { - regulator-min-microvolt = <1100000>; - regulator-max-microvolt = <1100000>; - qcom,switch-mode-frequency = <1600000>; - bias-pull-down; - }; - s4 { - regulator-min-microvolt = <1225000>; - regulator-max-microvolt = <1225000>; - qcom,switch-mode-frequency = <1600000>; - bias-pull-down; - }; - - /* LVS0 thru 3 and mvs are just switches */ - lvs0 { - regulator-always-on; - }; - lvs1 { }; - lvs2 { }; - lvs3 { }; - mvs { }; - - }; - - pm8058-regulators { - vdd_l0_l1_lvs-supply = <&pm8058_s3>; - vdd_l2_l11_l12-supply = <&vph>; - vdd_l3_l4_l5-supply = <&vph>; - vdd_l6_l7-supply = <&vph>; - vdd_l8-supply = <&vph>; - vdd_l9-supply = <&vph>; - vdd_l10-supply = <&vph>; - vdd_l13_l16-supply = <&pm8058_s4>; - vdd_l14_l15-supply = <&vph>; - vdd_l17_l18-supply = <&vph>; - vdd_l19_l20-supply = <&vph>; - vdd_l21-supply = <&pm8058_s3>; - vdd_l22-supply = <&pm8058_s3>; - vdd_l23_l24_l25-supply = <&pm8058_s3>; - vdd_s0-supply = <&vph>; - vdd_s1-supply = <&vph>; - vdd_s2-supply = <&vph>; - vdd_s3-supply = <&vph>; - vdd_s4-supply = <&vph>; - vdd_ncp-supply = <&vph>; - - l0 { - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - bias-pull-down; - }; - l1 { - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - bias-pull-down; - }; - l2 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <2600000>; - bias-pull-down; - }; - l3 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - bias-pull-down; - }; - l4 { - regulator-min-microvolt = <2850000>; - regulator-max-microvolt = <2850000>; - bias-pull-down; - }; - l5 { - regulator-min-microvolt = <2850000>; - regulator-max-microvolt = <2850000>; - bias-pull-down; - }; - l6 { - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3600000>; - bias-pull-down; - }; - l7 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - bias-pull-down; - }; - l8 { - regulator-min-microvolt = <2900000>; - regulator-max-microvolt = <3050000>; - bias-pull-down; - }; - l9 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - bias-pull-down; - }; - l10 { - regulator-min-microvolt = <2600000>; - regulator-max-microvolt = <2600000>; - bias-pull-down; - }; - l11 { - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; - bias-pull-down; - }; - l12 { - regulator-min-microvolt = <2900000>; - regulator-max-microvolt = <2900000>; - bias-pull-down; - }; - l13 { - regulator-min-microvolt = <2050000>; - regulator-max-microvolt = <2050000>; - bias-pull-down; - }; - l14 { - regulator-min-microvolt = <2850000>; - regulator-max-microvolt = <2850000>; - }; - l15 { - regulator-min-microvolt = <2850000>; - regulator-max-microvolt = <2850000>; - bias-pull-down; - }; - l16 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - bias-pull-down; - regulator-always-on; - }; - l17 { - // 1.5V according to schematic - regulator-min-microvolt = <2600000>; - regulator-max-microvolt = <2600000>; - bias-pull-down; - }; - l18 { - regulator-min-microvolt = <2200000>; - regulator-max-microvolt = <2200000>; - bias-pull-down; - }; - l19 { - regulator-min-microvolt = <2500000>; - regulator-max-microvolt = <2500000>; - bias-pull-down; - }; - l20 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - bias-pull-down; - }; - l21 { - // 1.1 V according to schematic - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - bias-pull-down; - regulator-always-on; - }; - l22 { - // 1.2 V according to schematic - regulator-min-microvolt = <1150000>; - regulator-max-microvolt = <1150000>; - bias-pull-down; - }; - l23 { - // Unused - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - bias-pull-down; - }; - l24 { - // Unused - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - bias-pull-down; - }; - l25 { - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - bias-pull-down; - }; - - s0 { - // regulator-min-microvolt = <500000>; - // regulator-max-microvolt = <1325000>; - regulator-min-microvolt = <1100000>; - regulator-max-microvolt = <1100000>; - qcom,switch-mode-frequency = <1600000>; - bias-pull-down; - }; - s1 { - // regulator-min-microvolt = <500000>; - // regulator-max-microvolt = <1250000>; - regulator-min-microvolt = <1100000>; - regulator-max-microvolt = <1100000>; - qcom,switch-mode-frequency = <1600000>; - bias-pull-down; - }; - s2 { - // 1.3 V according to schematic - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1400000>; - qcom,switch-mode-frequency = <1600000>; - bias-pull-down; - }; - s3 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - qcom,switch-mode-frequency = <1600000>; - regulator-always-on; - bias-pull-down; - }; - s4 { - regulator-min-microvolt = <2200000>; - regulator-max-microvolt = <2200000>; - qcom,switch-mode-frequency = <1600000>; - regulator-always-on; - bias-pull-down; - }; - - /* LVS0 and LVS1 are just switches */ - lvs0 { - bias-pull-down; - }; - lvs1 { - bias-pull-down; - }; - - ncp { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - qcom,switch-mode-frequency = <1600000>; - }; - }; - }; - amba { - /* Internal 3.69 GiB eMMC */ - mmc@12400000 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&dragon_sdcc1_pins>; - vmmc-supply = <&pm8901_l5>; - vqmmc-supply = <&pm8901_lvs0>; - }; - - /* External micro SD card, directly connected, pulled up to 2.85 V */ - mmc@12180000 { - status = "okay"; - /* Enable SSBI GPIO 22 as input, use for card detect */ - pinctrl-names = "default"; - pinctrl-0 = <&dragon_sdcc3_pins>, <&dragon_sdcc3_gpios>; - cd-gpios = <&pm8058_gpio 22 GPIO_ACTIVE_LOW>; - wp-gpios = <&tlmm 110 GPIO_ACTIVE_HIGH>; - vmmc-supply = <&pm8058_l14>; - }; - - /* - * Second external micro SD card, using two TXB104RGYR levelshifters - * to lift from 1.8 V to 2.85 V - */ - mmc@12200000 { - status = "okay"; - /* Enable SSBI GPIO 26 as input, use for card detect */ - pinctrl-names = "default"; - pinctrl-0 = <&dragon_sdcc5_pins>, <&dragon_sdcc5_gpios>; - cd-gpios = <&pm8058_gpio 26 GPIO_ACTIVE_LOW>; - wp-gpios = <&tlmm 106 GPIO_ACTIVE_HIGH>; - vmmc-supply = <&pm8058_l14>; - vqmmc-supply = <&dragon_vio_txb>; + pinctrl-0 = <&dragon_kxsd9_gpios>; + iovdd-supply = <&pm8058_lvs0>; // 1.8V + vdd-supply = <&pm8058_l14>; // 2.85V }; }; }; }; + +&pm8058_gpio { + dragon_ethernet_gpios: ethernet-state { + pinconf { + pins = "gpio7"; + function = "normal"; + input-enable; + bias-disable; + power-source = ; + }; + }; + dragon_bmp085_gpios: bmp085-state { + pinconf { + pins = "gpio16"; + function = "normal"; + input-enable; + bias-disable; + power-source = ; + }; + }; + dragon_mpu3050_gpios: mpu3050-state { + pinconf { + pins = "gpio17"; + function = "normal"; + input-enable; + bias-disable; + power-source = ; + }; + }; + dragon_sdcc3_gpios: sdcc3-state { + pinconf { + pins = "gpio22"; + function = "normal"; + input-enable; + bias-disable; + power-source = ; + }; + }; + dragon_sdcc5_gpios: sdcc5-state { + pinconf { + pins = "gpio26"; + function = "normal"; + input-enable; + bias-pull-up; + qcom,pull-up-strength = ; + power-source = ; + }; + }; + dragon_ak8975_gpios: ak8975-state { + pinconf { + pins = "gpio33"; + function = "normal"; + input-enable; + bias-disable; + power-source = ; + }; + }; + dragon_cm3605_gpios: cm3605-state { + /* Pin 34 connected to the proxy IRQ */ + gpio34-pins { + pins = "gpio34"; + function = "normal"; + input-enable; + bias-disable; + power-source = ; + }; + /* Pin 35 connected to ASET */ + gpio35-pins { + pins = "gpio35"; + function = "normal"; + output-high; + bias-disable; + power-source = ; + }; + }; + dragon_veth_gpios: veth-state { + pinconf { + pins = "gpio40"; + function = "normal"; + bias-disable; + drive-push-pull; + }; + }; +}; + +&pm8058_keypad { + linux,keymap = < + MATRIX_KEY(0, 0, KEY_MENU) + MATRIX_KEY(0, 2, KEY_1) + MATRIX_KEY(0, 3, KEY_4) + MATRIX_KEY(0, 4, KEY_7) + MATRIX_KEY(1, 0, KEY_UP) + MATRIX_KEY(1, 1, KEY_LEFT) + MATRIX_KEY(1, 2, KEY_DOWN) + MATRIX_KEY(1, 3, KEY_5) + MATRIX_KEY(1, 3, KEY_8) + MATRIX_KEY(2, 0, KEY_HOME) + MATRIX_KEY(2, 1, KEY_REPLY) + MATRIX_KEY(2, 2, KEY_2) + MATRIX_KEY(2, 3, KEY_6) + MATRIX_KEY(3, 0, KEY_VOLUMEUP) + MATRIX_KEY(3, 1, KEY_RIGHT) + MATRIX_KEY(3, 2, KEY_3) + MATRIX_KEY(3, 3, KEY_9) + MATRIX_KEY(3, 4, KEY_SWITCHVIDEOMODE) + MATRIX_KEY(4, 0, KEY_VOLUMEDOWN) + MATRIX_KEY(4, 1, KEY_BACK) + MATRIX_KEY(4, 2, KEY_CAMERA) + MATRIX_KEY(4, 3, KEY_KBDILLUMTOGGLE) + >; + keypad,num-rows = <6>; + keypad,num-columns = <5>; +}; + +&pm8058_led48 { + /* + * The keypad LED @0x48 is routed to + * the sensor board where it is + * connected to an infrared LED + * SFH4650 (60mW, @850nm) next to the + * ambient light and proximity sensor + * Capella Microsystems CM3605. + */ + label = "pm8058:infrared:proximitysensor"; + default-state = "off"; + linux,default-trigger = "cm3605"; + status = "okay"; +}; + +&pm8058_led131 { + label = "pm8058:red"; + color = ; + default-state = "off"; + status = "okay"; +}; + +&pm8058_led132 { + /* + * This is actually green too on my + * board, but documented as yellow. + */ + label = "pm8058:yellow"; + color = ; + default-state = "off"; + linux,default-trigger = "mmc0"; + status = "okay"; +}; + +&pm8058_led133 { + label = "pm8058:green"; + function = LED_FUNCTION_HEARTBEAT; + color = ; + default-state = "on"; + linux,default-trigger = "heartbeat"; + status = "okay"; +}; + +&pm8058_mpps { + dragon_cm3605_mpps: cm3605-mpps-state { + mpp5 { + pins = "mpp5"; + function = "analog"; + input-enable; + bias-high-impedance; + /* Let's use channel 5 */ + qcom,amux-route = ; + power-source = ; + }; + }; +}; + +&rpm { + /* + * Set up of the PMIC RPM regulators for this board + * PM8901 supplies "preliminary regulators" whatever + * that means + */ + pm8901-regulators { + vdd_l0-supply = <&pm8901_s4>; + vdd_l1-supply = <&vph>; + vdd_l2-supply = <&vph>; + vdd_l3-supply = <&vph>; + vdd_l4-supply = <&vph>; + vdd_l5-supply = <&vph>; + vdd_l6-supply = <&vph>; + /* vdd_s0-supply, vdd_s1-supply: SAW regulators */ + vdd_s2-supply = <&vph>; + vdd_s3-supply = <&vph>; + vdd_s4-supply = <&vph>; + lvs0_in-supply = <&pm8058_s3>; + lvs1_in-supply = <&pm8901_s4>; + lvs2_in-supply = <&pm8058_l0>; + lvs3_in-supply = <&pm8058_s2>; + mvs_in-supply = <&pm8058_s3>; + + l0 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + bias-pull-down; + }; + l1 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + bias-pull-down; + }; + l2 { + /* TMA340 requires strictly 3.3V */ + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + bias-pull-down; + }; + l3 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + bias-pull-down; + }; + l4 { + regulator-min-microvolt = <2600000>; + regulator-max-microvolt = <2600000>; + bias-pull-down; + }; + l5 { + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + bias-pull-down; + }; + l6 { + regulator-min-microvolt = <2200000>; + regulator-max-microvolt = <2200000>; + bias-pull-down; + }; + + /* s0 and s1 are SAW regulators controlled over SPM */ + s2 { + regulator-min-microvolt = <1300000>; + regulator-max-microvolt = <1300000>; + qcom,switch-mode-frequency = <1600000>; + bias-pull-down; + }; + s3 { + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + qcom,switch-mode-frequency = <1600000>; + bias-pull-down; + }; + s4 { + regulator-min-microvolt = <1225000>; + regulator-max-microvolt = <1225000>; + qcom,switch-mode-frequency = <1600000>; + bias-pull-down; + }; + + /* LVS0 thru 3 and mvs are just switches */ + lvs0 { + regulator-always-on; + }; + lvs1 { }; + lvs2 { }; + lvs3 { }; + mvs { }; + + }; + + pm8058-regulators { + vdd_l0_l1_lvs-supply = <&pm8058_s3>; + vdd_l2_l11_l12-supply = <&vph>; + vdd_l3_l4_l5-supply = <&vph>; + vdd_l6_l7-supply = <&vph>; + vdd_l8-supply = <&vph>; + vdd_l9-supply = <&vph>; + vdd_l10-supply = <&vph>; + vdd_l13_l16-supply = <&pm8058_s4>; + vdd_l14_l15-supply = <&vph>; + vdd_l17_l18-supply = <&vph>; + vdd_l19_l20-supply = <&vph>; + vdd_l21-supply = <&pm8058_s3>; + vdd_l22-supply = <&pm8058_s3>; + vdd_l23_l24_l25-supply = <&pm8058_s3>; + vdd_s0-supply = <&vph>; + vdd_s1-supply = <&vph>; + vdd_s2-supply = <&vph>; + vdd_s3-supply = <&vph>; + vdd_s4-supply = <&vph>; + vdd_ncp-supply = <&vph>; + + l0 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + bias-pull-down; + }; + l1 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + bias-pull-down; + }; + l2 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2600000>; + bias-pull-down; + }; + l3 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + bias-pull-down; + }; + l4 { + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + bias-pull-down; + }; + l5 { + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + bias-pull-down; + }; + l6 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3600000>; + bias-pull-down; + }; + l7 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + bias-pull-down; + }; + l8 { + regulator-min-microvolt = <2900000>; + regulator-max-microvolt = <3050000>; + bias-pull-down; + }; + l9 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + bias-pull-down; + }; + l10 { + regulator-min-microvolt = <2600000>; + regulator-max-microvolt = <2600000>; + bias-pull-down; + }; + l11 { + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + bias-pull-down; + }; + l12 { + regulator-min-microvolt = <2900000>; + regulator-max-microvolt = <2900000>; + bias-pull-down; + }; + l13 { + regulator-min-microvolt = <2050000>; + regulator-max-microvolt = <2050000>; + bias-pull-down; + }; + l14 { + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + }; + l15 { + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + bias-pull-down; + }; + l16 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + bias-pull-down; + regulator-always-on; + }; + l17 { + // 1.5V according to schematic + regulator-min-microvolt = <2600000>; + regulator-max-microvolt = <2600000>; + bias-pull-down; + }; + l18 { + regulator-min-microvolt = <2200000>; + regulator-max-microvolt = <2200000>; + bias-pull-down; + }; + l19 { + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + bias-pull-down; + }; + l20 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + bias-pull-down; + }; + l21 { + // 1.1 V according to schematic + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + bias-pull-down; + regulator-always-on; + }; + l22 { + // 1.2 V according to schematic + regulator-min-microvolt = <1150000>; + regulator-max-microvolt = <1150000>; + bias-pull-down; + }; + l23 { + // Unused + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + bias-pull-down; + }; + l24 { + // Unused + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + bias-pull-down; + }; + l25 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + bias-pull-down; + }; + + s0 { + // regulator-min-microvolt = <500000>; + // regulator-max-microvolt = <1325000>; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + qcom,switch-mode-frequency = <1600000>; + bias-pull-down; + }; + s1 { + // regulator-min-microvolt = <500000>; + // regulator-max-microvolt = <1250000>; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + qcom,switch-mode-frequency = <1600000>; + bias-pull-down; + }; + s2 { + // 1.3 V according to schematic + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1400000>; + qcom,switch-mode-frequency = <1600000>; + bias-pull-down; + }; + s3 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + qcom,switch-mode-frequency = <1600000>; + regulator-always-on; + bias-pull-down; + }; + s4 { + regulator-min-microvolt = <2200000>; + regulator-max-microvolt = <2200000>; + qcom,switch-mode-frequency = <1600000>; + regulator-always-on; + bias-pull-down; + }; + + /* LVS0 and LVS1 are just switches */ + lvs0 { + bias-pull-down; + }; + lvs1 { + bias-pull-down; + }; + + ncp { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + qcom,switch-mode-frequency = <1600000>; + }; + }; +}; + +/* Internal 3.69 GiB eMMC */ +&sdcc1 { + pinctrl-names = "default"; + pinctrl-0 = <&dragon_sdcc1_pins>; + vmmc-supply = <&pm8901_l5>; + vqmmc-supply = <&pm8901_lvs0>; + status = "okay"; +}; + +/* External micro SD card, directly connected, pulled up to 2.85 V */ +&sdcc3 { + /* Enable SSBI GPIO 22 as input, use for card detect */ + pinctrl-names = "default"; + pinctrl-0 = <&dragon_sdcc3_pins>, <&dragon_sdcc3_gpios>; + cd-gpios = <&pm8058_gpio 22 GPIO_ACTIVE_LOW>; + wp-gpios = <&tlmm 110 GPIO_ACTIVE_HIGH>; + vmmc-supply = <&pm8058_l14>; + status = "okay"; +}; + +/* + * Second external micro SD card, using two TXB104RGYR levelshifters + * to lift from 1.8 V to 2.85 V + */ +&sdcc5 { + /* Enable SSBI GPIO 26 as input, use for card detect */ + pinctrl-names = "default"; + pinctrl-0 = <&dragon_sdcc5_pins>, <&dragon_sdcc5_gpios>; + cd-gpios = <&pm8058_gpio 26 GPIO_ACTIVE_LOW>; + wp-gpios = <&tlmm 106 GPIO_ACTIVE_HIGH>; + vmmc-supply = <&pm8058_l14>; + vqmmc-supply = <&dragon_vio_txb>; + status = "okay"; +}; + +&tlmm { + /* eMMC pins, all 8 data lines connected */ + dragon_sdcc1_pins: sdcc1 { + mux { + pins = "gpio159", "gpio160", "gpio161", + "gpio162", "gpio163", "gpio164", + "gpio165", "gpio166", "gpio167", + "gpio168"; + function = "sdc1"; + }; + clk { + pins = "gpio167"; /* SDC1 CLK */ + drive-strength = <16>; + bias-disable; + }; + cmd { + pins = "gpio168"; /* SDC1 CMD */ + drive-strength = <10>; + bias-pull-up; + }; + data { + /* SDC1 D0 to D7 */ + pins = "gpio159", "gpio160", "gpio161", "gpio162", + "gpio163", "gpio164", "gpio165", "gpio166"; + drive-strength = <10>; + bias-pull-up; + }; + }; + + /* + * The SDCC3 pins are hardcoded (non-muxable) but need some pin + * configuration. + */ + dragon_sdcc3_pins: sdcc3 { + clk { + pins = "sdc3_clk"; + drive-strength = <8>; + bias-disable; + }; + cmd { + pins = "sdc3_cmd"; + drive-strength = <8>; + bias-pull-up; + }; + data { + pins = "sdc3_data"; + drive-strength = <8>; + bias-pull-up; + }; + }; + + /* Second SD card slot pins */ + dragon_sdcc5_pins: sdcc5 { + mux { + pins = "gpio95", "gpio96", "gpio97", + "gpio98", "gpio99", "gpio100"; + function = "sdc5"; + }; + clk { + pins = "gpio97"; /* SDC5 CLK */ + drive-strength = <16>; + bias-disable; + }; + cmd { + pins = "gpio95"; /* SDC5 CMD */ + drive-strength = <10>; + bias-pull-up; + }; + data { + /* SDC5 D0 to D3 */ + pins = "gpio96", "gpio98", "gpio99", "gpio100"; + drive-strength = <10>; + bias-pull-up; + }; + }; + + dragon_gsbi3_i2c_pins: gsbi3_i2c { + mux { + pins = "gpio43", "gpio44"; + function = "gsbi3"; + }; + pinconf { + pins = "gpio43", "gpio44"; + drive-strength = <8>; + /* These have external pull-up 2.2kOhm to 1.8V */ + bias-disable; + }; + }; + + dragon_gsbi8_i2c_pins: gsbi8_i2c { + mux { + pins = "gpio64", "gpio65"; + function = "gsbi8"; + }; + pinconf { + pins = "gpio64", "gpio65"; + drive-strength = <16>; + /* These have external pull-up 2.2kOhm to 1.8V */ + bias-disable; + }; + }; + + dragon_gsbi12_i2c_pins: gsbi12_i2c { + mux { + pins = "gpio115", "gpio116"; + function = "gsbi12"; + }; + pinconf { + pins = "gpio115", "gpio116"; + drive-strength = <16>; + /* These have external pull-up 4.7kOhm to 1.8V */ + bias-disable; + }; + }; + + /* Primary serial port uart 0 pins */ + dragon_gsbi12_serial_pins: gsbi12_serial { + mux { + pins = "gpio117", "gpio118"; + function = "gsbi12"; + }; + tx { + pins = "gpio117"; + drive-strength = <8>; + bias-disable; + }; + rx { + pins = "gpio118"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + dragon_ebi2_pins: ebi2 { + /* + * Pins used by EBI2 on the Dragonboard, actually only + * CS2 is used by a real peripheral. CS0 is just + * routed to a test point. + */ + mux0 { + pins = + /* "gpio39", CS1A_N this is not good to mux */ + "gpio40", /* CS2A_N */ + "gpio134"; /* CS0_N testpoint TP29 */ + function = "ebi2cs"; + }; + mux1 { + pins = + /* EBI2_ADDR_7 downto EBI2_ADDR_0 address bus */ + "gpio123", "gpio124", "gpio125", "gpio126", + "gpio127", "gpio128", "gpio129", "gpio130", + /* EBI2_DATA_15 downto EBI2_DATA_0 data bus */ + "gpio135", "gpio136", "gpio137", "gpio138", + "gpio139", "gpio140", "gpio141", "gpio142", + "gpio143", "gpio144", "gpio145", "gpio146", + "gpio147", "gpio148", "gpio149", "gpio150", + "gpio151", /* EBI2_OE_N */ + "gpio153", /* EBI2_ADV */ + "gpio157"; /* EBI2_WE_N */ + function = "ebi2"; + }; + }; + + /* Interrupt line for the KXSD9 accelerometer */ + dragon_kxsd9_gpios: kxsd9 { + irq { + pins = "gpio57"; /* IRQ line */ + bias-pull-up; + }; + }; + + dragon_tma340_gpios: tma340 { + reset { + /* RESET line, TS_ATTN, WAKE_CTP */ + pins = "gpio58"; + function = "gpio"; + drive-strength = <6>; + bias-disable; + }; + irq { + pins = "gpio61"; /* IRQ line */ + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; +}; + +&xoadc { + /* Reference voltage 2.2 V */ + xoadc-ref-supply = <&pm8058_l18>; + + /* Board-specific channels */ + mpp5@5 { + /* Connected to AOUT of ALS sensor */ + reg = <0x00 0x05>; + }; + mpp6@6 { + /* Connected to test point TP43 */ + reg = <0x00 0x06>; + }; + mpp7@7 { + /* Connected to battery thermistor */ + reg = <0x00 0x07>; + }; + mpp8@8 { + /* Connected to battery ID detector */ + reg = <0x00 0x08>; + }; + mpp9@9 { + /* Connected to XO thermistor */ + reg = <0x00 0x09>; + }; +}; diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom-msm8660.dtsi index 35e90d188e05..4b0f58c417d5 100644 --- a/arch/arm/boot/dts/qcom-msm8660.dtsi +++ b/arch/arm/boot/dts/qcom-msm8660.dtsi @@ -316,7 +316,7 @@ }; }; - external-bus@1a100000 { + ebi2: external-bus@1a100000 { compatible = "qcom,msm8660-ebi2"; #address-cells = <2>; #size-cells = <1>; @@ -359,12 +359,6 @@ }; - pm8058_led48: led@48 { - compatible = "qcom,pm8058-keypad-led"; - reg = <0x48>; - status = "disabled"; - }; - pm8058_mpps: mpps@50 { compatible = "qcom,pm8058-mpp", "qcom,ssbi-mpp"; @@ -385,24 +379,6 @@ pull-up; }; - pm8058_led131: led@131 { - compatible = "qcom,pm8058-led"; - reg = <0x131>; - status = "disabled"; - }; - - pm8058_led132: led@132 { - compatible = "qcom,pm8058-led"; - reg = <0x132>; - status = "disabled"; - }; - - pm8058_led133: led@133 { - compatible = "qcom,pm8058-led"; - reg = <0x133>; - status = "disabled"; - }; - pm8058_keypad: keypad@148 { compatible = "qcom,pm8058-keypad"; reg = <0x148>; @@ -468,6 +444,31 @@ compatible = "qcom,pm8058-vib"; reg = <0x4a>; }; + + pm8058_led48: led@48 { + compatible = "qcom,pm8058-keypad-led"; + reg = <0x48>; + status = "disabled"; + }; + + pm8058_led131: led@131 { + compatible = "qcom,pm8058-led"; + reg = <0x131>; + status = "disabled"; + }; + + pm8058_led132: led@132 { + compatible = "qcom,pm8058-led"; + reg = <0x132>; + status = "disabled"; + }; + + pm8058_led133: led@133 { + compatible = "qcom,pm8058-led"; + reg = <0x133>; + status = "disabled"; + }; + }; }; From 621f3a4fe0282d2e60eed4a81e9f9e84b34f18ab Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Fri, 30 Sep 2022 21:52:35 +0300 Subject: [PATCH 027/102] ARM: dts: qcom: msm8660: drop unit ids from PMIC nodes On MSM8660 the PMICs are connected using SSBI devices, which do not have any addressing scheme. Drop the unused unit ids from PMIC device nodes. Signed-off-by: Dmitry Baryshkov Reviewed-by: Neil Armstrong Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220930185236.867655-23-dmitry.baryshkov@linaro.org --- arch/arm/boot/dts/qcom-msm8660.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom-msm8660.dtsi index 4b0f58c417d5..60edb4bd5bbb 100644 --- a/arch/arm/boot/dts/qcom-msm8660.dtsi +++ b/arch/arm/boot/dts/qcom-msm8660.dtsi @@ -338,7 +338,7 @@ reg = <0x500000 0x1000>; qcom,controller-type = "pmic-arbiter"; - pm8058: pmic@0 { + pm8058: pmic { compatible = "qcom,pm8058"; interrupt-parent = <&tlmm>; interrupts = <88 8>; From 963c336ef8a76b235fea1a77d8d6075f2618de01 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Fri, 30 Sep 2022 21:52:36 +0300 Subject: [PATCH 028/102] ARM: dts: qcom: msm8660: drop qcom, prefix from SSBI node name Signed-off-by: Dmitry Baryshkov Reviewed-by: Neil Armstrong Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220930185236.867655-24-dmitry.baryshkov@linaro.org --- arch/arm/boot/dts/qcom-msm8660.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom-msm8660.dtsi index 60edb4bd5bbb..a5e02301178f 100644 --- a/arch/arm/boot/dts/qcom-msm8660.dtsi +++ b/arch/arm/boot/dts/qcom-msm8660.dtsi @@ -333,7 +333,7 @@ status = "disabled"; }; - qcom,ssbi@500000 { + ssbi@500000 { compatible = "qcom,ssbi"; reg = <0x500000 0x1000>; qcom,controller-type = "pmic-arbiter"; From 645953bae8ae89e072af3b78bd648c0035d806c0 Mon Sep 17 00:00:00 2001 From: Bryan O'Donoghue Date: Wed, 7 Sep 2022 01:00:56 +0100 Subject: [PATCH 029/102] ARM: dts: qcom: apq8064: Drop redundant phy-names from DSI controller phy-names has been marked deprecated. Remove it from the apq8064 DSI controller block. Signed-off-by: Bryan O'Donoghue Reviewed-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220907000105.786265-3-bryan.odonoghue@linaro.org --- arch/arm/boot/dts/qcom-apq8064.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index 66f1e504a08e..4742f5dc4480 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -1309,7 +1309,6 @@ <&dsi0_phy 1>; syscon-sfpb = <&mmss_sfpb>; phys = <&dsi0_phy>; - phy-names = "dsi"; status = "disabled"; ports { From 0b01159afd5a0b782610fc113c4d8c0594b6e43d Mon Sep 17 00:00:00 2001 From: Bryan O'Donoghue Date: Wed, 7 Sep 2022 01:00:57 +0100 Subject: [PATCH 030/102] ARM: dts: qcom: msm8974: Drop redundant phy-names from DSI controller phy-names has been marked deprecated. Remove it from the msm8974 DSI controller block. Signed-off-by: Bryan O'Donoghue Reviewed-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220907000105.786265-4-bryan.odonoghue@linaro.org --- arch/arm/boot/dts/qcom-msm8974.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index 7a9be0acf3f5..21d943d4b02d 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -1571,7 +1571,6 @@ "core_mmss"; phys = <&dsi0_phy>; - phy-names = "dsi-phy"; status = "disabled"; From 93e948da390a75eee30be8fb8cb1945c65c933d0 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 8 Sep 2022 10:09:36 +0200 Subject: [PATCH 031/102] ARM: dts: qcom: use generic node name "gpio" in SPMI PMIC GPIO controller nodes are named by convention just "gpio", not "gpios". Signed-off-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220908080938.29199-1-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/qcom-pm8941.dtsi | 2 +- arch/arm/boot/dts/qcom-pma8084.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/qcom-pm8941.dtsi b/arch/arm/boot/dts/qcom-pm8941.dtsi index 9cd49deb9fa7..1ac477878c67 100644 --- a/arch/arm/boot/dts/qcom-pm8941.dtsi +++ b/arch/arm/boot/dts/qcom-pm8941.dtsi @@ -59,7 +59,7 @@ chg_otg: otg-vbus { }; }; - pm8941_gpios: gpios@c000 { + pm8941_gpios: gpio@c000 { compatible = "qcom,pm8941-gpio", "qcom,spmi-gpio"; reg = <0xc000>; gpio-controller; diff --git a/arch/arm/boot/dts/qcom-pma8084.dtsi b/arch/arm/boot/dts/qcom-pma8084.dtsi index e77602e9f95c..0da6c1a5d547 100644 --- a/arch/arm/boot/dts/qcom-pma8084.dtsi +++ b/arch/arm/boot/dts/qcom-pma8084.dtsi @@ -27,7 +27,7 @@ bias-pull-up; }; - pma8084_gpios: gpios@c000 { + pma8084_gpios: gpio@c000 { compatible = "qcom,pma8084-gpio", "qcom,spmi-gpio"; reg = <0xc000>; gpio-controller; From 118fa7657c29c5308268fe813c1fe6c763e56da3 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 20 Sep 2022 17:04:13 +0200 Subject: [PATCH 032/102] ARM: dts: qcom: msm8974: add missing TCSR syscon compatible TCSR syscon node should come with dedicated compatible. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Neil Armstrong Tested-by: Luca Weiss # fairphone-fp2 Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220920150414.637634-3-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/qcom-msm8974.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index 21d943d4b02d..5ab1256742a3 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -1239,7 +1239,7 @@ }; tcsr: syscon@fd4a0000 { - compatible = "syscon"; + compatible = "qcom,tcsr-msm8974", "syscon"; reg = <0xfd4a0000 0x10000>; }; From 65eed754c9bf211c81007cb9a87526669274742f Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 20 Sep 2022 17:04:14 +0200 Subject: [PATCH 033/102] ARM: dts: qcom: msm8974: switch TCSR mutex to MMIO The TCSR mutex bindings allow device to be described only with address space (so it uses MMIO, not syscon regmap). This seems reasonable, as TCSR mutex is actually a dedicated IO address space, and it also fixes DT schema checks: qcom-msm8974-sony-xperia-rhine-amami.dtb: tcsr-mutex: 'reg' is a required property qcom-msm8974-sony-xperia-rhine-amami.dtb: tcsr-mutex: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski Tested-by: Luca Weiss # fairphone-fp2 Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220920150414.637634-4-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/qcom-msm8974.dtsi | 14 ++++---------- 1 file changed, 4 insertions(+), 10 deletions(-) diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index 5ab1256742a3..5fb09db791ef 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -1194,7 +1194,7 @@ resets = <&gcc GCC_MSS_RESTART>; reset-names = "mss_restart"; - qcom,halt-regs = <&tcsr_mutex_block 0x1180 0x1200 0x1280>; + qcom,halt-regs = <&tcsr_mutex 0x1180 0x1200 0x1280>; qcom,smem-states = <&modem_smp2p_out 0>; qcom,smem-state-names = "stop"; @@ -1233,9 +1233,10 @@ }; }; - tcsr_mutex_block: syscon@fd484000 { - compatible = "syscon"; + tcsr_mutex: hwlock@fd484000 { + compatible = "qcom,msm8974-tcsr-mutex", "qcom,tcsr-mutex", "syscon"; reg = <0xfd484000 0x2000>; + #hwlock-cells = <1>; }; tcsr: syscon@fd4a0000 { @@ -1718,13 +1719,6 @@ }; }; - tcsr_mutex: tcsr-mutex { - compatible = "qcom,tcsr-mutex"; - syscon = <&tcsr_mutex_block 0 0x80>; - - #hwlock-cells = <1>; - }; - thermal-zones { cpu0-thermal { polling-delay-passive = <250>; From cf6cea98662dc9ecf7707076b10499785870ff23 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Sat, 24 Sep 2022 12:01:00 +0300 Subject: [PATCH 034/102] ARM: dts: qcom-apq8064: change DSI PHY node name to generic one Change DSI PHY node names from custom 'dsi-phy' to the generic 'phy'. Signed-off-by: Dmitry Baryshkov Reviewed-by: Krzysztof Kozlowski Reviewed-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220924090108.166934-2-dmitry.baryshkov@linaro.org --- arch/arm/boot/dts/qcom-apq8064.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index 4742f5dc4480..cb2184f98023 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -1330,7 +1330,7 @@ }; - dsi0_phy: dsi-phy@4700200 { + dsi0_phy: phy@4700200 { compatible = "qcom,dsi-phy-28nm-8960"; #clock-cells = <1>; #phy-cells = <0>; From 798e65cdd910a59a34de365ff9e00c186fb568b4 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Sat, 24 Sep 2022 12:01:01 +0300 Subject: [PATCH 035/102] ARM: dts: qcom-msm8974: change DSI PHY node name to generic one Change DSI PHY node names from custom 'dsi-phy' to the generic 'phy'. Signed-off-by: Dmitry Baryshkov Reviewed-by: Krzysztof Kozlowski Reviewed-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220924090108.166934-3-dmitry.baryshkov@linaro.org --- arch/arm/boot/dts/qcom-msm8974.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index 5fb09db791ef..a609836bb36c 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -1597,7 +1597,7 @@ }; }; - dsi0_phy: dsi-phy@fd922a00 { + dsi0_phy: phy@fd922a00 { compatible = "qcom,dsi-phy-28nm-hpm"; reg = <0xfd922a00 0xd4>, <0xfd922b00 0x280>, From 7475f7248ebaf1cd29d6cb21b4523bfcc30eb332 Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Sat, 24 Sep 2022 16:51:25 +0200 Subject: [PATCH 036/102] ARM: dts: qcom: fix node name for rpm-msg-ram Adjust the name to match the bindings and fix the following validation error: /arch/arm/boot/dts/qcom-apq8026-huawei-sturgeon.dtb: memory@fc428000: $nodename:0: 'memory@fc428000' does not match '^sram(@.*)?' From schema: /Documentation/devicetree/bindings/sram/sram.yaml Signed-off-by: Luca Weiss Reviewed-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220924145126.24978-1-luca@z3ntu.xyz --- arch/arm/boot/dts/qcom-apq8084.dtsi | 2 +- arch/arm/boot/dts/qcom-msm8226.dtsi | 2 +- arch/arm/boot/dts/qcom-msm8974.dtsi | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi index 3cc69af9f320..4447d9604f83 100644 --- a/arch/arm/boot/dts/qcom-apq8084.dtsi +++ b/arch/arm/boot/dts/qcom-apq8084.dtsi @@ -394,7 +394,7 @@ #hwlock-cells = <1>; }; - rpm_msg_ram: memory@fc428000 { + rpm_msg_ram: sram@fc428000 { compatible = "qcom,rpm-msg-ram"; reg = <0xfc428000 0x4000>; }; diff --git a/arch/arm/boot/dts/qcom-msm8226.dtsi b/arch/arm/boot/dts/qcom-msm8226.dtsi index 3b6e746a4af9..70cea141bc44 100644 --- a/arch/arm/boot/dts/qcom-msm8226.dtsi +++ b/arch/arm/boot/dts/qcom-msm8226.dtsi @@ -527,7 +527,7 @@ }; }; - rpm_msg_ram: memory@fc428000 { + rpm_msg_ram: sram@fc428000 { compatible = "qcom,rpm-msg-ram"; reg = <0xfc428000 0x4000>; }; diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index a609836bb36c..c27cc91d8f72 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -1056,7 +1056,7 @@ reg = <0xfc400000 0x4000>; }; - rpm_msg_ram: memory@fc428000 { + rpm_msg_ram: sram@fc428000 { compatible = "qcom,rpm-msg-ram"; reg = <0xfc428000 0x4000>; }; From 6d28bc945dea4628516b207e0f68199bbc063848 Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Sat, 24 Sep 2022 17:44:22 +0200 Subject: [PATCH 037/102] ARM: dts: qcom: add 'chassis-type' property Add the chassis-type property to arm32 Qualcomm watches, phones and tablets. Signed-off-by: Luca Weiss Reviewed-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220924154422.9896-1-luca@z3ntu.xyz --- arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts | 1 + arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts | 1 + arch/arm/boot/dts/qcom-apq8064-sony-xperia-lagan-yuga.dts | 1 + arch/arm/boot/dts/qcom-msm8226-samsung-s3ve3g.dts | 1 + arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts | 1 + arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine-amami.dts | 1 + arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine-honami.dts | 1 + arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts | 1 + arch/arm/boot/dts/qcom-msm8974pro-samsung-klte.dts | 1 + arch/arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts | 1 + 10 files changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts b/arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts index 682fbbcb71f2..de2fb1c01b6e 100644 --- a/arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts +++ b/arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts @@ -13,6 +13,7 @@ / { model = "LG G Watch R"; compatible = "lg,lenok", "qcom,apq8026"; + chassis-type = "watch"; qcom,board-id = <132 0x0a>; qcom,msm-id = <199 0x20000>; diff --git a/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts b/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts index 9c02dad9efc9..bf2fb0f70fe4 100644 --- a/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts +++ b/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts @@ -6,6 +6,7 @@ / { model = "Asus Nexus7(flo)"; compatible = "asus,nexus7-flo", "qcom,apq8064"; + chassis-type = "tablet"; aliases { serial0 = &gsbi7_serial; diff --git a/arch/arm/boot/dts/qcom-apq8064-sony-xperia-lagan-yuga.dts b/arch/arm/boot/dts/qcom-apq8064-sony-xperia-lagan-yuga.dts index 796f47e5b610..9244512b74d1 100644 --- a/arch/arm/boot/dts/qcom-apq8064-sony-xperia-lagan-yuga.dts +++ b/arch/arm/boot/dts/qcom-apq8064-sony-xperia-lagan-yuga.dts @@ -8,6 +8,7 @@ / { model = "Sony Xperia Z"; compatible = "sony,xperia-yuga", "qcom,apq8064"; + chassis-type = "handset"; aliases { serial0 = &gsbi5_serial; diff --git a/arch/arm/boot/dts/qcom-msm8226-samsung-s3ve3g.dts b/arch/arm/boot/dts/qcom-msm8226-samsung-s3ve3g.dts index 290e1df631f0..6a082ad4418a 100644 --- a/arch/arm/boot/dts/qcom-msm8226-samsung-s3ve3g.dts +++ b/arch/arm/boot/dts/qcom-msm8226-samsung-s3ve3g.dts @@ -8,6 +8,7 @@ / { model = "Samsung Galaxy S III Neo"; compatible = "samsung,s3ve3g", "qcom,msm8226"; + chassis-type = "handset"; aliases { serial0 = &blsp1_uart3; diff --git a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts index 7c8ca5ffcbb3..9cc453987d0e 100644 --- a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts +++ b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts @@ -9,6 +9,7 @@ / { model = "LGE MSM 8974 HAMMERHEAD"; compatible = "lge,hammerhead", "qcom,msm8974"; + chassis-type = "handset"; aliases { serial0 = &blsp1_uart1; diff --git a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine-amami.dts b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine-amami.dts index 68d5626bf491..9f2ab5c122d0 100644 --- a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine-amami.dts +++ b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine-amami.dts @@ -4,6 +4,7 @@ / { model = "Sony Xperia Z1 Compact"; compatible = "sony,xperia-amami", "qcom,msm8974"; + chassis-type = "handset"; }; &smbb { diff --git a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine-honami.dts b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine-honami.dts index ea6a941d8f8c..9028f17e5c4a 100644 --- a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine-honami.dts +++ b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine-honami.dts @@ -4,4 +4,5 @@ / { model = "Sony Xperia Z1"; compatible = "sony,xperia-honami", "qcom,msm8974"; + chassis-type = "handset"; }; diff --git a/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts b/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts index 9107bc6f24db..7e63a3cef81a 100644 --- a/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts +++ b/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts @@ -9,6 +9,7 @@ / { model = "Fairphone 2"; compatible = "fairphone,fp2", "qcom,msm8974"; + chassis-type = "handset"; aliases { mmc0 = &sdhc_1; diff --git a/arch/arm/boot/dts/qcom-msm8974pro-samsung-klte.dts b/arch/arm/boot/dts/qcom-msm8974pro-samsung-klte.dts index 156023204c1e..c87e3471b527 100644 --- a/arch/arm/boot/dts/qcom-msm8974pro-samsung-klte.dts +++ b/arch/arm/boot/dts/qcom-msm8974pro-samsung-klte.dts @@ -8,6 +8,7 @@ / { model = "Samsung Galaxy S5"; compatible = "samsung,klte", "qcom,msm8974"; + chassis-type = "handset"; aliases { serial0 = &blsp1_uart1; diff --git a/arch/arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts b/arch/arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts index e4580ed996e6..b65feac74692 100644 --- a/arch/arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts +++ b/arch/arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts @@ -9,6 +9,7 @@ / { model = "Sony Xperia Z2 Tablet"; compatible = "sony,xperia-castor", "qcom,msm8974"; + chassis-type = "tablet"; aliases { serial0 = &blsp1_uart2; From 23fa8ec64963b504071bdd0bdc6ade28cd7ecca1 Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Sun, 25 Sep 2022 18:13:16 +0200 Subject: [PATCH 038/102] ARM: dts: qcom: msm8974: fix tsens compatible Bindings mandate the use of the fallback compatible qcom,tsens-v0_1 for msm8974. Add it to fix the warning. Signed-off-by: Luca Weiss Reviewed-by: Konrad Dybcio Reviewed-by: Krzysztof Kozlowski Reviewed-by: Neil Armstrong Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220925161317.76356-1-luca@z3ntu.xyz --- arch/arm/boot/dts/qcom-apq8084.dtsi | 2 +- arch/arm/boot/dts/qcom-msm8974.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi index 4447d9604f83..6929f103f9f8 100644 --- a/arch/arm/boot/dts/qcom-apq8084.dtsi +++ b/arch/arm/boot/dts/qcom-apq8084.dtsi @@ -258,7 +258,7 @@ }; tsens: thermal-sensor@fc4a8000 { - compatible = "qcom,msm8974-tsens"; + compatible = "qcom,msm8974-tsens", "qcom,tsens-v0_1"; reg = <0xfc4a9000 0x1000>, /* TM */ <0xfc4a8000 0x1000>; /* SROT */ nvmem-cells = <&tsens_calib>, <&tsens_backup>; diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index c27cc91d8f72..f898fa02d78d 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -1116,7 +1116,7 @@ }; tsens: thermal-sensor@fc4a9000 { - compatible = "qcom,msm8974-tsens"; + compatible = "qcom,msm8974-tsens", "qcom,tsens-v0_1"; reg = <0xfc4a9000 0x1000>, /* TM */ <0xfc4a8000 0x1000>; /* SROT */ nvmem-cells = <&tsens_calib>, <&tsens_backup>; From 078d683252d9ceb06661cd3fc07b6fd58ef06548 Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Sun, 25 Sep 2022 18:13:17 +0200 Subject: [PATCH 039/102] ARM: dts: qcom: apq8084: add tsens interrupt Add the interrupt for tsens, based on the information from downstream msm-3.4 dts. Signed-off-by: Luca Weiss Reviewed-by: Konrad Dybcio Reviewed-by: Neil Armstrong Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220925161317.76356-2-luca@z3ntu.xyz --- arch/arm/boot/dts/qcom-apq8084.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi index 6929f103f9f8..5aa9f3053ace 100644 --- a/arch/arm/boot/dts/qcom-apq8084.dtsi +++ b/arch/arm/boot/dts/qcom-apq8084.dtsi @@ -264,6 +264,8 @@ nvmem-cells = <&tsens_calib>, <&tsens_backup>; nvmem-cell-names = "calib", "calib_backup"; #qcom,sensors = <11>; + interrupts = ; + interrupt-names = "uplow"; #thermal-sensor-cells = <1>; }; timer@f9020000 { From 1e27c4cd1741892b9984d571e4ad1476eb0c9b00 Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Sun, 25 Sep 2022 19:32:03 +0200 Subject: [PATCH 040/102] ARM: dts: qcom: msm8974: Remove bogus *-cells from smd-edge The bindings check complains that #address-cells and #size-cells shouldn't be in the smd-edge node. Remove it. Signed-off-by: Luca Weiss Reviewed-by: Krzysztof Kozlowski Reviewed-by: Neil Armstrong Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220925173203.96117-1-luca@z3ntu.xyz --- arch/arm/boot/dts/qcom-msm8974.dtsi | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index f898fa02d78d..7647cf9f2f76 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -1703,8 +1703,6 @@ qcom,ipc = <&apcs 8 8>; qcom,smd-edge = <1>; label = "lpass"; - #address-cells = <1>; - #size-cells = <0>; }; }; From 5da0f6fedb18d447cbe6d8aa5be33291bce1e7ba Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Sun, 25 Sep 2022 19:56:30 +0200 Subject: [PATCH 041/102] ARM: dts: qcom: msm8974-sony-*: fix multi-led node name The name rgb-led is not allowed, multi-led is supposed to be used. /arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine-amami.dtb: pm8941@1: pwm: 'rgb-led' does not match any of the regexes: '^led@[0-9a-f]$', 'pinctrl-[0-9]+' From schema: /Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml Signed-off-by: Luca Weiss Reviewed-by: Neil Armstrong Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220925175631.103535-1-luca@z3ntu.xyz --- arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine.dtsi | 2 +- .../arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine.dtsi b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine.dtsi index 320c9bf397f8..425c42bd70f3 100644 --- a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine.dtsi @@ -178,7 +178,7 @@ qcom,power-source = <1>; - rgb-led { + multi-led { color = ; function = LED_FUNCTION_STATUS; diff --git a/arch/arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts b/arch/arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts index b65feac74692..41765041ba7e 100644 --- a/arch/arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts +++ b/arch/arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts @@ -295,7 +295,7 @@ qcom,power-source = <1>; - rgb-led { + multi-led { color = ; function = LED_FUNCTION_STATUS; From da76bc88bde1dc3f547078282e30a88c371699ad Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Sun, 25 Sep 2022 21:06:21 +0200 Subject: [PATCH 042/102] ARM: dts: qcom: pmx65: use node name "gpio" for spmi-gpio All other usages of qcom,spmi-gpio use the gpio@ node name, and this is also validated by the dt binding check. Fix it. Signed-off-by: Luca Weiss Reviewed-by: Krzysztof Kozlowski Reviewed-by: Neil Armstrong Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220925190622.111505-1-luca@z3ntu.xyz --- arch/arm/boot/dts/qcom-pmx65.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom-pmx65.dtsi b/arch/arm/boot/dts/qcom-pmx65.dtsi index abf229a8b75a..1c7fdf59c1f5 100644 --- a/arch/arm/boot/dts/qcom-pmx65.dtsi +++ b/arch/arm/boot/dts/qcom-pmx65.dtsi @@ -20,7 +20,7 @@ #thermal-sensor-cells = <0>; }; - pmx65_gpios: pinctrl@8800 { + pmx65_gpios: gpio@8800 { compatible = "qcom,pmx65-gpio", "qcom,spmi-gpio"; reg = <0x8800>; gpio-controller; From fe11928be2e3d46113cba831f21e155820072ec9 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Matti=20Lehtim=C3=A4ki?= Date: Wed, 28 Sep 2022 00:49:37 +0300 Subject: [PATCH 043/102] ARM: dts: qcom: pm8226: Add node for the GPIOs MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The PM8226 provides 8 GPIOs. Add a node to support them. Signed-off-by: Matti Lehtimäki Reviewed-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio Acked-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220927214940.244480-2-matti.lehtimaki@gmail.com --- arch/arm/boot/dts/qcom-pm8226.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/qcom-pm8226.dtsi b/arch/arm/boot/dts/qcom-pm8226.dtsi index 9b7d9d04ded6..0c10fa16a0f3 100644 --- a/arch/arm/boot/dts/qcom-pm8226.dtsi +++ b/arch/arm/boot/dts/qcom-pm8226.dtsi @@ -90,6 +90,16 @@ interrupt-controller; #interrupt-cells = <2>; }; + + pm8226_gpios: gpio@c000 { + compatible = "qcom,pm8226-gpio", "qcom,spmi-gpio"; + reg = <0xc000>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pm8226_gpios 0 0 8>; + interrupt-controller; + #interrupt-cells = <2>; + }; }; pm8226_1: pm8226@1 { From 198f7b7cbb737ba7e7ac9c2ee744746b7faf9a9c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Matti=20Lehtim=C3=A4ki?= Date: Wed, 28 Sep 2022 00:49:38 +0300 Subject: [PATCH 044/102] dt-bindings: arm: qcom: Document samsung,matisse-wifi device MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add binding documentation for Samsung Galaxy Tab 4 10.1 (2014) wifi tablet which is based on Snapdragon 400 (apq8026) SoC. Signed-off-by: Matti Lehtimäki Acked-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220927214940.244480-3-matti.lehtimaki@gmail.com --- Documentation/devicetree/bindings/arm/qcom.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 1b5ac6b02bc5..950e26f03ff8 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -115,6 +115,7 @@ properties: - enum: - asus,sparrow - lg,lenok + - samsung,matisse-wifi - const: qcom,apq8026 - items: From f15623bda1dcb37007b930496e2955cca12f30d8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Matti=20Lehtim=C3=A4ki?= Date: Wed, 28 Sep 2022 00:49:39 +0300 Subject: [PATCH 045/102] ARM: dts: qcom: Add support for Samsung Galaxy Tab 4 10.1 (SM-T530) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add a device tree for the Samsung Galaxy Tab 4 10.1 (SM-T530) wifi tablet based on the apq8026 platform. Currently supported are accelerometer sensor, hall sensor, internal storage, physical buttons (power & volume), screen (based on simple-framebuffer set up by the bootloader), sdcard, touchscreen and USB. Signed-off-by: Matti Lehtimäki Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220927214940.244480-4-matti.lehtimaki@gmail.com --- arch/arm/boot/dts/Makefile | 1 + .../dts/qcom-apq8026-samsung-matisse-wifi.dts | 453 ++++++++++++++++++ 2 files changed, 454 insertions(+) create mode 100644 arch/arm/boot/dts/qcom-apq8026-samsung-matisse-wifi.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 6aa7dc4db2fc..513073ece0b7 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1030,6 +1030,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \ qcom-apq8016-sbc.dtb \ qcom-apq8026-asus-sparrow.dtb \ qcom-apq8026-lg-lenok.dtb \ + qcom-apq8026-samsung-matisse-wifi.dtb \ qcom-apq8060-dragonboard.dtb \ qcom-apq8064-cm-qs600.dtb \ qcom-apq8064-ifc6410.dtb \ diff --git a/arch/arm/boot/dts/qcom-apq8026-samsung-matisse-wifi.dts b/arch/arm/boot/dts/qcom-apq8026-samsung-matisse-wifi.dts new file mode 100644 index 000000000000..1c52337af560 --- /dev/null +++ b/arch/arm/boot/dts/qcom-apq8026-samsung-matisse-wifi.dts @@ -0,0 +1,453 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2022, Matti Lehtimäki + */ + +/dts-v1/; + +#include +#include "qcom-msm8226.dtsi" +#include "qcom-pm8226.dtsi" + +/ { + model = "Samsung Galaxy Tab 4 10.1"; + compatible = "samsung,matisse-wifi", "qcom,apq8026"; + chassis-type = "tablet"; + + aliases { + mmc0 = &sdhc_1; /* SDC1 eMMC slot */ + mmc1 = &sdhc_2; /* SDC2 SD card slot */ + display0 = &framebuffer0; + }; + + chosen { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + stdout-path = "display0"; + + framebuffer0: framebuffer@3200000 { + compatible = "simple-framebuffer"; + reg = <0x03200000 0x800000>; + width = <1280>; + height = <800>; + stride = <(1280 * 3)>; + format = "r8g8b8"; + }; + }; + + gpio-hall-sensor { + compatible = "gpio-keys"; + + event-hall-sensor { + label = "Hall Effect Sensor"; + gpios = <&tlmm 110 GPIO_ACTIVE_HIGH>; + interrupts = <&tlmm 110 IRQ_TYPE_EDGE_FALLING>; + linux,input-type = ; + linux,code = ; + debounce-interval = <15>; + wakeup-source; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + autorepeat; + + key-home { + label = "Home"; + gpios = <&tlmm 108 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <15>; + }; + + key-volume-down { + label = "Volume Down"; + gpios = <&tlmm 107 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <15>; + }; + + key-volume-up { + label = "Volume Up"; + gpios = <&tlmm 106 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <15>; + }; + }; + + reg_tsp_1p8v: regulator-tsp-1p8v { + compatible = "regulator-fixed"; + regulator-name = "tsp_1p8v"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + gpio = <&tlmm 31 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-names = "default"; + pinctrl-0 = <&tsp_en_default_state>; + }; + + reg_tsp_3p3v: regulator-tsp-3p3v { + compatible = "regulator-fixed"; + regulator-name = "tsp_3p3v"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&tlmm 73 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-names = "default"; + pinctrl-0 = <&tsp_en1_default_state>; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + framebuffer@3200000 { + reg = <0x03200000 0x800000>; + no-map; + }; + + mpss@8400000 { + reg = <0x08400000 0x1f00000>; + no-map; + }; + + mba@a300000 { + reg = <0x0a300000 0x100000>; + no-map; + }; + + reserved@cb00000 { + reg = <0x0cb00000 0x700000>; + no-map; + }; + + wcnss@d200000 { + reg = <0x0d200000 0x700000>; + no-map; + }; + + adsp@d900000 { + reg = <0x0d900000 0x1800000>; + no-map; + }; + + venus@f100000 { + reg = <0x0f100000 0x500000>; + no-map; + }; + + /delete-node/ smem@3000000; + smem_region: smem@fa00000 { + reg = <0x0fa00000 0x100000>; + no-map; + }; + + reserved@fb00000 { + reg = <0x0fb00000 0x260000>; + no-map; + }; + + rfsa@fd60000 { + reg = <0x0fd60000 0x20000>; + no-map; + }; + + rmtfs@fd80000 { + compatible = "qcom,rmtfs-mem"; + reg = <0x0fd80000 0x180000>; + no-map; + + qcom,client-id = <1>; + }; + }; +}; + +&blsp1_i2c2 { + status = "okay"; + + accelerometer@1d { + compatible = "st,lis2hh12"; + reg = <0x1d>; + + interrupt-parent = <&tlmm>; + interrupts = <54 IRQ_TYPE_LEVEL_HIGH>; + + pinctrl-names = "default"; + pinctrl-0 = <&accel_int_default_state>; + + st,drdy-int-pin = <1>; + + vdd-supply = <&pm8226_l19>; + vddio-supply = <&pm8226_lvs1>; + }; +}; + +&blsp1_i2c4 { + status = "okay"; + + muic: usb-switch@25 { + compatible = "siliconmitus,sm5502-muic"; + reg = <0x25>; + + interrupt-parent = <&tlmm>; + interrupts = <67 IRQ_TYPE_EDGE_FALLING>; + + pinctrl-names = "default"; + pinctrl-0 = <&muic_int_default_state>; + }; +}; + +&blsp1_i2c5 { + status = "okay"; + + touchscreen@4a { + compatible = "atmel,maxtouch"; + reg = <0x4a>; + + interrupt-parent = <&tlmm>; + interrupts = <17 IRQ_TYPE_LEVEL_LOW>; + + pinctrl-names = "default"; + pinctrl-0 = <&tsp_int_rst_default_state>; + + reset-gpios = <&pm8226_gpios 6 GPIO_ACTIVE_LOW>; + + vdd-supply = <®_tsp_1p8v>; + vdda-supply = <®_tsp_3p3v>; + }; +}; + +&rpm_requests { + regulators { + compatible = "qcom,rpm-pm8226-regulators"; + + pm8226_s3: s3 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1300000>; + }; + + pm8226_s4: s4 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + pm8226_s5: s5 { + regulator-min-microvolt = <1150000>; + regulator-max-microvolt = <1150000>; + }; + + pm8226_l1: l1 { + regulator-min-microvolt = <1225000>; + regulator-max-microvolt = <1225000>; + }; + + pm8226_l2: l2 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + pm8226_l3: l3 { + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1337500>; + regulator-always-on; + }; + + pm8226_l4: l4 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + pm8226_l5: l5 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + pm8226_l6: l6 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + pm8226_l7: l7 { + regulator-min-microvolt = <1850000>; + regulator-max-microvolt = <1850000>; + }; + + pm8226_l8: l8 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + pm8226_l9: l9 { + regulator-min-microvolt = <2050000>; + regulator-max-microvolt = <2050000>; + }; + + pm8226_l10: l10 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + pm8226_l12: l12 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + pm8226_l14: l14 { + regulator-min-microvolt = <2750000>; + regulator-max-microvolt = <2750000>; + }; + + pm8226_l15: l15 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + }; + + pm8226_l16: l16 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3350000>; + }; + + pm8226_l17: l17 { + regulator-min-microvolt = <2950000>; + regulator-max-microvolt = <2950000>; + + regulator-system-load = <200000>; + regulator-allow-set-load; + regulator-always-on; + }; + + pm8226_l18: l18 { + regulator-min-microvolt = <2950000>; + regulator-max-microvolt = <2950000>; + }; + + pm8226_l19: l19 { + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <3000000>; + }; + + pm8226_l20: l20 { + regulator-min-microvolt = <3075000>; + regulator-max-microvolt = <3075000>; + }; + + pm8226_l21: l21 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2950000>; + }; + + pm8226_l22: l22 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3000000>; + }; + + pm8226_l23: l23 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + }; + + pm8226_l24: l24 { + regulator-min-microvolt = <1300000>; + regulator-max-microvolt = <1350000>; + }; + + pm8226_l25: l25 { + regulator-min-microvolt = <1775000>; + regulator-max-microvolt = <2125000>; + }; + + pm8226_l26: l26 { + regulator-min-microvolt = <1225000>; + regulator-max-microvolt = <1300000>; + }; + + pm8226_l27: l27 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + pm8226_l28: l28 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2950000>; + }; + + pm8226_lvs1: lvs1 {}; + }; +}; + +&sdhc_1 { + vmmc-supply = <&pm8226_l17>; + vqmmc-supply = <&pm8226_l6>; + + bus-width = <8>; + non-removable; + + status = "okay"; +}; + +&sdhc_2 { + vmmc-supply = <&pm8226_l18>; + vqmmc-supply = <&pm8226_l21>; + + bus-width = <4>; + cd-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>; + + status = "okay"; +}; + +&tlmm { + accel_int_default_state: accel-int-default-state { + pins = "gpio54"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + muic_int_default_state: muic-int-default-state { + pins = "gpio67"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + tsp_en_default_state: tsp-en-default-state { + pins = "gpio31"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + tsp_en1_default_state: tsp-en1-default-state { + pins = "gpio73"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + tsp_int_rst_default_state: tsp-int-rst-default-state { + pins = "gpio17"; + function = "gpio"; + drive-strength = <10>; + bias-pull-up; + }; +}; + +&usb { + extcon = <&muic>, <&muic>; + status = "okay"; +}; + +&usb_hs_phy { + extcon = <&muic>; + v1p8-supply = <&pm8226_l10>; + v3p3-supply = <&pm8226_l20>; +}; From 8ad78282a43f6effe86530b9980ba456b98d7cbc Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sun, 2 Oct 2022 11:20:00 +0200 Subject: [PATCH 046/102] ARM: dts: qcom: correct indentation Do not use spaces for indentation. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Neil Armstrong Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221002092000.68844-1-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/qcom-ipq4019.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi index b23591110bd2..acb08dcf9442 100644 --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi @@ -348,7 +348,7 @@ saw0: regulator@b089000 { compatible = "qcom,saw2"; reg = <0x0b089000 0x1000>, <0x0b009000 0x1000>; - regulator; + regulator; }; saw1: regulator@b099000 { From 6f917ec31d3eb0f2c657f36d299d39bd8d051e03 Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Thu, 13 Oct 2022 21:06:55 +0200 Subject: [PATCH 047/102] ARM: dts: qcom: ipq8064-rb3011: fix nand node validation The devicetree documentation for the nand node requires the subnode be called nand@ and no compatible is needed. Signed-off-by: Luca Weiss Reviewed-by: Krzysztof Kozlowski Reviewed-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221013190657.48499-1-luca@z3ntu.xyz --- arch/arm/boot/dts/qcom-ipq8064-rb3011.dts | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts b/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts index 5a65cce2500c..86f895db9894 100644 --- a/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts +++ b/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts @@ -264,8 +264,7 @@ &nand { status = "okay"; - nandcs@0 { - compatible = "qcom,nandcs"; + nand@0 { reg = <0>; nand-ecc-strength = <4>; From 891bcfe02470c79489987d643ba0010c0b16f896 Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Thu, 13 Oct 2022 21:06:56 +0200 Subject: [PATCH 048/102] ARM: dts: qcom: apq8084: fix compatible for l2-cache The compatible "qcom,arch-cache" for l2-cache does not exist, and all other Qualcomm boards use just "cache" for it. Fix it. Signed-off-by: Luca Weiss Reviewed-by: Krzysztof Kozlowski Reviewed-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221013190657.48499-2-luca@z3ntu.xyz --- arch/arm/boot/dts/qcom-apq8084.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi index 5aa9f3053ace..fe30abfff90a 100644 --- a/arch/arm/boot/dts/qcom-apq8084.dtsi +++ b/arch/arm/boot/dts/qcom-apq8084.dtsi @@ -72,7 +72,7 @@ }; L2: l2-cache { - compatible = "qcom,arch-cache"; + compatible = "cache"; cache-level = <2>; qcom,saw = <&saw_l2>; }; From a42b1ee868361f1cb0492f1bdaefb43e0751e468 Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Thu, 13 Oct 2022 21:06:57 +0200 Subject: [PATCH 049/102] ARM: dts: qcom: apq8064: fix coresight compatible There's a typo missing the arm, prefix of arm,coresight-etb10. Fix it to make devicetree validation happier. Signed-off-by: Luca Weiss Fixes: 7a5c275fd821 ("ARM: dts: qcom: Add apq8064 CoreSight components") Reviewed-by: Krzysztof Kozlowski Reviewed-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221013190657.48499-3-luca@z3ntu.xyz --- arch/arm/boot/dts/qcom-apq8064.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index cb2184f98023..3123e38b42dd 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -1611,7 +1611,7 @@ }; etb@1a01000 { - compatible = "coresight-etb10", "arm,primecell"; + compatible = "arm,coresight-etb10", "arm,primecell"; reg = <0x1a01000 0x1000>; clocks = <&rpmcc RPM_QDSS_CLK>; From 5743efe0e73e4e1c8d042e982e31bb8145e35baf Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Sat, 24 Sep 2022 12:43:46 +0300 Subject: [PATCH 050/102] ARM: dts: qcom-apq8064: change HDMI PHY node name to generic one Change HDMI PHY node names from custom 'hdmi-phy' to the generic 'phy'. Signed-off-by: Dmitry Baryshkov Reviewed-by: Krzysztof Kozlowski Reviewed-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220924094347.178666-2-dmitry.baryshkov@linaro.org --- arch/arm/boot/dts/qcom-apq8064.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index 3123e38b42dd..d799e6eb4b0d 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -1482,7 +1482,7 @@ }; }; - hdmi_phy: hdmi-phy@4a00400 { + hdmi_phy: phy@4a00400 { compatible = "qcom,hdmi-phy-8960"; reg = <0x4a00400 0x60>, <0x4a00500 0x100>; From 773c7700a71bb3f7f4fa4f689ffd4d063ddd66a7 Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Sat, 24 Sep 2022 17:29:36 +0200 Subject: [PATCH 051/102] dt-bindings: arm: qcom: Document huawei,sturgeon device Document the Huawei Watch ("sturgeon") which is a smartwatch based on Snapdragon 400 SoC. Signed-off-by: Luca Weiss Acked-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220924152937.4076-1-luca@z3ntu.xyz --- Documentation/devicetree/bindings/arm/qcom.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 950e26f03ff8..47dca00518d4 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -114,6 +114,7 @@ properties: - items: - enum: - asus,sparrow + - huawei,sturgeon - lg,lenok - samsung,matisse-wifi - const: qcom,apq8026 From 65e0d1c4668506d511af9ab0ff0a1f4c940ef8e7 Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Sat, 24 Sep 2022 17:29:37 +0200 Subject: [PATCH 052/102] ARM: dts: qcom: Add support for Huawei Watch Add support for this smartwatch, based on Snapdragon 400 SoC. Currently supported functionality: * Internal storage * USB * Charger * Power button * Bluetooth * Wifi Signed-off-by: Luca Weiss Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220924152937.4076-2-luca@z3ntu.xyz --- arch/arm/boot/dts/Makefile | 1 + .../boot/dts/qcom-apq8026-huawei-sturgeon.dts | 376 ++++++++++++++++++ 2 files changed, 377 insertions(+) create mode 100644 arch/arm/boot/dts/qcom-apq8026-huawei-sturgeon.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 513073ece0b7..640858290ec7 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1029,6 +1029,7 @@ dtb-$(CONFIG_ARCH_OXNAS) += \ dtb-$(CONFIG_ARCH_QCOM) += \ qcom-apq8016-sbc.dtb \ qcom-apq8026-asus-sparrow.dtb \ + qcom-apq8026-huawei-sturgeon.dtb \ qcom-apq8026-lg-lenok.dtb \ qcom-apq8026-samsung-matisse-wifi.dtb \ qcom-apq8060-dragonboard.dtb \ diff --git a/arch/arm/boot/dts/qcom-apq8026-huawei-sturgeon.dts b/arch/arm/boot/dts/qcom-apq8026-huawei-sturgeon.dts new file mode 100644 index 000000000000..d64096028ab1 --- /dev/null +++ b/arch/arm/boot/dts/qcom-apq8026-huawei-sturgeon.dts @@ -0,0 +1,376 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2022, Luca Weiss + */ + +/dts-v1/; + +#include "qcom-msm8226.dtsi" +#include "qcom-pm8226.dtsi" + +/delete-node/ &adsp_region; + +/ { + model = "Huawei Watch"; + compatible = "huawei,sturgeon", "qcom,apq8026"; + chassis-type = "watch"; + qcom,msm-id = <199 0x20000>; + qcom,board-id = <8 4>; + + reserved-memory { + sbl_region: sbl@2f00000 { + reg = <0x02f00000 0x100000>; + no-map; + }; + + external_image_region: external-image@3100000 { + reg = <0x3100000 0x200000>; + no-map; + }; + + peripheral_region: peripheral@3300000 { + reg = <0x3300000 0x600000>; + no-map; + }; + + adsp_region: adsp@3900000 { + reg = <0x3900000 0x1400000>; + no-map; + }; + + modem_region: modem@4d00000 { + reg = <0x4d00000 0x1b00000>; + no-map; + }; + + modem_efs_region: modem-efs@7f00000 { + reg = <0x7f00000 0x100000>; + no-map; + }; + }; + + vreg_wlan: wlan-regulator { + compatible = "regulator-fixed"; + + regulator-name = "wl-reg"; + regulator-min-microvolt = <2950000>; + regulator-max-microvolt = <2950000>; + + gpio = <&tlmm 110 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-names = "default"; + pinctrl-0 = <&wlan_regulator_default_state>; + }; +}; + +&adsp { + status = "okay"; +}; + +&blsp1_i2c5 { + clock-frequency = <384000>; + + status = "okay"; + + touchscreen@20 { + compatible = "syna,rmi4-i2c"; + reg = <0x20>; + + interrupts-extended = <&tlmm 17 IRQ_TYPE_EDGE_FALLING>; + vdd-supply = <&pm8226_l19>; + vio-supply = <&pm8226_lvs1>; + + pinctrl-names = "default"; + pinctrl-0 = <&touch_default_state>; + + syna,startup-delay-ms = <160>; + + #address-cells = <1>; + #size-cells = <0>; + + rmi4-f01@1 { + reg = <0x1>; + syna,nosleep-mode = <1>; + }; + + rmi4-f12@12 { + reg = <0x12>; + syna,sensor-type = <1>; + }; + }; +}; + +&blsp1_uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&blsp1_uart4_default_state>; + + status = "okay"; + + bluetooth { + compatible = "brcm,bcm43430a0-bt"; + max-speed = <3000000>; + + pinctrl-names = "default"; + pinctrl-0 = <&bluetooth_default_state>; + + host-wakeup-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>; + device-wakeup-gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>; + shutdown-gpios = <&tlmm 67 GPIO_ACTIVE_HIGH>; + }; +}; + +&rpm_requests { + regulators { + compatible = "qcom,rpm-pm8226-regulators"; + + pm8226_s3: s3 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1300000>; + }; + + pm8226_s4: s4 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2200000>; + }; + + pm8226_s5: s5 { + regulator-min-microvolt = <1150000>; + regulator-max-microvolt = <1150000>; + }; + + pm8226_l1: l1 { + regulator-min-microvolt = <1225000>; + regulator-max-microvolt = <1225000>; + }; + + pm8226_l2: l2 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + pm8226_l3: l3 { + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1337500>; + }; + + pm8226_l4: l4 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + pm8226_l5: l5 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + pm8226_l6: l6 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + pm8226_l7: l7 { + regulator-min-microvolt = <1850000>; + regulator-max-microvolt = <1850000>; + }; + + pm8226_l8: l8 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + pm8226_l9: l9 { + regulator-min-microvolt = <2050000>; + regulator-max-microvolt = <2050000>; + }; + + pm8226_l10: l10 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + pm8226_l12: l12 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + pm8226_l14: l14 { + regulator-min-microvolt = <2750000>; + regulator-max-microvolt = <2750000>; + }; + + pm8226_l15: l15 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + }; + + pm8226_l16: l16 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3350000>; + }; + + pm8226_l17: l17 { + regulator-min-microvolt = <2950000>; + regulator-max-microvolt = <2950000>; + }; + + pm8226_l18: l18 { + regulator-min-microvolt = <2950000>; + regulator-max-microvolt = <2950000>; + }; + + pm8226_l19: l19 { + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + }; + + pm8226_l20: l20 { + regulator-min-microvolt = <3075000>; + regulator-max-microvolt = <3075000>; + }; + + pm8226_l21: l21 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2950000>; + }; + + pm8226_l22: l22 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2950000>; + }; + + pm8226_l23: l23 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2950000>; + }; + + pm8226_l24: l24 { + regulator-min-microvolt = <1300000>; + regulator-max-microvolt = <1350000>; + }; + + pm8226_l25: l25 { + regulator-min-microvolt = <1775000>; + regulator-max-microvolt = <2125000>; + }; + + pm8226_l26: l26 { + regulator-min-microvolt = <1225000>; + regulator-max-microvolt = <1225000>; + }; + + pm8226_l27: l27 { + regulator-min-microvolt = <2050000>; + regulator-max-microvolt = <2050000>; + }; + + pm8226_l28: l28 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2950000>; + }; + + pm8226_lvs1: lvs1 {}; + }; +}; + +&sdhc_1 { + vmmc-supply = <&pm8226_l17>; + vqmmc-supply = <&pm8226_l6>; + + bus-width = <8>; + non-removable; + + status = "okay"; +}; + +&sdhc_3 { + max-frequency = <100000000>; + non-removable; + + vmmc-supply = <&vreg_wlan>; + vqmmc-supply = <&pm8226_l6>; + + #address-cells = <1>; + #size-cells = <0>; + + status = "okay"; + + wifi@1 { + compatible = "brcm,bcm43430a0-fmac", "brcm,bcm4329-fmac"; + reg = <1>; + + interrupts-extended = <&tlmm 66 IRQ_TYPE_EDGE_FALLING>; + interrupt-names = "host-wake"; + + pinctrl-names = "default"; + pinctrl-0 = <&wlan_hostwake_default_state>; + }; +}; + +&smbb { + qcom,fast-charge-safe-voltage = <4370000>; + qcom,fast-charge-high-threshold-voltage = <4350000>; + qcom,minimum-input-voltage = <4350000>; + qcom,fast-charge-current-limit = <300000>; + qcom,fast-charge-safe-current = <600000>; + qcom,auto-recharge-threshold-voltage = <4240000>; +}; + +&tlmm { + blsp1_uart4_default_state: blsp1-uart4-default-state { + pins = "gpio12", "gpio13", "gpio14", "gpio15"; + function = "blsp_uart4"; + drive-strength = <8>; + bias-disable; + }; + + bluetooth_default_state: bluetooth-default-state { + pins = "gpio63", "gpio64"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + }; + + touch_default_state: touch-default-state { + irq-pins { + pins = "gpio17"; + function = "gpio"; + drive-strength = <8>; + bias-pull-up; + }; + + reset-pins { + pins = "gpio16"; + function = "gpio"; + drive-strength = <6>; + bias-pull-up; + }; + }; + + wlan_hostwake_default_state: wlan-hostwake-default-state { + pins = "gpio66"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + input-enable; + }; + + wlan_regulator_default_state: wlan-regulator-default-state { + pins = "gpio110"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + }; +}; + +&usb { + extcon = <&smbb>; + dr_mode = "peripheral"; + status = "okay"; +}; + +&usb_hs_phy { + extcon = <&smbb>; + v1p8-supply = <&pm8226_l10>; + v3p3-supply = <&pm8226_l20>; +}; From da6b4c059283166c1939143574b3ade96817304e Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Tue, 27 Sep 2022 14:38:26 +0300 Subject: [PATCH 053/102] ARM: dts: qcom-ipq8064: use pll4 clock for the gcc device Add a link to LCC's PLL4 clock to the GCC device node following the bindings (and driver needs). Signed-off-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220927113826.246241-4-dmitry.baryshkov@linaro.org --- arch/arm/boot/dts/qcom-ipq8064.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index 90c08b51680a..a79f8b5fe12d 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -513,8 +513,8 @@ gcc: clock-controller@900000 { compatible = "qcom,gcc-ipq8064", "syscon"; - clocks = <&pxo_board>, <&cxo_board>; - clock-names = "pxo", "cxo"; + clocks = <&pxo_board>, <&cxo_board>, <&lcc PLL4>; + clock-names = "pxo", "cxo", "pll4"; reg = <0x00900000 0x4000>; #clock-cells = <1>; #reset-cells = <1>; From 4ab2f41b0850768716c446461653178372bcd35c Mon Sep 17 00:00:00 2001 From: Rayyan Ansari Date: Sun, 2 Oct 2022 15:28:57 +0300 Subject: [PATCH 054/102] ARM: dts: qcom: msm8226: Add CCI bus MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add a node for the Camera Control Interface I2C bus found on MSM8226. Signed-off-by: Rayyan Ansari Signed-off-by: Matti Lehtimäki Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221002122859.75525-6-matti.lehtimaki@gmail.com --- arch/arm/boot/dts/qcom-msm8226.dtsi | 44 +++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/arch/arm/boot/dts/qcom-msm8226.dtsi b/arch/arm/boot/dts/qcom-msm8226.dtsi index 70cea141bc44..81f30b66f4d7 100644 --- a/arch/arm/boot/dts/qcom-msm8226.dtsi +++ b/arch/arm/boot/dts/qcom-msm8226.dtsi @@ -7,6 +7,7 @@ #include #include +#include #include #include #include @@ -298,6 +299,33 @@ #size-cells = <0>; }; + cci: cci@fda0c000 { + compatible = "qcom,msm8226-cci"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xfda0c000 0x1000>; + interrupts = ; + clocks = <&mmcc CAMSS_TOP_AHB_CLK>, + <&mmcc CAMSS_CCI_CCI_AHB_CLK>, + <&mmcc CAMSS_CCI_CCI_CLK>; + clock-names = "camss_top_ahb", + "cci_ahb", + "cci"; + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&cci_default>; + pinctrl-1 = <&cci_sleep>; + + status = "disabled"; + + cci_i2c0: i2c-bus@0 { + reg = <0>; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + usb: usb@f9a55000 { compatible = "qcom,ci-hdrc"; reg = <0xf9a55000 0x200>, @@ -389,6 +417,22 @@ bias-disable; }; + cci_default: cci-default-state { + pins = "gpio29", "gpio30"; + function = "cci_i2c0"; + + drive-strength = <2>; + bias-disable; + }; + + cci_sleep: cci-sleep-state { + pins = "gpio29", "gpio30"; + function = "gpio"; + + drive-strength = <2>; + bias-disable; + }; + sdhc1_default_state: sdhc1-default-state { clk-pins { pins = "sdc1_clk"; From 4dd3949d17b66144fe7c39cf68ff4bedb4154f61 Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Sun, 2 Oct 2022 15:28:58 +0300 Subject: [PATCH 055/102] ARM: dts: qcom: msm8974: Add CCI bus MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add a node for the Camera Control Interface I2C bus found on MSM8974. Signed-off-by: Luca Weiss Signed-off-by: Matti Lehtimäki Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221002122859.75525-7-matti.lehtimaki@gmail.com --- arch/arm/boot/dts/qcom-msm8974.dtsi | 66 +++++++++++++++++++++++++++++ 1 file changed, 66 insertions(+) diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index 7647cf9f2f76..56bbe8784c22 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -1464,6 +1464,38 @@ bias-pull-up; }; + cci_default: cci-default-state { + cci_i2c0_default: cci-i2c0-default-pins { + pins = "gpio19", "gpio20"; + function = "cci_i2c0"; + drive-strength = <2>; + bias-disable; + }; + + cci_i2c1_default: cci-i2c1-default-pins { + pins = "gpio21", "gpio22"; + function = "cci_i2c1"; + drive-strength = <2>; + bias-disable; + }; + }; + + cci_sleep: cci-sleep-state { + cci_i2c0_sleep: cci-i2c0-sleep-pins { + pins = "gpio19", "gpio20"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + cci_i2c1_sleep: cci-i2c1-sleep-pins { + pins = "gpio21", "gpio22"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + }; + spi8_default: spi8_default { mosi { pins = "gpio45"; @@ -1616,6 +1648,40 @@ }; }; + cci: cci@fda0c000 { + compatible = "qcom,msm8974-cci"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xfda0c000 0x1000>; + interrupts = ; + clocks = <&mmcc CAMSS_TOP_AHB_CLK>, + <&mmcc CAMSS_CCI_CCI_AHB_CLK>, + <&mmcc CAMSS_CCI_CCI_CLK>; + clock-names = "camss_top_ahb", + "cci_ahb", + "cci"; + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&cci_default>; + pinctrl-1 = <&cci_sleep>; + + status = "disabled"; + + cci_i2c0: i2c-bus@0 { + reg = <0>; + clock-frequency = <100000>; + #address-cells = <1>; + #size-cells = <0>; + }; + + cci_i2c1: i2c-bus@1 { + reg = <1>; + clock-frequency = <100000>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + gpu: adreno@fdb00000 { compatible = "qcom,adreno-330.1", "qcom,adreno"; reg = <0xfdb00000 0x10000>; From fd42d456bf22a894b3dafe19d7d8302e5de5fcb3 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 13 Oct 2022 11:54:15 -0400 Subject: [PATCH 056/102] dt-bindings: vendor-prefixes: Add ALFA Network Add vendor prefix for ALFA Network Inc. https://www.alfa.com.tw/ Signed-off-by: Krzysztof Kozlowski Acked-by: Rob Herring Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221013155418.47577-1-krzysztof.kozlowski@linaro.org --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 6e323a380294..71e51b240af9 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -69,6 +69,8 @@ patternProperties: description: Annapurna Labs "^alcatel,.*": description: Alcatel + "^alfa-network,.*": + description: ALFA Network Inc. "^allegro,.*": description: Allegro DVT "^allo,.*": From 2c36509c9c7b0e9be1ec68828826a3754c5b0f28 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 13 Oct 2022 11:54:16 -0400 Subject: [PATCH 057/102] dt-bindings: arm: qcom: Document IPQ4018 boards Add compatibles for existing boards with IPQ4018 SoC: ALFA Network AP120C-AC and 8devices Jalapeno. Signed-off-by: Krzysztof Kozlowski Acked-by: Rob Herring Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221013155418.47577-2-krzysztof.kozlowski@linaro.org --- Documentation/devicetree/bindings/arm/qcom.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 47dca00518d4..cd4a7c53601c 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -29,6 +29,7 @@ description: | apq8074 apq8084 apq8096 + ipq4018 ipq6018 ipq8074 mdm9615 @@ -246,6 +247,12 @@ properties: - sony,xperia-poplar - const: qcom,msm8998 + - items: + - enum: + - 8dev,jalapeno + - alfa-network,ap120c-ac + - const: qcom,ipq4018 + - items: - enum: - qcom,ipq4019-ap-dk01.1-c1 From a35f1a75e7e2f73157a16ab56fcc01f09b133e50 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 13 Oct 2022 11:54:17 -0400 Subject: [PATCH 058/102] ARM: dts: qcom: ipq4018-ap120c-ac: Add SoC compatible Add qcom,ipq4018 compatible fallback for the SoC. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221013155418.47577-3-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dtsi b/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dtsi index af9a26fb5d4a..a5a6f3ebb274 100644 --- a/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dtsi +++ b/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dtsi @@ -6,7 +6,7 @@ / { model = "ALFA Network AP120C-AC"; - compatible = "alfa-network,ap120c-ac"; + compatible = "alfa-network,ap120c-ac", "qcom,ipq4018"; keys { compatible = "gpio-keys"; From bd40a8c773165e8175fa51d9f3fdcf00968ce8dc Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 13 Oct 2022 11:54:18 -0400 Subject: [PATCH 059/102] ARM: dts: qcom: ipq4018-jalapeno: Add SoC compatible Add qcom,ipq4018 compatible fallback for the SoC. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221013155418.47577-4-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/qcom-ipq4018-jalapeno.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom-ipq4018-jalapeno.dts b/arch/arm/boot/dts/qcom-ipq4018-jalapeno.dts index 394412619894..365fbac417fd 100644 --- a/arch/arm/boot/dts/qcom-ipq4018-jalapeno.dts +++ b/arch/arm/boot/dts/qcom-ipq4018-jalapeno.dts @@ -7,7 +7,7 @@ / { model = "8devices Jalapeno"; - compatible = "8dev,jalapeno"; + compatible = "8dev,jalapeno", "qcom,ipq4018"; }; &tlmm { From d6e437c5895e09c0e6876a6809b604c411d37c4d Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sun, 16 Oct 2022 21:22:25 -0400 Subject: [PATCH 060/102] ARM: dts: qcom: msm8974: align TLMM pin configuration with DT schema DT schema expects TLMM pin configuration nodes to be named with '-state' suffix and their optional children with '-pins' suffix. All nodes for GPIOs must also define the function property. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221017012225.8579-2-krzysztof.kozlowski@linaro.org --- .../arm/boot/dts/qcom-apq8074-dragonboard.dts | 14 ++-- .../dts/qcom-msm8974-sony-xperia-rhine.dtsi | 16 ++-- arch/arm/boot/dts/qcom-msm8974.dtsi | 77 ++++++++++--------- .../dts/qcom-msm8974pro-fairphone-fp2.dts | 20 ++--- .../boot/dts/qcom-msm8974pro-samsung-klte.dts | 36 ++++----- ...-msm8974pro-sony-xperia-shinano-castor.dts | 31 ++++---- 6 files changed, 98 insertions(+), 96 deletions(-) diff --git a/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts index 3eb9275ec6d1..438fe86b3d4d 100644 --- a/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts +++ b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts @@ -272,34 +272,34 @@ }; &tlmm { - sdc1_on: sdc1-on { - clk { + sdc1_on: sdc1-on-state { + clk-pins { pins = "sdc1_clk"; drive-strength = <16>; bias-disable; }; - cmd-data { + cmd-data-pins { pins = "sdc1_cmd", "sdc1_data"; drive-strength = <10>; bias-pull-up; }; }; - sdc2_on: sdc2-on { - clk { + sdc2_on: sdc2-on-state { + clk-pins { pins = "sdc2_clk"; drive-strength = <10>; bias-disable; }; - cmd-data { + cmd-data-pins { pins = "sdc2_cmd", "sdc2_data"; drive-strength = <6>; bias-pull-up; }; - cd { + cd-pins { pins = "gpio62"; function = "gpio"; drive-strength = <2>; diff --git a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine.dtsi b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine.dtsi index 425c42bd70f3..00542bd555e8 100644 --- a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine.dtsi @@ -442,7 +442,7 @@ }; &tlmm { - ts_int_pin: touch-int { + ts_int_pin: touch-int-state { pins = "gpio61"; function = "gpio"; drive-strength = <2>; @@ -450,34 +450,34 @@ input-enable; }; - sdc1_on: sdc1-on { - clk { + sdc1_on: sdc1-on-state { + clk-pins { pins = "sdc1_clk"; drive-strength = <16>; bias-disable; }; - cmd-data { + cmd-data-pins { pins = "sdc1_cmd", "sdc1_data"; drive-strength = <10>; bias-pull-up; }; }; - sdc2_on: sdc-on { - clk { + sdc2_on: sdc-on-state { + clk-pins { pins = "sdc2_clk"; drive-strength = <10>; bias-disable; }; - cmd-data { + cmd-data-pins { pins = "sdc2_cmd", "sdc2_data"; drive-strength = <6>; bias-pull-up; }; - cd { + cd-pins { pins = "gpio62"; function = "gpio"; drive-strength = <2>; diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index 56bbe8784c22..bdf1a4cca1c1 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -1254,61 +1254,62 @@ #interrupt-cells = <2>; interrupts = ; - sdc1_off: sdc1-off { - clk { + sdc1_off: sdc1-off-state { + clk-pins { pins = "sdc1_clk"; bias-disable; drive-strength = <2>; }; - cmd { + cmd-pins { pins = "sdc1_cmd"; bias-pull-up; drive-strength = <2>; }; - data { + data-pins { pins = "sdc1_data"; bias-pull-up; drive-strength = <2>; }; }; - sdc2_off: sdc2-off { - clk { + sdc2_off: sdc2-off-state { + clk-pins { pins = "sdc2_clk"; bias-disable; drive-strength = <2>; }; - cmd { + cmd-pins { pins = "sdc2_cmd"; bias-pull-up; drive-strength = <2>; }; - data { + data-pins { pins = "sdc2_data"; bias-pull-up; drive-strength = <2>; }; - cd { + cd-pins { pins = "gpio54"; + function = "gpio"; bias-disable; drive-strength = <2>; }; }; - blsp1_uart2_default: blsp1-uart2-default { - rx { + blsp1_uart2_default: blsp1-uart2-default-state { + rx-pins { pins = "gpio5"; function = "blsp_uart2"; drive-strength = <2>; bias-pull-up; }; - tx { + tx-pins { pins = "gpio4"; function = "blsp_uart2"; drive-strength = <4>; @@ -1316,15 +1317,15 @@ }; }; - blsp2_uart1_default: blsp2-uart1-default { - tx-rts { + blsp2_uart1_default: blsp2-uart1-default-state { + tx-rts-pins { pins = "gpio41", "gpio44"; function = "blsp_uart7"; drive-strength = <2>; bias-disable; }; - rx-cts { + rx-cts-pins { pins = "gpio42", "gpio43"; function = "blsp_uart7"; drive-strength = <2>; @@ -1332,22 +1333,22 @@ }; }; - blsp2_uart1_sleep: blsp2-uart1-sleep { + blsp2_uart1_sleep: blsp2-uart1-sleep-state { pins = "gpio41", "gpio42", "gpio43", "gpio44"; function = "gpio"; drive-strength = <2>; bias-pull-down; }; - blsp2_uart4_default: blsp2-uart4-default { - tx-rts { + blsp2_uart4_default: blsp2-uart4-default-state { + tx-rts-pins { pins = "gpio53", "gpio56"; function = "blsp_uart10"; drive-strength = <2>; bias-disable; }; - rx-cts { + rx-cts-pins { pins = "gpio54", "gpio55"; function = "blsp_uart10"; drive-strength = <2>; @@ -1355,42 +1356,42 @@ }; }; - blsp1_i2c1_default: blsp1-i2c1-default { + blsp1_i2c1_default: blsp1-i2c1-default-state { pins = "gpio2", "gpio3"; function = "blsp_i2c1"; drive-strength = <2>; bias-disable; }; - blsp1_i2c1_sleep: blsp1-i2c1-sleep { + blsp1_i2c1_sleep: blsp1-i2c1-sleep-state { pins = "gpio2", "gpio3"; function = "blsp_i2c1"; drive-strength = <2>; bias-pull-up; }; - blsp1_i2c2_default: blsp1-i2c2-default { + blsp1_i2c2_default: blsp1-i2c2-default-state { pins = "gpio6", "gpio7"; function = "blsp_i2c2"; drive-strength = <2>; bias-disable; }; - blsp1_i2c2_sleep: blsp1-i2c2-sleep { + blsp1_i2c2_sleep: blsp1-i2c2-sleep-state { pins = "gpio6", "gpio7"; function = "blsp_i2c2"; drive-strength = <2>; bias-pull-up; }; - blsp1_i2c3_default: blsp1-i2c3-default { + blsp1_i2c3_default: blsp1-i2c3-default-state { pins = "gpio10", "gpio11"; function = "blsp_i2c3"; drive-strength = <2>; bias-disable; }; - blsp1_i2c3_sleep: blsp1-i2c3-sleep { + blsp1_i2c3_sleep: blsp1-i2c3-sleep-state { pins = "gpio10", "gpio11"; function = "blsp_i2c3"; drive-strength = <2>; @@ -1401,14 +1402,14 @@ /* BLSP1_I2C5 info is missing */ - blsp1_i2c6_default: blsp1-i2c6-default { + blsp1_i2c6_default: blsp1-i2c6-default-state { pins = "gpio29", "gpio30"; function = "blsp_i2c6"; drive-strength = <2>; bias-disable; }; - blsp1_i2c6_sleep: blsp1-i2c6-sleep { + blsp1_i2c6_sleep: blsp1-i2c6-sleep-state { pins = "gpio29", "gpio30"; function = "blsp_i2c6"; drive-strength = <2>; @@ -1418,14 +1419,14 @@ /* BLSP2_I2C1 info is missing */ - blsp2_i2c2_default: blsp2-i2c2-default { + blsp2_i2c2_default: blsp2-i2c2-default-state { pins = "gpio47", "gpio48"; function = "blsp_i2c8"; drive-strength = <2>; bias-disable; }; - blsp2_i2c2_sleep: blsp2-i2c2-sleep { + blsp2_i2c2_sleep: blsp2-i2c2-sleep-state { pins = "gpio47", "gpio48"; function = "blsp_i2c8"; drive-strength = <2>; @@ -1436,28 +1437,28 @@ /* BLSP2_I2C4 info is missing */ - blsp2_i2c5_default: blsp2-i2c5-default { + blsp2_i2c5_default: blsp2-i2c5-default-state { pins = "gpio83", "gpio84"; function = "blsp_i2c11"; drive-strength = <2>; bias-disable; }; - blsp2_i2c5_sleep: blsp2-i2c5-sleep { + blsp2_i2c5_sleep: blsp2-i2c5-sleep-state { pins = "gpio83", "gpio84"; function = "blsp_i2c11"; drive-strength = <2>; bias-pull-up; }; - blsp2_i2c6_default: blsp2-i2c6-default { + blsp2_i2c6_default: blsp2-i2c6-default-state { pins = "gpio87", "gpio88"; function = "blsp_i2c12"; drive-strength = <2>; bias-disable; }; - blsp2_i2c6_sleep: blsp2-i2c6-sleep { + blsp2_i2c6_sleep: blsp2-i2c6-sleep-state { pins = "gpio87", "gpio88"; function = "blsp_i2c12"; drive-strength = <2>; @@ -1496,20 +1497,20 @@ }; }; - spi8_default: spi8_default { - mosi { + spi8_default: spi8_default-state { + mosi-pins { pins = "gpio45"; function = "blsp_spi8"; }; - miso { + miso-pins { pins = "gpio46"; function = "blsp_spi8"; }; - cs { + cs-pins { pins = "gpio47"; function = "blsp_spi8"; }; - clk { + clk-pins { pins = "gpio48"; function = "blsp_spi8"; }; diff --git a/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts b/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts index 7e63a3cef81a..38e69ed4fd1b 100644 --- a/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts +++ b/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts @@ -409,36 +409,36 @@ }; &tlmm { - sdc1_on: sdc1-on { - clk { + sdc1_on: sdc1-on-state { + clk-pins { pins = "sdc1_clk"; drive-strength = <16>; bias-disable; }; - cmd-data { + cmd-data-pins { pins = "sdc1_cmd", "sdc1_data"; drive-strength = <10>; bias-pull-up; }; }; - sdc2_on: sdc2-on { - clk { + sdc2_on: sdc2-on-state { + clk-pins { pins = "sdc2_clk"; drive-strength = <10>; bias-disable; }; - cmd-data { + cmd-data-pins { pins = "sdc2_cmd", "sdc2_data"; drive-strength = <6>; bias-pull-up; }; }; - wcnss_pin_a: wcnss-pin-active { - wlan { + wcnss_pin_a: wcnss-pin-active-state { + wlan-pins { pins = "gpio36", "gpio37", "gpio38", "gpio39", "gpio40"; function = "wlan"; @@ -446,7 +446,7 @@ bias-pull-down; }; - bt { + bt-pins { pins = "gpio35", "gpio43", "gpio44"; function = "bt"; @@ -454,7 +454,7 @@ bias-pull-down; }; - fm { + fm-pins { pins = "gpio41", "gpio42"; function = "fm"; diff --git a/arch/arm/boot/dts/qcom-msm8974pro-samsung-klte.dts b/arch/arm/boot/dts/qcom-msm8974pro-samsung-klte.dts index c87e3471b527..38a95430c7d4 100644 --- a/arch/arm/boot/dts/qcom-msm8974pro-samsung-klte.dts +++ b/arch/arm/boot/dts/qcom-msm8974pro-samsung-klte.dts @@ -707,57 +707,57 @@ &tlmm { /* This seems suspicious, but somebody with this device should look into it. */ - blsp2_uart2_pins_active: blsp2-uart2-pins-active { + blsp2_uart2_pins_active: blsp2-uart2-pins-active-state { pins = "gpio45", "gpio46", "gpio47", "gpio48"; function = "blsp_uart8"; drive-strength = <8>; bias-disable; }; - blsp2_uart2_pins_sleep: blsp2-uart2-pins-sleep { + blsp2_uart2_pins_sleep: blsp2-uart2-pins-sleep-state { pins = "gpio45", "gpio46", "gpio47", "gpio48"; function = "gpio"; drive-strength = <2>; bias-pull-down; }; - bt_pins: bt-pins { - hostwake { + bt_pins: bt-pins-state { + hostwake-pins { pins = "gpio75"; function = "gpio"; drive-strength = <16>; input-enable; }; - devwake { + devwake-pins { pins = "gpio91"; function = "gpio"; drive-strength = <2>; }; }; - sdc1_on: sdhc1-on { - clk { + sdc1_on: sdhc1-on-state { + clk-pins { pins = "sdc1_clk"; drive-strength = <4>; bias-disable; }; - cmd-data { + cmd-data-pins { pins = "sdc1_cmd", "sdc1_data"; drive-strength = <4>; bias-pull-up; }; }; - sdc3_on: sdc3-on { + sdc3_on: sdc3-on-state { pins = "gpio35", "gpio36", "gpio37", "gpio38", "gpio39", "gpio40"; function = "sdc3"; drive-strength = <8>; bias-disable; }; - sdhc3_cd_pin: sdc3-cd-on { + sdhc3_cd_pin: sdc3-cd-on-state { pins = "gpio62"; function = "gpio"; @@ -765,49 +765,49 @@ bias-disable; }; - sdc2_on: sdhc2-on { - clk { + sdc2_on: sdhc2-on-state { + clk-pins { pins = "sdc2_clk"; drive-strength = <6>; bias-disable; }; - cmd-data { + cmd-data-pins { pins = "sdc2_cmd", "sdc2_data"; drive-strength = <6>; bias-pull-up; }; }; - i2c_touchkey_pins: i2c-touchkey { + i2c_touchkey_pins: i2c-touchkey-state { pins = "gpio95", "gpio96"; function = "gpio"; input-enable; bias-pull-up; }; - i2c_led_gpioex_pins: i2c-led-gpioex { + i2c_led_gpioex_pins: i2c-led-gpioex-state { pins = "gpio120", "gpio121"; function = "gpio"; input-enable; bias-pull-down; }; - gpioex_pin: gpioex { + gpioex_pin: gpioex-state { pins = "gpio145"; function = "gpio"; bias-pull-up; drive-strength = <2>; }; - wifi_pin: wifi { + wifi_pin: wifi-state { pins = "gpio92"; function = "gpio"; input-enable; bias-pull-down; }; - panel_te_pin: panel { + panel_te_pin: panel-state { pins = "gpio12"; function = "mdp_vsync"; drive-strength = <2>; diff --git a/arch/arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts b/arch/arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts index 41765041ba7e..8265a0ff7857 100644 --- a/arch/arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts +++ b/arch/arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts @@ -549,41 +549,42 @@ }; &tlmm { - lcd_backlight_en_pin_a: lcd-backlight-vddio { + lcd_backlight_en_pin_a: lcd-backlight-vddio-state { pins = "gpio69"; + function = "gpio"; drive-strength = <10>; output-low; bias-disable; }; - sdc1_on: sdc1-on { - clk { + sdc1_on: sdc1-on-state { + clk-pins { pins = "sdc1_clk"; drive-strength = <16>; bias-disable; }; - cmd-data { + cmd-data-pins { pins = "sdc1_cmd", "sdc1_data"; drive-strength = <10>; bias-pull-up; }; }; - sdc2_on: sdc2-on { - clk { + sdc2_on: sdc2-on-state { + clk-pins { pins = "sdc2_clk"; drive-strength = <6>; bias-disable; }; - cmd-data { + cmd-data-pins { pins = "sdc2_cmd", "sdc2_data"; drive-strength = <6>; bias-pull-up; }; - cd { + cd-pins { pins = "gpio62"; function = "gpio"; drive-strength = <2>; @@ -591,22 +592,22 @@ }; }; - sdc3_on: sdc3-on { - clk { + sdc3_on: sdc3-on-state { + clk-pins { pins = "gpio40"; function = "sdc3"; drive-strength = <10>; bias-disable; }; - cmd { + cmd-pins { pins = "gpio39"; function = "sdc3"; drive-strength = <10>; bias-pull-up; }; - data { + data-pins { pins = "gpio35", "gpio36", "gpio37", "gpio38"; function = "sdc3"; drive-strength = <10>; @@ -614,7 +615,7 @@ }; }; - ts_int_pin: ts-int-pin { + ts_int_pin: ts-int-pin-state { pins = "gpio86"; function = "gpio"; drive-strength = <2>; @@ -622,7 +623,7 @@ input-enable; }; - bt_host_wake_pin: bt-host-wake { + bt_host_wake_pin: bt-host-wake-state { pins = "gpio95"; function = "gpio"; drive-strength = <2>; @@ -630,7 +631,7 @@ output-low; }; - bt_dev_wake_pin: bt-dev-wake { + bt_dev_wake_pin: bt-dev-wake-state { pins = "gpio96"; function = "gpio"; drive-strength = <2>; From fb27202bc549a4469576c5b4a18ba3b6d0dd926f Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sun, 16 Oct 2022 21:46:52 -0400 Subject: [PATCH 061/102] dt-bindings: arm: qcom: document Mikrotik RB3011 board Add compatible for existing Mikrotik RB3011 board. Signed-off-by: Krzysztof Kozlowski Acked-by: Rob Herring Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221017014653.12970-1-krzysztof.kozlowski@linaro.org --- Documentation/devicetree/bindings/arm/qcom.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index cd4a7c53601c..f8175ec3f3fb 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -264,6 +264,7 @@ properties: - items: - enum: + - mikrotik,rb3011 - qcom,ipq8064-ap148 - const: qcom,ipq8064 From 78c80faf07c06e1de7d09ded2667cae5bda9df34 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sun, 16 Oct 2022 21:46:53 -0400 Subject: [PATCH 062/102] ARM: dts: qcom: ipq8064-rb3011: Add SoC compatible Add qcom,ipq8064 compatible fallback for the SoC. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221017014653.12970-2-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/qcom-ipq8064-rb3011.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts b/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts index 86f895db9894..f908889c4f95 100644 --- a/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts +++ b/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts @@ -5,7 +5,7 @@ / { model = "MikroTik RB3011UiAS-RM"; - compatible = "mikrotik,rb3011"; + compatible = "mikrotik,rb3011", "qcom,ipq8064"; aliases { serial0 = &gsbi7_serial; From f4ec5f28af13e2b8e62ae173cb6827e137cdd8cc Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Fri, 21 Oct 2022 11:06:37 +0200 Subject: [PATCH 063/102] dt-bindings: arm: qcom: move swir,mangoh-green-wp8548 board documentation to qcom.yaml Document into the main qcom.yaml as conversion from swir.txt to dt-schema. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Neil Armstrong Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220928-mdm9615-dt-schema-fixes-v4-1-dac2dfaac703@linaro.org --- Documentation/devicetree/bindings/arm/qcom.yaml | 6 ++++++ Documentation/devicetree/bindings/arm/swir.txt | 12 ------------ 2 files changed, 6 insertions(+), 12 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/swir.txt diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index f8175ec3f3fb..7f8946dbbfda 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -275,6 +275,12 @@ properties: - qcom,ipq8074-hk10-c2 - const: qcom,ipq8074 + - description: Sierra Wireless MangOH Green with WP8548 Module + items: + - const: swir,mangoh-green-wp8548 + - const: swir,wp8548 + - const: qcom,mdm9615 + - description: Qualcomm Technologies, Inc. SC7180 IDP items: - enum: diff --git a/Documentation/devicetree/bindings/arm/swir.txt b/Documentation/devicetree/bindings/arm/swir.txt deleted file mode 100644 index 042be73a95d3..000000000000 --- a/Documentation/devicetree/bindings/arm/swir.txt +++ /dev/null @@ -1,12 +0,0 @@ -Sierra Wireless Modules device tree bindings --------------------------------------------- - -Supported Modules : - - WP8548 : Includes MDM9615 and PM8018 in a module - -Sierra Wireless modules shall have the following properties : - Required root node property - - compatible: "swir,wp8548" for the WP8548 CF3 Module - -Board compatible values: - - "swir,mangoh-green-wp8548" for the mangOH green board with the WP8548 module From c69af934db18ad165b1dc84f5450fa55afb34acb Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Fri, 21 Oct 2022 11:06:38 +0200 Subject: [PATCH 064/102] ARM: dts: qcom: mdm9615*: add SPDX-License-Identifier Replace the license blob by a clean SPDX-License-Identifier with GPL2+ or MIT even if X11 is specified in the original blob since the actual license text corresponds to a MIT license. Signed-off-by: Neil Armstrong Reviewed-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220928-mdm9615-dt-schema-fixes-v4-2-dac2dfaac703@linaro.org --- .../dts/qcom-mdm9615-wp8548-mangoh-green.dts | 39 +------------------ arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi | 39 +------------------ arch/arm/boot/dts/qcom-mdm9615.dtsi | 39 +------------------ 3 files changed, 3 insertions(+), 114 deletions(-) diff --git a/arch/arm/boot/dts/qcom-mdm9615-wp8548-mangoh-green.dts b/arch/arm/boot/dts/qcom-mdm9615-wp8548-mangoh-green.dts index 0827de5426c1..4e53b3d70195 100644 --- a/arch/arm/boot/dts/qcom-mdm9615-wp8548-mangoh-green.dts +++ b/arch/arm/boot/dts/qcom-mdm9615-wp8548-mangoh-green.dts @@ -1,46 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT /* * Device Tree Source for mangOH Green Board with WP8548 Module * * Copyright (C) 2016 BayLibre, SAS. * Author : Neil Armstrong - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. */ #include diff --git a/arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi b/arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi index 49de1821ac3a..2fe8693dc3cd 100644 --- a/arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi +++ b/arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi @@ -1,46 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT /* * Device Tree Source for Sierra Wireless WP8548 Module * * Copyright (C) 2016 BayLibre, SAS. * Author : Neil Armstrong - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. */ #include "qcom-mdm9615.dtsi" diff --git a/arch/arm/boot/dts/qcom-mdm9615.dtsi b/arch/arm/boot/dts/qcom-mdm9615.dtsi index b47c86412de2..de36e4545e75 100644 --- a/arch/arm/boot/dts/qcom-mdm9615.dtsi +++ b/arch/arm/boot/dts/qcom-mdm9615.dtsi @@ -1,46 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT /* * Device Tree Source for Qualcomm MDM9615 SoC * * Copyright (C) 2016 BayLibre, SAS. * Author : Neil Armstrong - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. */ /dts-v1/; From e58bdf93db08c16dd06bc1967e978708b44d9c83 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Fri, 21 Oct 2022 11:06:39 +0200 Subject: [PATCH 065/102] ARM: dts: qcom: mdm9615: add missing reg in cpu@0 node Fixes cpu@0: 'reg' is a required property from dtbs check. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Neil Armstrong Reviewed-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220928-mdm9615-dt-schema-fixes-v4-3-dac2dfaac703@linaro.org --- arch/arm/boot/dts/qcom-mdm9615.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/qcom-mdm9615.dtsi b/arch/arm/boot/dts/qcom-mdm9615.dtsi index de36e4545e75..eaa3236f62db 100644 --- a/arch/arm/boot/dts/qcom-mdm9615.dtsi +++ b/arch/arm/boot/dts/qcom-mdm9615.dtsi @@ -27,6 +27,7 @@ cpu0: cpu@0 { compatible = "arm,cortex-a5"; + reg = <0>; device_type = "cpu"; next-level-cache = <&L2>; }; From 75353420d0d0abe3a57cedf4a6cfa00ea05842a3 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Fri, 21 Oct 2022 11:06:40 +0200 Subject: [PATCH 066/102] ARM: dts: qcom: mdm9615: remove invalid spi-max-frequency gsbi3_spi node The spi-max-frequency property has nothing to do in the controller's node, remove it and fix the 'spi-max-frequency' was unexpected dtbs check error. Signed-off-by: Neil Armstrong Reviewed-by: Krzysztof Kozlowski Reviewed-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220928-mdm9615-dt-schema-fixes-v4-4-dac2dfaac703@linaro.org --- arch/arm/boot/dts/qcom-mdm9615.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom-mdm9615.dtsi b/arch/arm/boot/dts/qcom-mdm9615.dtsi index eaa3236f62db..366241dee522 100644 --- a/arch/arm/boot/dts/qcom-mdm9615.dtsi +++ b/arch/arm/boot/dts/qcom-mdm9615.dtsi @@ -170,7 +170,6 @@ #size-cells = <0>; reg = <0x16280000 0x1000>; interrupts = ; - spi-max-frequency = <24000000>; clocks = <&gcc GSBI3_QUP_CLK>, <&gcc GSBI3_H_CLK>; clock-names = "core", "iface"; From 3627dd180c67d3e589c38a10b4be29a0352a70b6 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Fri, 21 Oct 2022 11:06:46 +0200 Subject: [PATCH 067/102] ARM: dts: qcom: mdm9615: remove invalid interrupt-names from pl18x mmc nodes This solves the 'interrupt-names' was unexpected dtbs check error. Signed-off-by: Neil Armstrong Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220928-mdm9615-dt-schema-fixes-v4-10-dac2dfaac703@linaro.org --- arch/arm/boot/dts/qcom-mdm9615.dtsi | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm/boot/dts/qcom-mdm9615.dtsi b/arch/arm/boot/dts/qcom-mdm9615.dtsi index 366241dee522..9d950f96280d 100644 --- a/arch/arm/boot/dts/qcom-mdm9615.dtsi +++ b/arch/arm/boot/dts/qcom-mdm9615.dtsi @@ -325,7 +325,6 @@ arm,primecell-periphid = <0x00051180>; reg = <0x12180000 0x2000>; interrupts = ; - interrupt-names = "cmd_irq"; clocks = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>; clock-names = "mclk", "apb_pclk"; bus-width = <8>; @@ -345,7 +344,6 @@ status = "disabled"; reg = <0x12140000 0x2000>; interrupts = ; - interrupt-names = "cmd_irq"; clocks = <&gcc SDC2_CLK>, <&gcc SDC2_H_CLK>; clock-names = "mclk", "apb_pclk"; bus-width = <4>; From 10de96ba6d4287220962cdd82826b6a14af90e2e Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Fri, 21 Oct 2022 11:06:47 +0200 Subject: [PATCH 068/102] ARM: dts: qcom: mdm9615: remove useless amba subnode The separate amba device node doesn't add anything significant to the DT. The OF parsing code already creates amba_device or platform_device depending on the compatibility lists. Acked-by: Krzysztof Kozlowski Signed-off-by: Neil Armstrong Reviewed-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220928-mdm9615-dt-schema-fixes-v4-11-dac2dfaac703@linaro.org --- arch/arm/boot/dts/qcom-mdm9615.dtsi | 78 +++++++++++++---------------- 1 file changed, 36 insertions(+), 42 deletions(-) diff --git a/arch/arm/boot/dts/qcom-mdm9615.dtsi b/arch/arm/boot/dts/qcom-mdm9615.dtsi index 9d950f96280d..482fd246321c 100644 --- a/arch/arm/boot/dts/qcom-mdm9615.dtsi +++ b/arch/arm/boot/dts/qcom-mdm9615.dtsi @@ -314,49 +314,43 @@ qcom,ee = <0>; }; - amba { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - sdcc1: mmc@12180000 { - status = "disabled"; - compatible = "arm,pl18x", "arm,primecell"; - arm,primecell-periphid = <0x00051180>; - reg = <0x12180000 0x2000>; - interrupts = ; - clocks = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>; - clock-names = "mclk", "apb_pclk"; - bus-width = <8>; - max-frequency = <48000000>; - cap-sd-highspeed; - cap-mmc-highspeed; - vmmc-supply = <&vsdcc_fixed>; - dmas = <&sdcc1bam 2>, <&sdcc1bam 1>; - dma-names = "tx", "rx"; - assigned-clocks = <&gcc SDC1_CLK>; - assigned-clock-rates = <400000>; - }; + sdcc1: mmc@12180000 { + status = "disabled"; + compatible = "arm,pl18x", "arm,primecell"; + arm,primecell-periphid = <0x00051180>; + reg = <0x12180000 0x2000>; + interrupts = ; + clocks = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>; + clock-names = "mclk", "apb_pclk"; + bus-width = <8>; + max-frequency = <48000000>; + cap-sd-highspeed; + cap-mmc-highspeed; + vmmc-supply = <&vsdcc_fixed>; + dmas = <&sdcc1bam 2>, <&sdcc1bam 1>; + dma-names = "tx", "rx"; + assigned-clocks = <&gcc SDC1_CLK>; + assigned-clock-rates = <400000>; + }; - sdcc2: mmc@12140000 { - compatible = "arm,pl18x", "arm,primecell"; - arm,primecell-periphid = <0x00051180>; - status = "disabled"; - reg = <0x12140000 0x2000>; - interrupts = ; - clocks = <&gcc SDC2_CLK>, <&gcc SDC2_H_CLK>; - clock-names = "mclk", "apb_pclk"; - bus-width = <4>; - cap-sd-highspeed; - cap-mmc-highspeed; - max-frequency = <48000000>; - no-1-8-v; - vmmc-supply = <&vsdcc_fixed>; - dmas = <&sdcc2bam 2>, <&sdcc2bam 1>; - dma-names = "tx", "rx"; - assigned-clocks = <&gcc SDC2_CLK>; - assigned-clock-rates = <400000>; - }; + sdcc2: mmc@12140000 { + compatible = "arm,pl18x", "arm,primecell"; + arm,primecell-periphid = <0x00051180>; + status = "disabled"; + reg = <0x12140000 0x2000>; + interrupts = ; + clocks = <&gcc SDC2_CLK>, <&gcc SDC2_H_CLK>; + clock-names = "mclk", "apb_pclk"; + bus-width = <4>; + cap-sd-highspeed; + cap-mmc-highspeed; + max-frequency = <48000000>; + no-1-8-v; + vmmc-supply = <&vsdcc_fixed>; + dmas = <&sdcc2bam 2>, <&sdcc2bam 1>; + dma-names = "tx", "rx"; + assigned-clocks = <&gcc SDC2_CLK>; + assigned-clock-rates = <400000>; }; tcsr: syscon@1a400000 { From fadae8fe73c6b30f759189209c24746a1dae7b1a Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Fri, 21 Oct 2022 17:27:53 +0200 Subject: [PATCH 069/102] ARM: dts: qcom: mdm9615: align pinctrl subnodes with dt-schema bindings Align the MDM9615 DT to the expected subnodes namings in the dt-schema bindings. Reviewed-by: Krzysztof Kozlowski Reviewed-by: Konrad Dybcio Signed-off-by: Neil Armstrong Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221005-mdm9615-pinctrl-yaml-v3-1-e5e045644971@linaro.org --- .../dts/qcom-mdm9615-wp8548-mangoh-green.dts | 8 +++---- arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi | 22 +++++++++---------- 2 files changed, 15 insertions(+), 15 deletions(-) diff --git a/arch/arm/boot/dts/qcom-mdm9615-wp8548-mangoh-green.dts b/arch/arm/boot/dts/qcom-mdm9615-wp8548-mangoh-green.dts index 4e53b3d70195..30a110984597 100644 --- a/arch/arm/boot/dts/qcom-mdm9615-wp8548-mangoh-green.dts +++ b/arch/arm/boot/dts/qcom-mdm9615-wp8548-mangoh-green.dts @@ -45,8 +45,8 @@ * - 42: IOT0_GPIO1 and SD Card Detect */ - gpioext1_pins: gpioext1_pins { - pins { + gpioext1_pins: gpioext1-state { + gpioext1-pins { pins = "gpio2"; function = "gpio"; input-enable; @@ -54,8 +54,8 @@ }; }; - sdc_cd_pins: sdc_cd_pins { - pins { + sdc_cd_pins: sdc-cd-state { + sdc-cd-pins { pins = "gpio42"; function = "gpio"; drive-strength = <2>; diff --git a/arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi b/arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi index 2fe8693dc3cd..92c8003dac25 100644 --- a/arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi +++ b/arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi @@ -22,8 +22,8 @@ pinctrl-0 = <&reset_out_pins>; pinctrl-names = "default"; - gsbi3_pins: gsbi3_pins { - mux { + gsbi3_pins: gsbi3-state { + gsbi3-pins { pins = "gpio8", "gpio9", "gpio10", "gpio11"; function = "gsbi3"; drive-strength = <8>; @@ -31,8 +31,8 @@ }; }; - gsbi4_pins: gsbi4_pins { - mux { + gsbi4_pins: gsbi4-state { + gsbi4-pins { pins = "gpio12", "gpio13", "gpio14", "gpio15"; function = "gsbi4"; drive-strength = <8>; @@ -40,15 +40,15 @@ }; }; - gsbi5_i2c_pins: gsbi5_i2c_pins { - pin16 { + gsbi5_i2c_pins: gsbi5-i2c-state { + sda-pins { pins = "gpio16"; function = "gsbi5_i2c"; drive-strength = <8>; bias-disable; }; - pin17 { + scl-pins { pins = "gpio17"; function = "gsbi5_i2c"; drive-strength = <2>; @@ -56,8 +56,8 @@ }; }; - gsbi5_uart_pins: gsbi5_uart_pins { - mux { + gsbi5_uart_pins: gsbi5-uart-state { + gsbi5-uart-pins { pins = "gpio18", "gpio19"; function = "gsbi5_uart"; drive-strength = <8>; @@ -65,8 +65,8 @@ }; }; - reset_out_pins: reset_out_pins { - pins { + reset_out_pins: reset-out-state { + reset-out-pins { pins = "gpio66"; function = "gpio"; drive-strength = <2>; From c7e34943d909f1a7872603d834347b478466cb09 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Fri, 21 Oct 2022 17:27:54 +0200 Subject: [PATCH 070/102] ARM: dts: qcom: mdm9615: wp8548-mangoh-green: fix sx150xq node names and probe-reset property Fix the sx150xq node names to pinctrl and use the right probe-reset property. Reviewed-by: Konrad Dybcio Reviewed-by: Krzysztof Kozlowski Signed-off-by: Neil Armstrong Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221005-mdm9615-pinctrl-yaml-v3-2-e5e045644971@linaro.org --- .../boot/dts/qcom-mdm9615-wp8548-mangoh-green.dts | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/qcom-mdm9615-wp8548-mangoh-green.dts b/arch/arm/boot/dts/qcom-mdm9615-wp8548-mangoh-green.dts index 30a110984597..a8304769b509 100644 --- a/arch/arm/boot/dts/qcom-mdm9615-wp8548-mangoh-green.dts +++ b/arch/arm/boot/dts/qcom-mdm9615-wp8548-mangoh-green.dts @@ -116,7 +116,7 @@ #size-cells = <0>; reg = <4>; - gpioext0: gpio@3e { + gpioext0: pinctrl@3e { /* GPIO Expander 0 Mapping : * - 0: ARDUINO_RESET_Level shift * - 1: BattChrgr_PG_N @@ -142,7 +142,7 @@ interrupt-parent = <&gpioext1>; interrupts = <0 IRQ_TYPE_EDGE_FALLING>; - probe-reset; + semtech,probe-reset; gpio-controller; interrupt-controller; @@ -154,7 +154,7 @@ #size-cells = <0>; reg = <5>; - gpioext1: gpio@3f { + gpioext1: pinctrl@3f { /* GPIO Expander 1 Mapping : * - 0: GPIOEXP_INT1 * - 1: Battery detect @@ -183,7 +183,7 @@ interrupt-parent = <&msmgpio>; interrupts = <0 IRQ_TYPE_EDGE_FALLING>; - probe-reset; + semtech,probe-reset; gpio-controller; interrupt-controller; @@ -195,7 +195,7 @@ #size-cells = <0>; reg = <6>; - gpioext2: gpio@70 { + gpioext2: pinctrl@70 { /* GPIO Expander 2 Mapping : * - 0: USB_HUB_INTn * - 1: HUB_CONNECT @@ -221,7 +221,7 @@ interrupt-parent = <&gpioext1>; interrupts = <14 IRQ_TYPE_EDGE_FALLING>; - probe-reset; + semtech,probe-reset; gpio-controller; interrupt-controller; From 85055a1eecc17f38d92b36f6b774bb37a1cc7a53 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Fri, 21 Oct 2022 17:27:57 +0200 Subject: [PATCH 071/102] ARM: dts: qcom-msm8660: align RPM regulators node name with bindings Node names should be generic and new DT schema expects RPM regulators node to be just "regulators". Signed-off-by: Neil Armstrong Reviewed-by: Krzysztof Kozlowski Reviewed-by: Linus Walleij Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221005-mdm9615-pinctrl-yaml-v3-5-e5e045644971@linaro.org --- arch/arm/boot/dts/qcom-msm8660.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom-msm8660.dtsi index a5e02301178f..daa982fed1c1 100644 --- a/arch/arm/boot/dts/qcom-msm8660.dtsi +++ b/arch/arm/boot/dts/qcom-msm8660.dtsi @@ -496,7 +496,7 @@ clock-names = "pxo"; }; - pm8901-regulators { + regulators-0 { compatible = "qcom,rpm-pm8901-regulators"; pm8901_l0: l0 {}; @@ -520,7 +520,7 @@ pm8901_mvs: mvs {}; }; - pm8058-regulators { + regulators-1 { compatible = "qcom,rpm-pm8058-regulators"; pm8058_l0: l0 {}; From c9713e4ede1e5d044b64fe4d3cbb84223625637f Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Tue, 25 Oct 2022 01:38:17 +0200 Subject: [PATCH 072/102] ARM: dts: qcom: ipq8064: disable mmc-ddr-1_8v for sdcc1 It was reported non working mmc with this option enabled. Both mmc for ipq8064 are supplied by a fixed 3.3v regulator so mmc can't be run at 1.8v. Disable it to restore correct functionality of this SoC feature. Tested-by: Hendrik Koerner Signed-off-by: Christian Marangi Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221024233817.27410-1-ansuelsmth@gmail.com --- arch/arm/boot/dts/qcom-ipq8064.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index a79f8b5fe12d..8d5cbe03e104 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -756,7 +756,6 @@ non-removable; cap-sd-highspeed; cap-mmc-highspeed; - mmc-ddr-1_8v; vmmc-supply = <&vsdcc_fixed>; dmas = <&sdcc1bam 2>, <&sdcc1bam 1>; dma-names = "tx", "rx"; From bdc51f42d25af15c91ec1b1a20c595ec33b3ea8e Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 4 Nov 2022 15:08:39 -0400 Subject: [PATCH 073/102] dt-bindings: sram: qcom,imem: document SDX65 Add compatible for SDX65 IMEM. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221104190840.134733-1-krzysztof.kozlowski@linaro.org --- Documentation/devicetree/bindings/sram/qcom,imem.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/sram/qcom,imem.yaml b/Documentation/devicetree/bindings/sram/qcom,imem.yaml index e9199190198d..665c06e14f79 100644 --- a/Documentation/devicetree/bindings/sram/qcom,imem.yaml +++ b/Documentation/devicetree/bindings/sram/qcom,imem.yaml @@ -25,6 +25,7 @@ properties: - qcom,sdm630-imem - qcom,sdm845-imem - qcom,sdx55-imem + - qcom,sdx65-imem - const: syscon - const: simple-mfd From 9b4dc87d352d0109c36efeea60cb75d14ac50ef1 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 4 Nov 2022 15:08:40 -0400 Subject: [PATCH 074/102] ARM: dts: qcom: sdx65: add dedicated IMEM and syscon compatibles Add proper compatibles to the IMEM device node: 1. syscon as required by the bindings, even though it is not currently used, 2. dedicated compatible as required for syscon and simple-mfd nodes. Align the node name to match IMEM type of device - SRAM. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221104190840.134733-2-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/qcom-sdx65.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi index 4cd405db5500..b073e0c63df4 100644 --- a/arch/arm/boot/dts/qcom-sdx65.dtsi +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi @@ -441,8 +441,8 @@ interrupt-controller; }; - imem@1468f000 { - compatible = "simple-mfd"; + sram@1468f000 { + compatible = "qcom,sdx65-imem", "syscon", "simple-mfd"; reg = <0x1468f000 0x1000>; ranges = <0x0 0x1468f000 0x1000>; #address-cells = <1>; From 0d6e44e257ec53b41c2969130e0eb97b0a41b1d6 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Sat, 1 Oct 2022 00:20:52 +0300 Subject: [PATCH 075/102] ARM: dts: qcom: mdm9615: drop unit ids from PMIC nodes On MDM9615 the PMICs are connected using SSBI devices, which do not have any addressing scheme. Drop the unused unit ids from PMIC device nodes. Signed-off-by: Dmitry Baryshkov Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220930212052.894834-2-dmitry.baryshkov@linaro.org --- arch/arm/boot/dts/qcom-mdm9615.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom-mdm9615.dtsi b/arch/arm/boot/dts/qcom-mdm9615.dtsi index 482fd246321c..b0fe1d95d88f 100644 --- a/arch/arm/boot/dts/qcom-mdm9615.dtsi +++ b/arch/arm/boot/dts/qcom-mdm9615.dtsi @@ -246,7 +246,7 @@ reg = <0x500000 0x1000>; qcom,controller-type = "pmic-arbiter"; - pmicintc: pmic@0 { + pmicintc: pmic { compatible = "qcom,pm8018", "qcom,pm8921"; interrupts = ; #interrupt-cells = <2>; From 2f7fa366bac9aa2addb83ffa5f208291f4dbe4d8 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 14 Oct 2022 00:12:41 +0200 Subject: [PATCH 076/102] ARM: dts: qcom: Drop MMCI interrupt-names The pl18x MMCI driver does not use the interrupt-names property, the binding document has been updated to recommend this property be unused, remove it. Reviewed-by: Linus Walleij Signed-off-by: Marek Vasut Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221013221242.218808-2-marex@denx.de --- arch/arm/boot/dts/qcom-apq8064.dtsi | 3 --- arch/arm/boot/dts/qcom-ipq8064.dtsi | 2 -- arch/arm/boot/dts/qcom-msm8660.dtsi | 5 ----- arch/arm/boot/dts/qcom-msm8960.dtsi | 2 -- 4 files changed, 12 deletions(-) diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index d799e6eb4b0d..0da9623ea084 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -1091,7 +1091,6 @@ status = "disabled"; reg = <0x12180000 0x2000>; interrupts = ; - interrupt-names = "cmd_irq"; clocks = <&gcc SDC3_CLK>, <&gcc SDC3_H_CLK>; clock-names = "mclk", "apb_pclk"; bus-width = <4>; @@ -1119,7 +1118,6 @@ status = "disabled"; reg = <0x121c0000 0x2000>; interrupts = ; - interrupt-names = "cmd_irq"; clocks = <&gcc SDC4_CLK>, <&gcc SDC4_H_CLK>; clock-names = "mclk", "apb_pclk"; bus-width = <4>; @@ -1150,7 +1148,6 @@ arm,primecell-periphid = <0x00051180>; reg = <0x12400000 0x2000>; interrupts = ; - interrupt-names = "cmd_irq"; clocks = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>; clock-names = "mclk", "apb_pclk"; bus-width = <8>; diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index 8d5cbe03e104..7e784b0995da 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -728,7 +728,6 @@ status = "disabled"; reg = <0x12180000 0x2000>; interrupts = ; - interrupt-names = "cmd_irq"; clocks = <&gcc SDC3_CLK>, <&gcc SDC3_H_CLK>; clock-names = "mclk", "apb_pclk"; bus-width = <8>; @@ -748,7 +747,6 @@ arm,primecell-periphid = <0x00051180>; reg = <0x12400000 0x2000>; interrupts = ; - interrupt-names = "cmd_irq"; clocks = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>; clock-names = "mclk", "apb_pclk"; bus-width = <8>; diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom-msm8660.dtsi index daa982fed1c1..86f76d0feff4 100644 --- a/arch/arm/boot/dts/qcom-msm8660.dtsi +++ b/arch/arm/boot/dts/qcom-msm8660.dtsi @@ -574,7 +574,6 @@ arm,primecell-periphid = <0x00051180>; reg = <0x12400000 0x8000>; interrupts = ; - interrupt-names = "cmd_irq"; clocks = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>; clock-names = "mclk", "apb_pclk"; bus-width = <8>; @@ -590,7 +589,6 @@ arm,primecell-periphid = <0x00051180>; reg = <0x12140000 0x8000>; interrupts = ; - interrupt-names = "cmd_irq"; clocks = <&gcc SDC2_CLK>, <&gcc SDC2_H_CLK>; clock-names = "mclk", "apb_pclk"; bus-width = <8>; @@ -605,7 +603,6 @@ status = "disabled"; reg = <0x12180000 0x8000>; interrupts = ; - interrupt-names = "cmd_irq"; clocks = <&gcc SDC3_CLK>, <&gcc SDC3_H_CLK>; clock-names = "mclk", "apb_pclk"; bus-width = <4>; @@ -621,7 +618,6 @@ status = "disabled"; reg = <0x121c0000 0x8000>; interrupts = ; - interrupt-names = "cmd_irq"; clocks = <&gcc SDC4_CLK>, <&gcc SDC4_H_CLK>; clock-names = "mclk", "apb_pclk"; bus-width = <4>; @@ -636,7 +632,6 @@ status = "disabled"; reg = <0x12200000 0x8000>; interrupts = ; - interrupt-names = "cmd_irq"; clocks = <&gcc SDC5_CLK>, <&gcc SDC5_H_CLK>; clock-names = "mclk", "apb_pclk"; bus-width = <4>; diff --git a/arch/arm/boot/dts/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom-msm8960.dtsi index 30abf53b062d..cd1178e809bf 100644 --- a/arch/arm/boot/dts/qcom-msm8960.dtsi +++ b/arch/arm/boot/dts/qcom-msm8960.dtsi @@ -303,7 +303,6 @@ status = "disabled"; reg = <0x12180000 0x8000>; interrupts = ; - interrupt-names = "cmd_irq"; clocks = <&gcc SDC3_CLK>, <&gcc SDC3_H_CLK>; clock-names = "mclk", "apb_pclk"; bus-width = <4>; @@ -320,7 +319,6 @@ arm,primecell-periphid = <0x00051180>; reg = <0x12400000 0x8000>; interrupts = ; - interrupt-names = "cmd_irq"; clocks = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>; clock-names = "mclk", "apb_pclk"; bus-width = <8>; From f206bbb6e1d0ec59d8662222637bca9c0216464a Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Mon, 31 Oct 2022 18:51:16 +0100 Subject: [PATCH 077/102] ARM: dts: qcom: pm8226: fix regulators node name Adjust the node name to match bindings and fix the validation warning. Reviewed-by: Konrad Dybcio Reviewed-by: Krzysztof Kozlowski Reviewed-by: Neil Armstrong Signed-off-by: Luca Weiss Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221031175119.939860-1-luca@z3ntu.xyz --- arch/arm/boot/dts/qcom-pm8226.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom-pm8226.dtsi b/arch/arm/boot/dts/qcom-pm8226.dtsi index 0c10fa16a0f3..eb36d3662464 100644 --- a/arch/arm/boot/dts/qcom-pm8226.dtsi +++ b/arch/arm/boot/dts/qcom-pm8226.dtsi @@ -108,7 +108,7 @@ #address-cells = <1>; #size-cells = <0>; - pm8226_spmi_regulators: pm8226-regulators { + pm8226_spmi_regulators: regulators { compatible = "qcom,pm8226-regulators"; }; From 7c0682e7a46d1190ecf43a8e92214f237cc978a9 Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Mon, 31 Oct 2022 18:51:17 +0100 Subject: [PATCH 078/102] ARM: dts: qcom: pm8941: adjust coincell node name to bindings The spmi-pmic bindings say that pm8941-coincell should be called 'charger'. Reviewed-by: Konrad Dybcio Signed-off-by: Luca Weiss Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221031175119.939860-2-luca@z3ntu.xyz --- arch/arm/boot/dts/qcom-pm8941.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom-pm8941.dtsi b/arch/arm/boot/dts/qcom-pm8941.dtsi index 1ac477878c67..7a4467e03aa1 100644 --- a/arch/arm/boot/dts/qcom-pm8941.dtsi +++ b/arch/arm/boot/dts/qcom-pm8941.dtsi @@ -131,7 +131,7 @@ qcom,external-resistor-micro-ohms = <10000>; }; - pm8941_coincell: coincell@2800 { + pm8941_coincell: charger@2800 { compatible = "qcom,pm8941-coincell"; reg = <0x2800>; status = "disabled"; From 52c47b894b260c3e5102bb4b3e77772734508bcf Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Mon, 31 Oct 2022 18:57:16 +0100 Subject: [PATCH 079/102] ARM: dts: qcom: pm8941: rename misc node name The spmi-pmic bindings is now using usb-detect@ for this node, so adjust the dts to match. Signed-off-by: Luca Weiss Reviewed-by: Neil Armstrong Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221031175717.942237-3-luca@z3ntu.xyz --- arch/arm/boot/dts/qcom-pm8941.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom-pm8941.dtsi b/arch/arm/boot/dts/qcom-pm8941.dtsi index 7a4467e03aa1..863e598591b7 100644 --- a/arch/arm/boot/dts/qcom-pm8941.dtsi +++ b/arch/arm/boot/dts/qcom-pm8941.dtsi @@ -27,7 +27,7 @@ bias-pull-up; }; - usb_id: misc@900 { + usb_id: usb-detect@900 { compatible = "qcom,pm8941-misc"; reg = <0x900>; interrupts = <0x0 0x9 0 IRQ_TYPE_EDGE_BOTH>; From 31eab2bb9c1ddf8a9ab5a1e4dc59446eeed2ea9e Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Mon, 31 Oct 2022 19:10:21 +0100 Subject: [PATCH 080/102] ARM: dts: qcom: pma8084: fix vadc channel node names The spmi-vadc bindings require the '@' in the node. Additionally change the node name to adc-chan which both makes it a generic node name and also removes the underscore from it. Signed-off-by: Luca Weiss Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221031181022.947412-1-luca@z3ntu.xyz --- arch/arm/boot/dts/qcom-pma8084.dtsi | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/qcom-pma8084.dtsi b/arch/arm/boot/dts/qcom-pma8084.dtsi index 0da6c1a5d547..2dd4c6aa71c9 100644 --- a/arch/arm/boot/dts/qcom-pma8084.dtsi +++ b/arch/arm/boot/dts/qcom-pma8084.dtsi @@ -64,22 +64,27 @@ #size-cells = <0>; #io-channel-cells = <1>; - die_temp { + adc-chan@8 { reg = ; }; - ref_625mv { + + adc-chan@9 { reg = ; }; - ref_1250v { + + adc-chan@a { reg = ; }; - ref_buf_625mv { + + adc-chan@c { reg = ; }; - ref_gnd { + + adc-chan@e { reg = ; }; - ref_vdd { + + adc-chan@f { reg = ; }; }; From c5ef315a38fb36779adadbafbcce2274a3dec0d2 Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Mon, 31 Oct 2022 19:10:22 +0100 Subject: [PATCH 081/102] ARM: dts: qcom: pm8941: fix vadc channel node names The spmi-vadc bindings require the '@' in the node. Additionally change the node name to adc-chan which both makes it a generic node name and also removes the underscore from it. At the same time sort the nodes by reg value. Reviewed-by: Konrad Dybcio Signed-off-by: Luca Weiss Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221031181022.947412-2-luca@z3ntu.xyz --- arch/arm/boot/dts/qcom-pm8941.dtsi | 25 ++++++++++++++++--------- 1 file changed, 16 insertions(+), 9 deletions(-) diff --git a/arch/arm/boot/dts/qcom-pm8941.dtsi b/arch/arm/boot/dts/qcom-pm8941.dtsi index 863e598591b7..a9e83836bf86 100644 --- a/arch/arm/boot/dts/qcom-pm8941.dtsi +++ b/arch/arm/boot/dts/qcom-pm8941.dtsi @@ -101,26 +101,33 @@ #size-cells = <0>; #io-channel-cells = <1>; - bat_temp { - reg = ; + + adc-chan@6 { + reg = ; }; - die_temp { + + adc-chan@8 { reg = ; }; - ref_625mv { + + adc-chan@9 { reg = ; }; - ref_1250v { + + adc-chan@a { reg = ; }; - ref_gnd { + + adc-chan@e { reg = ; }; - ref_vdd { + + adc-chan@f { reg = ; }; - vbat_sns { - reg = ; + + adc-chan@30 { + reg = ; }; }; From f659cd2770767c5ceabadace1b334df9de468eae Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Mon, 31 Oct 2022 19:24:55 +0100 Subject: [PATCH 082/102] ARM: dts: qcom: pm8941: fix iadc node The spmi-pmic bindings require the iadc node to be named just 'adc'. Reviewed-by: Konrad Dybcio Reviewed-by: Neil Armstrong Signed-off-by: Luca Weiss Reviewed-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221031182456.952648-2-luca@z3ntu.xyz --- arch/arm/boot/dts/qcom-pm8941.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom-pm8941.dtsi b/arch/arm/boot/dts/qcom-pm8941.dtsi index a9e83836bf86..cd957a1e7cdf 100644 --- a/arch/arm/boot/dts/qcom-pm8941.dtsi +++ b/arch/arm/boot/dts/qcom-pm8941.dtsi @@ -131,7 +131,7 @@ }; }; - pm8941_iadc: iadc@3600 { + pm8941_iadc: adc@3600 { compatible = "qcom,pm8941-iadc", "qcom,spmi-iadc"; reg = <0x3600>; interrupts = <0x0 0x36 0x0 IRQ_TYPE_EDGE_RISING>; From cc677f9006c4277bd25881c6713e5ef79bddd79a Mon Sep 17 00:00:00 2001 From: Melody Olvera Date: Wed, 26 Oct 2022 13:04:27 -0700 Subject: [PATCH 083/102] dt-bindings: arm: qcom: Document QDU1000/QRU1000 SoCs and boards Document the QDU1000 and QRU1000 SoC bindings and the boards that use them. Signed-off-by: Melody Olvera Reviewed-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221026200429.162212-3-quic_molvera@quicinc.com --- Documentation/devicetree/bindings/arm/qcom.yaml | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 7f8946dbbfda..17a4364f5313 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -41,6 +41,8 @@ description: | msm8996 msm8998 qcs404 + qdu1000 + qru1000 sa8155p sa8540p sc7180 @@ -77,6 +79,7 @@ description: | mtp qrd sbc + x100 The 'soc_version' and 'board_version' elements take the form of v. where the minor number may be omitted when it's zero, i.e. v1.0 is the same @@ -281,6 +284,19 @@ properties: - const: swir,wp8548 - const: qcom,mdm9615 + - description: Qualcomm Technologies, Inc. Distributed Unit 1000 platform + items: + - enum: + - qcom,qdu1000-idp + - qcom,qdu1000-x100 + - const: qcom,qdu1000 + + - description: Qualcomm Technologies, Inc. Radio Unit 1000 platform + items: + - enum: + - qcom,qru1000-idp + - const: qcom,qru1000 + - description: Qualcomm Technologies, Inc. SC7180 IDP items: - enum: From f1714f85d40e53645139824d0d903c1e050cdf00 Mon Sep 17 00:00:00 2001 From: Sheng-Liang Pan Date: Mon, 7 Nov 2022 17:43:41 +0800 Subject: [PATCH 084/102] dt-bindings: arm: qcom: Separate LTE/WIFI SKU for sc7280-evoker evoker will have WIFI/LTE SKU, separate it for each different setting. Signed-off-by: Sheng-Liang Pan Reviewed-by: Krzysztof Kozlowski Reviewed-by: Douglas Anderson Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221107173954.v11.1.Ic800ee7b604bcb0519ca404600d7be2352725686@changeid --- Documentation/devicetree/bindings/arm/qcom.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 17a4364f5313..bfd317781257 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -607,6 +607,11 @@ properties: - const: google,evoker - const: qcom,sc7280 + - description: Google Evoker with LTE (newest rev) + items: + - const: google,evoker-sku512 + - const: qcom,sc7280 + - description: Google Herobrine (newest rev) items: - const: google,herobrine From ad789f571d93419882aad66515640f649e63bf95 Mon Sep 17 00:00:00 2001 From: Rayyan Ansari Date: Sun, 2 Oct 2022 15:28:53 +0300 Subject: [PATCH 085/102] ARM: dts: qcom: msm8226: Add MMCC node MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add a node for the Multimedia Clock Controller found on MSM8226. Signed-off-by: Rayyan Ansari Signed-off-by: Matti Lehtimäki Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221002122859.75525-2-matti.lehtimaki@gmail.com --- arch/arm/boot/dts/qcom-msm8226.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/qcom-msm8226.dtsi b/arch/arm/boot/dts/qcom-msm8226.dtsi index 81f30b66f4d7..4cba25dad8d6 100644 --- a/arch/arm/boot/dts/qcom-msm8226.dtsi +++ b/arch/arm/boot/dts/qcom-msm8226.dtsi @@ -372,6 +372,14 @@ #power-domain-cells = <1>; }; + mmcc: clock-controller@fd8c0000 { + compatible = "qcom,mmcc-msm8226"; + reg = <0xfd8c0000 0x6000>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; + tlmm: pinctrl@fd510000 { compatible = "qcom,msm8226-pinctrl"; reg = <0xfd510000 0x4000>; From a4633387ce9481a10068f4e6a939c5a694e3f2da Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 7 Nov 2022 19:59:31 +0100 Subject: [PATCH 086/102] ARM: dts: qcom-apq8060: align TLMM pin configuration with DT schema DT schema expects TLMM pin configuration nodes to be named with '-state' suffix and their optional children with '-pins' suffix. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221107185931.22075-2-krzysztof.kozlowski@linaro.org --- .../arm/boot/dts/qcom-apq8060-dragonboard.dts | 126 +++++++----------- 1 file changed, 51 insertions(+), 75 deletions(-) diff --git a/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts b/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts index 0baf202a82ba..7a4c59e04af6 100644 --- a/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts +++ b/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts @@ -789,28 +789,24 @@ &tlmm { /* eMMC pins, all 8 data lines connected */ - dragon_sdcc1_pins: sdcc1 { - mux { - pins = "gpio159", "gpio160", "gpio161", - "gpio162", "gpio163", "gpio164", - "gpio165", "gpio166", "gpio167", - "gpio168"; - function = "sdc1"; - }; - clk { + dragon_sdcc1_pins: sdcc1-state { + clk-pins { pins = "gpio167"; /* SDC1 CLK */ + function = "sdc1"; drive-strength = <16>; bias-disable; }; - cmd { + cmd-pins { pins = "gpio168"; /* SDC1 CMD */ + function = "sdc1"; drive-strength = <10>; bias-pull-up; }; - data { + data-pins { /* SDC1 D0 to D7 */ pins = "gpio159", "gpio160", "gpio161", "gpio162", "gpio163", "gpio164", "gpio165", "gpio166"; + function = "sdc1"; drive-strength = <10>; bias-pull-up; }; @@ -820,18 +816,18 @@ * The SDCC3 pins are hardcoded (non-muxable) but need some pin * configuration. */ - dragon_sdcc3_pins: sdcc3 { - clk { + dragon_sdcc3_pins: sdcc3-state { + clk-pins { pins = "sdc3_clk"; drive-strength = <8>; bias-disable; }; - cmd { + cmd-pins { pins = "sdc3_cmd"; drive-strength = <8>; bias-pull-up; }; - data { + data-pins { pins = "sdc3_data"; drive-strength = <8>; bias-pull-up; @@ -839,101 +835,82 @@ }; /* Second SD card slot pins */ - dragon_sdcc5_pins: sdcc5 { - mux { - pins = "gpio95", "gpio96", "gpio97", - "gpio98", "gpio99", "gpio100"; - function = "sdc5"; - }; - clk { + dragon_sdcc5_pins: sdcc5-state { + clk-pins { pins = "gpio97"; /* SDC5 CLK */ + function = "sdc5"; drive-strength = <16>; bias-disable; }; - cmd { + cmd-pins { pins = "gpio95"; /* SDC5 CMD */ + function = "sdc5"; drive-strength = <10>; bias-pull-up; }; - data { + data-pins { /* SDC5 D0 to D3 */ pins = "gpio96", "gpio98", "gpio99", "gpio100"; + function = "sdc5"; drive-strength = <10>; bias-pull-up; }; }; - dragon_gsbi3_i2c_pins: gsbi3_i2c { - mux { - pins = "gpio43", "gpio44"; - function = "gsbi3"; - }; - pinconf { - pins = "gpio43", "gpio44"; - drive-strength = <8>; - /* These have external pull-up 2.2kOhm to 1.8V */ - bias-disable; - }; + dragon_gsbi3_i2c_pins: gsbi3-i2c-state { + pins = "gpio43", "gpio44"; + function = "gsbi3"; + drive-strength = <8>; + /* These have external pull-up 2.2kOhm to 1.8V */ + bias-disable; }; - dragon_gsbi8_i2c_pins: gsbi8_i2c { - mux { - pins = "gpio64", "gpio65"; - function = "gsbi8"; - }; - pinconf { - pins = "gpio64", "gpio65"; - drive-strength = <16>; - /* These have external pull-up 2.2kOhm to 1.8V */ - bias-disable; - }; + dragon_gsbi8_i2c_pins: gsbi8-i2c-state { + pins = "gpio64", "gpio65"; + function = "gsbi8"; + drive-strength = <16>; + /* These have external pull-up 2.2kOhm to 1.8V */ + bias-disable; }; - dragon_gsbi12_i2c_pins: gsbi12_i2c { - mux { - pins = "gpio115", "gpio116"; - function = "gsbi12"; - }; - pinconf { - pins = "gpio115", "gpio116"; - drive-strength = <16>; - /* These have external pull-up 4.7kOhm to 1.8V */ - bias-disable; - }; + dragon_gsbi12_i2c_pins: gsbi12-i2c-state { + pins = "gpio115", "gpio116"; + function = "gsbi12"; + drive-strength = <16>; + /* These have external pull-up 4.7kOhm to 1.8V */ + bias-disable; }; /* Primary serial port uart 0 pins */ - dragon_gsbi12_serial_pins: gsbi12_serial { - mux { - pins = "gpio117", "gpio118"; - function = "gsbi12"; - }; - tx { + dragon_gsbi12_serial_pins: gsbi12-serial-state { + tx-pins { pins = "gpio117"; + function = "gsbi12"; drive-strength = <8>; bias-disable; }; - rx { + rx-pins { pins = "gpio118"; + function = "gsbi12"; drive-strength = <2>; bias-pull-up; }; }; - dragon_ebi2_pins: ebi2 { + dragon_ebi2_pins: ebi2-state { /* * Pins used by EBI2 on the Dragonboard, actually only * CS2 is used by a real peripheral. CS0 is just * routed to a test point. */ - mux0 { + mux0-pins { pins = /* "gpio39", CS1A_N this is not good to mux */ "gpio40", /* CS2A_N */ "gpio134"; /* CS0_N testpoint TP29 */ function = "ebi2cs"; }; - mux1 { + mux1-pins { pins = /* EBI2_ADDR_7 downto EBI2_ADDR_0 address bus */ "gpio123", "gpio124", "gpio125", "gpio126", @@ -951,22 +928,21 @@ }; /* Interrupt line for the KXSD9 accelerometer */ - dragon_kxsd9_gpios: kxsd9 { - irq { - pins = "gpio57"; /* IRQ line */ - bias-pull-up; - }; + dragon_kxsd9_gpios: kxsd9-state { + pins = "gpio57"; /* IRQ line */ + function = "gpio"; + bias-pull-up; }; - dragon_tma340_gpios: tma340 { - reset { + dragon_tma340_gpios: tma340-state { + reset-pins { /* RESET line, TS_ATTN, WAKE_CTP */ pins = "gpio58"; function = "gpio"; drive-strength = <6>; bias-disable; }; - irq { + irq-pins { pins = "gpio61"; /* IRQ line */ function = "gpio"; drive-strength = <2>; From 03ed3432a4e457ee08261ff0639ae99ae3dfa909 Mon Sep 17 00:00:00 2001 From: Konrad Dybcio Date: Mon, 7 Nov 2022 13:09:17 +0100 Subject: [PATCH 087/102] dt-bindings: arm: qcom: Document SM6375 & Xperia 10 IV Add compatibles for Sony Xperia 10 IV (PDX225) and the SM6375 SoC it's based on. Signed-off-by: Konrad Dybcio Signed-off-by: Konrad Dybcio Reviewed-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221107120920.12593-2-konrad.dybcio@linaro.org --- Documentation/devicetree/bindings/arm/qcom.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index bfd317781257..ad687ca02c8a 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -59,6 +59,7 @@ description: | sdx65 sm6125 sm6350 + sm6375 sm7225 sm8150 sm8250 @@ -737,6 +738,11 @@ properties: - sony,pdx213 - const: qcom,sm6350 + - items: + - enum: + - sony,pdx225 + - const: qcom,sm6375 + - items: - enum: - fairphone,fp4 From 33c21ece867e845123a5c10d4384aea58cf6a21a Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 9 Nov 2022 11:51:39 +0100 Subject: [PATCH 088/102] ARM: dts: qcom-msm8960: use define for interrupt constants Replace GIC_PPI, GIC_SPI and interrupt type numbers with appropriate defines. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221109105140.48196-2-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/qcom-msm8960-cdp.dts | 2 +- arch/arm/boot/dts/qcom-msm8960.dtsi | 22 ++++++++++++---------- 2 files changed, 13 insertions(+), 11 deletions(-) diff --git a/arch/arm/boot/dts/qcom-msm8960-cdp.dts b/arch/arm/boot/dts/qcom-msm8960-cdp.dts index cb0f612e6c90..3a484ac53917 100644 --- a/arch/arm/boot/dts/qcom-msm8960-cdp.dts +++ b/arch/arm/boot/dts/qcom-msm8960-cdp.dts @@ -42,7 +42,7 @@ compatible = "micrel,ks8851"; reg = <0>; interrupt-parent = <&msmgpio>; - interrupts = <90 8>; + interrupts = <90 IRQ_TYPE_LEVEL_LOW>; spi-max-frequency = <5400000>; vdd-supply = <&ext_l2>; vdd-io-supply = <&pm8921_lvs6>; diff --git a/arch/arm/boot/dts/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom-msm8960.dtsi index cd1178e809bf..7debf9db7cb1 100644 --- a/arch/arm/boot/dts/qcom-msm8960.dtsi +++ b/arch/arm/boot/dts/qcom-msm8960.dtsi @@ -17,7 +17,7 @@ cpus { #address-cells = <1>; #size-cells = <0>; - interrupts = <1 14 0x304>; + interrupts = ; cpu@0 { compatible = "qcom,krait"; @@ -52,7 +52,7 @@ cpu-pmu { compatible = "qcom,krait-pmu"; - interrupts = <1 10 0x304>; + interrupts = ; qcom,no-pc-write; }; @@ -105,9 +105,9 @@ timer@200a000 { compatible = "qcom,kpss-timer", "qcom,kpss-wdt-msm8960", "qcom,msm-timer"; - interrupts = <1 1 0x301>, - <1 2 0x301>, - <1 3 0x301>; + interrupts = , + , + ; reg = <0x0200a000 0x100>; clock-frequency = <27000000>, <32768>; @@ -119,7 +119,7 @@ gpio-controller; gpio-ranges = <&msmgpio 0 0 152>; #gpio-cells = <2>; - interrupts = <0 16 0x4>; + interrupts = ; interrupt-controller; #interrupt-cells = <2>; reg = <0x800000 0x4000>; @@ -255,7 +255,7 @@ pmicintc: pmic { compatible = "qcom,pm8921"; interrupt-parent = <&msmgpio>; - interrupts = <104 8>; + interrupts = <104 IRQ_TYPE_LEVEL_LOW>; #interrupt-cells = <2>; interrupt-controller; #address-cells = <1>; @@ -265,7 +265,8 @@ compatible = "qcom,pm8921-pwrkey"; reg = <0x1c>; interrupt-parent = <&pmicintc>; - interrupts = <50 1>, <51 1>; + interrupts = <50 IRQ_TYPE_EDGE_RISING>, + <51 IRQ_TYPE_EDGE_RISING>; debounce = <15625>; pull-up; }; @@ -274,7 +275,8 @@ compatible = "qcom,pm8921-keypad"; reg = <0x148>; interrupt-parent = <&pmicintc>; - interrupts = <74 1>, <75 1>; + interrupts = <74 IRQ_TYPE_EDGE_RISING>, + <75 IRQ_TYPE_EDGE_RISING>; debounce = <15>; scan-delay = <32>; row-hold = <91500>; @@ -283,7 +285,7 @@ rtc@11d { compatible = "qcom,pm8921-rtc"; interrupt-parent = <&pmicintc>; - interrupts = <39 1>; + interrupts = <39 IRQ_TYPE_EDGE_RISING>; reg = <0x11d>; allow-set-time; }; From 0bc33727c491dfe07e19a11f1610f0a632e0e935 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 9 Nov 2022 11:51:40 +0100 Subject: [PATCH 089/102] ARM: dts: qcom-msm8960-cdp: align TLMM pin configuration with DT schema DT schema expects TLMM pin configuration nodes to be named with '-state' suffix and their optional children with '-pins' suffix. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Konrad Dybcio [bjorn: Fixed up expected typo in cs-pins function] Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221109105140.48196-3-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/qcom-msm8960-cdp.dts | 19 +++++++++---------- 1 file changed, 9 insertions(+), 10 deletions(-) diff --git a/arch/arm/boot/dts/qcom-msm8960-cdp.dts b/arch/arm/boot/dts/qcom-msm8960-cdp.dts index 3a484ac53917..8fa2befa629a 100644 --- a/arch/arm/boot/dts/qcom-msm8960-cdp.dts +++ b/arch/arm/boot/dts/qcom-msm8960-cdp.dts @@ -60,33 +60,32 @@ }; &msmgpio { - spi1_default: spi1_default { - mux { - pins = "gpio6", "gpio7", "gpio9"; - function = "gsbi1"; - }; - - mosi { + spi1_default: spi1-default-state { + mosi-pins { pins = "gpio6"; + function = "gsbi1"; drive-strength = <12>; bias-disable; }; - miso { + miso-pins { pins = "gpio7"; + function = "gsbi1"; drive-strength = <12>; bias-disable; }; - cs { + cs-pins { pins = "gpio8"; + function = "gsbi1"; drive-strength = <12>; bias-disable; output-low; }; - clk { + clk-pins { pins = "gpio9"; + function = "gsbi1"; drive-strength = <12>; bias-disable; }; From b4dba2bd3452fbc1ba5d0a54528e694b8db630b8 Mon Sep 17 00:00:00 2001 From: Richard Acayan Date: Thu, 10 Nov 2022 19:18:16 -0500 Subject: [PATCH 090/102] dt-bindings: arm: cpus: add qcom kryo 360 compatible The Snapdragon 670 uses CPUs named Kryo 360 silver and Kryo 360 gold. Add the compatible string in the documentation. Signed-off-by: Richard Acayan Acked-by: Rob Herring Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221111001818.124901-2-mailingradian@gmail.com --- Documentation/devicetree/bindings/arm/cpus.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index 5c13b73e4d57..1247e9a975c9 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -178,6 +178,7 @@ properties: - qcom,kryo250 - qcom,kryo260 - qcom,kryo280 + - qcom,kryo360 - qcom,kryo385 - qcom,kryo468 - qcom,kryo485 From 6c49e41c46a46a901e3203e030601033f29a4e5d Mon Sep 17 00:00:00 2001 From: Richard Acayan Date: Thu, 10 Nov 2022 19:18:17 -0500 Subject: [PATCH 091/102] dt-bindings: arm: qcom: add sdm670 and pixel 3a compatible The Snapdragon 670 and Pixel 3a initial device trees are about to be added. Add the compatible strings for the board. Signed-off-by: Richard Acayan Acked-by: Rob Herring Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221111001818.124901-3-mailingradian@gmail.com --- Documentation/devicetree/bindings/arm/qcom.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index ad687ca02c8a..8630042a3e98 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -54,6 +54,7 @@ description: | sdm632 sdm636 sdm660 + sdm670 sdm845 sdx55 sdx65 @@ -675,6 +676,11 @@ properties: - xiaomi,lavender - const: qcom,sdm660 + - items: + - enum: + - google,sargo + - const: qcom,sdm670 + - items: - enum: - qcom,sdx55-mtp From 37b5e8c48b9d295aca92caf0fdd3f4b85cc662bc Mon Sep 17 00:00:00 2001 From: Dzmitry Sankouski Date: Sat, 12 Nov 2022 23:32:59 +0300 Subject: [PATCH 092/102] dt-bindings: arm: add xiaomi,sagit board based on msm8998 chip Add xiaomi,sagit board (Xiaomi Mi 6) binding. Signed-off-by: Dzmitry Sankouski Acked-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221112203300.536010-2-dsankouski@gmail.com --- Documentation/devicetree/bindings/arm/qcom.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 8630042a3e98..2c365746b1fc 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -250,6 +250,7 @@ properties: - sony,xperia-lilac - sony,xperia-maple - sony,xperia-poplar + - xiaomi,sagit - const: qcom,msm8998 - items: From 05c0c38dc752eb9244e53d72ce1030f36153daf8 Mon Sep 17 00:00:00 2001 From: Marijn Suijten Date: Fri, 11 Nov 2022 13:01:53 +0100 Subject: [PATCH 093/102] dt-bindings: arm: qcom: Document msm8956 and msm8976 SoC and devices Note that msm8976 is omitted as a compatible, since there are currently no boards/devices using it. Signed-off-by: Marijn Suijten Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221111120156.48040-9-angelogioacchino.delregno@collabora.com --- Documentation/devicetree/bindings/arm/qcom.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 2c365746b1fc..86f46f526121 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -35,7 +35,9 @@ description: | mdm9615 msm8226 msm8916 + msm8956 msm8974 + msm8976 msm8992 msm8994 msm8996 @@ -156,6 +158,12 @@ properties: - samsung,s3ve3g - const: qcom,msm8226 + - items: + - enum: + - sony,kugo-row + - sony,suzu-row + - const: qcom,msm8956 + - items: - enum: - qcom,msm8960-cdp From 58311858a36bc6090ce5a6c38ddb694617bf94e2 Mon Sep 17 00:00:00 2001 From: Konrad Dybcio Date: Mon, 14 Nov 2022 10:56:51 +0100 Subject: [PATCH 094/102] dt-bindings: arm: qcom: Add Xperia 5 IV (PDX224) Add a compatible for Sony Xperia 5 IV. Signed-off-by: Konrad Dybcio Acked-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221114095654.34561-1-konrad.dybcio@linaro.org --- Documentation/devicetree/bindings/arm/qcom.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 86f46f526121..94c2474c611e 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -795,6 +795,7 @@ properties: - qcom,sm8450-hdk - qcom,sm8450-qrd - sony,pdx223 + - sony,pdx224 - const: qcom,sm8450 additionalProperties: true From b3de85276e8f68dcba35b0135270372760961ccb Mon Sep 17 00:00:00 2001 From: Parikshit Pareek Date: Fri, 18 Nov 2022 08:21:57 +0530 Subject: [PATCH 095/102] dt-bindings: arm: qcom: Document additional sa8540p device Add the qdrive3 ride device to the valid device compatibles found on the sa8540p platform. Signed-off-by: Parikshit Pareek Acked-by: Krzysztof Kozlowski Reviewed-by: Brian Masney Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221118025158.16902-2-quic_ppareek@quicinc.com --- Documentation/devicetree/bindings/arm/qcom.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 94c2474c611e..02a0bd957be1 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -723,6 +723,7 @@ properties: - items: - enum: - qcom,sa8295p-adp + - qcom,sa8540p-ride - const: qcom,sa8540p - items: From 3ebeed30209aa50505956076aff1cf00a6381760 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 25 Nov 2022 15:42:09 +0100 Subject: [PATCH 096/102] ARM: dts: qcom: align LED node names with dtschema The node names should be generic and DT schema expects certain pattern: qcom-ipq4018-ap120c-ac.dtb: leds: 'wlan2g', 'wlan5g' do not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski Reviewed-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221125144209.477328-2-krzysztof.kozlowski@linaro.org --- arch/arm/boot/dts/qcom-ipq4018-ap120c-ac-bit.dts | 6 +++--- arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dts | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac-bit.dts b/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac-bit.dts index cf7da1ab177c..1b27edce9d4f 100644 --- a/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac-bit.dts +++ b/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac-bit.dts @@ -9,7 +9,7 @@ leds { compatible = "gpio-leds"; - power { + led-power { label = "ap120c-ac:green:power"; function = LED_FUNCTION_POWER; color = ; @@ -17,14 +17,14 @@ default-state = "on"; }; - wlan { + led-wlan { label = "ap120c-ac:green:wlan"; function = LED_FUNCTION_WLAN; color = ; gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>; }; - support { + led-support { label = "ap120c-ac:green:support"; color = ; gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>; diff --git a/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dts b/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dts index c4f89b712fd9..a707057c887d 100644 --- a/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dts +++ b/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dts @@ -7,7 +7,7 @@ leds { compatible = "gpio-leds"; - status: status { + status: led-status { label = "ap120c-ac:blue:status"; function = LED_FUNCTION_STATUS; color = ; @@ -15,7 +15,7 @@ default-state = "keep"; }; - wlan2g { + led-wlan2g { label = "ap120c-ac:green:wlan2g"; function = LED_FUNCTION_WLAN; color = ; @@ -23,7 +23,7 @@ linux,default-trigger = "phy0tpt"; }; - wlan5g { + led-wlan5g { label = "ap120c-ac:red:wlan5g"; function = LED_FUNCTION_WLAN; color = ; From 2e62303fb8807d70208e54475fa9181ae4b17285 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Mon, 28 Nov 2022 15:15:49 +0200 Subject: [PATCH 097/102] dt-bindings: arm: qcom: split MSM8974 Pro and MSM8974 The MSM8974 Pro (AC) and bare MSM8974 are slightly different platforms. Split the compat strings accordingly to clearly specify the platform used by the device. Signed-off-by: Dmitry Baryshkov Reviewed-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221128131550.858724-1-dmitry.baryshkov@linaro.org --- Documentation/devicetree/bindings/arm/qcom.yaml | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 02a0bd957be1..0d0db7c60464 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -171,14 +171,19 @@ properties: - items: - enum: - - fairphone,fp2 - lge,hammerhead - - samsung,klte - sony,xperia-amami - - sony,xperia-castor - sony,xperia-honami - const: qcom,msm8974 + - items: + - enum: + - fairphone,fp2 + - samsung,klte + - sony,xperia-castor + - const: qcom,msm8974pro + - const: qcom,msm8974 + - items: - const: qcom,msm8916-mtp - const: qcom,msm8916-mtp/1 From 1477cca86492a58177a2afe2837494301e97f6ff Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Mon, 28 Nov 2022 15:15:50 +0200 Subject: [PATCH 098/102] arm: dts: qcom: use qcom,msm8974pro for pro devices Use new qcom,msm8974pro compatible string instead of qcom,msm8974 to clearly mark that the device is using the Pro version of the SoC. Signed-off-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio Reviewed-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221128131550.858724-2-dmitry.baryshkov@linaro.org --- arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts | 2 +- arch/arm/boot/dts/qcom-msm8974pro-samsung-klte.dts | 2 +- .../arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts b/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts index 38e69ed4fd1b..6523257815a0 100644 --- a/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts +++ b/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts @@ -8,7 +8,7 @@ / { model = "Fairphone 2"; - compatible = "fairphone,fp2", "qcom,msm8974"; + compatible = "fairphone,fp2", "qcom,msm8974pro", "qcom,msm8974"; chassis-type = "handset"; aliases { diff --git a/arch/arm/boot/dts/qcom-msm8974pro-samsung-klte.dts b/arch/arm/boot/dts/qcom-msm8974pro-samsung-klte.dts index 38a95430c7d4..52ece17986e4 100644 --- a/arch/arm/boot/dts/qcom-msm8974pro-samsung-klte.dts +++ b/arch/arm/boot/dts/qcom-msm8974pro-samsung-klte.dts @@ -7,7 +7,7 @@ / { model = "Samsung Galaxy S5"; - compatible = "samsung,klte", "qcom,msm8974"; + compatible = "samsung,klte", "qcom,msm8974pro", "qcom,msm8974"; chassis-type = "handset"; aliases { diff --git a/arch/arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts b/arch/arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts index 8265a0ff7857..07131db2e35d 100644 --- a/arch/arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts +++ b/arch/arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts @@ -8,7 +8,7 @@ / { model = "Sony Xperia Z2 Tablet"; - compatible = "sony,xperia-castor", "qcom,msm8974"; + compatible = "sony,xperia-castor", "qcom,msm8974pro", "qcom,msm8974"; chassis-type = "tablet"; aliases { From 08b37b2a9b1a9e4dcdd810e514e3f60f54338fa9 Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Mon, 28 Nov 2022 18:16:23 +0100 Subject: [PATCH 099/102] ARM: dts: qcom: msm8974: clean up USB nodes Rename "otg" label to "usb" to group it with other usb nodes and also because "usb" makes more sense for a USB controller. And now we can also better use the usb_hsX_phy labels instead of having the ulpi -> phy@X structure in every dts. Signed-off-by: Luca Weiss Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221128171623.825572-1-luca@z3ntu.xyz --- .../arm/boot/dts/qcom-apq8074-dragonboard.dts | 42 ++++++++-------- .../qcom-msm8974-lge-nexus5-hammerhead.dts | 48 +++++++++---------- .../dts/qcom-msm8974-sony-xperia-rhine.dtsi | 48 +++++++++---------- arch/arm/boot/dts/qcom-msm8974.dtsi | 6 +-- .../dts/qcom-msm8974pro-fairphone-fp2.dts | 48 +++++++++---------- .../boot/dts/qcom-msm8974pro-samsung-klte.dts | 42 ++++++++-------- ...-msm8974pro-sony-xperia-shinano-castor.dts | 48 +++++++++---------- 7 files changed, 135 insertions(+), 147 deletions(-) diff --git a/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts index 438fe86b3d4d..1345df7cbd00 100644 --- a/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts +++ b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts @@ -35,28 +35,6 @@ }; }; -&otg { - status = "okay"; - - phys = <&usb_hs2_phy>; - phy-select = <&tcsr 0xb000 1>; - extcon = <&smbb>, <&usb_id>; - vbus-supply = <&chg_otg>; - hnp-disable; - srp-disable; - adp-disable; - - ulpi { - phy@b { - status = "okay"; - v3p3-supply = <&pm8941_l24>; - v1p8-supply = <&pm8941_l6>; - extcon = <&smbb>; - qcom,init-seq = /bits/ 8 <0x1 0x63>; - }; - }; -}; - &rpm_requests { regulators-0 { compatible = "qcom,rpm-pm8841-regulators"; @@ -307,3 +285,23 @@ }; }; }; + +&usb { + status = "okay"; + + phys = <&usb_hs2_phy>; + phy-select = <&tcsr 0xb000 1>; + extcon = <&smbb>, <&usb_id>; + vbus-supply = <&chg_otg>; + hnp-disable; + srp-disable; + adp-disable; +}; + +&usb_hs2_phy { + status = "okay"; + v3p3-supply = <&pm8941_l24>; + v1p8-supply = <&pm8941_l6>; + extcon = <&smbb>; + qcom,init-seq = /bits/ 8 <0x1 0x63>; +}; diff --git a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts index 9cc453987d0e..280e63e3ebf2 100644 --- a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts +++ b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts @@ -248,31 +248,6 @@ status = "okay"; }; -&otg { - status = "okay"; - - phys = <&usb_hs1_phy>; - phy-select = <&tcsr 0xb000 0>; - - extcon = <&charger>, <&usb_id>; - vbus-supply = <&usb_otg_vbus>; - - hnp-disable; - srp-disable; - adp-disable; - - ulpi { - phy@a { - status = "okay"; - - v1p8-supply = <&pm8941_l6>; - v3p3-supply = <&pm8941_l24>; - - qcom,init-seq = /bits/ 8 <0x1 0x64>; - }; - }; -}; - &pm8941_gpios { gpio_keys_pin_a: gpio-keys-active-state { pins = "gpio2", "gpio3"; @@ -652,3 +627,26 @@ }; }; }; + +&usb { + status = "okay"; + + phys = <&usb_hs1_phy>; + phy-select = <&tcsr 0xb000 0>; + + extcon = <&charger>, <&usb_id>; + vbus-supply = <&usb_otg_vbus>; + + hnp-disable; + srp-disable; + adp-disable; +}; + +&usb_hs1_phy { + status = "okay"; + + v1p8-supply = <&pm8941_l6>; + v3p3-supply = <&pm8941_l24>; + + qcom,init-seq = /bits/ 8 <0x1 0x64>; +}; diff --git a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine.dtsi b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine.dtsi index 00542bd555e8..1b683690a1ad 100644 --- a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine.dtsi @@ -132,31 +132,6 @@ /* sii8334 MHL HDMI bridge */ }; -&otg { - status = "okay"; - - phys = <&usb_hs1_phy>; - phy-select = <&tcsr 0xb000 0>; - extcon = <&smbb>, <&usb_id>; - vbus-supply = <&chg_otg>; - - hnp-disable; - srp-disable; - adp-disable; - - ulpi { - phy@a { - status = "okay"; - - v1p8-supply = <&pm8941_l6>; - v3p3-supply = <&pm8941_l24>; - - extcon = <&smbb>; - qcom,init-seq = /bits/ 8 <0x1 0x64>; - }; - }; -}; - &pm8941_coincell { status = "okay"; qcom,rset-ohms = <2100>; @@ -485,3 +460,26 @@ }; }; }; + +&usb { + status = "okay"; + + phys = <&usb_hs1_phy>; + phy-select = <&tcsr 0xb000 0>; + extcon = <&smbb>, <&usb_id>; + vbus-supply = <&chg_otg>; + + hnp-disable; + srp-disable; + adp-disable; +}; + +&usb_hs1_phy { + status = "okay"; + + v1p8-supply = <&pm8941_l6>; + v3p3-supply = <&pm8941_l24>; + + extcon = <&smbb>; + qcom,init-seq = /bits/ 8 <0x1 0x64>; +}; diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index bdf1a4cca1c1..8d216a3c0851 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -653,7 +653,7 @@ #size-cells = <0>; }; - otg: usb@f9a55000 { + usb: usb@f9a55000 { compatible = "qcom,ci-hdrc"; reg = <0xf9a55000 0x200>, <0xf9a55200 0x200>; @@ -679,7 +679,7 @@ #phy-cells = <0>; clocks = <&xo_board>, <&gcc GCC_USB2A_PHY_SLEEP_CLK>; clock-names = "ref", "sleep"; - resets = <&gcc GCC_USB2A_PHY_BCR>, <&otg 0>; + resets = <&gcc GCC_USB2A_PHY_BCR>, <&usb 0>; reset-names = "phy", "por"; status = "disabled"; }; @@ -690,7 +690,7 @@ #phy-cells = <0>; clocks = <&xo_board>, <&gcc GCC_USB2B_PHY_SLEEP_CLK>; clock-names = "ref", "sleep"; - resets = <&gcc GCC_USB2B_PHY_BCR>, <&otg 1>; + resets = <&gcc GCC_USB2B_PHY_BCR>, <&usb 1>; reset-names = "phy", "por"; status = "disabled"; }; diff --git a/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts b/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts index 6523257815a0..f531d2679f6c 100644 --- a/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts +++ b/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts @@ -86,31 +86,6 @@ }; }; -&otg { - status = "okay"; - - phys = <&usb_hs1_phy>; - phy-select = <&tcsr 0xb000 0>; - extcon = <&smbb>, <&usb_id>; - vbus-supply = <&chg_otg>; - - hnp-disable; - srp-disable; - adp-disable; - - ulpi { - phy@a { - status = "okay"; - - v1p8-supply = <&pm8941_l6>; - v3p3-supply = <&pm8941_l24>; - - extcon = <&smbb>; - qcom,init-seq = /bits/ 8 <0x1 0x64>; - }; - }; -}; - &pm8941_gpios { gpio_keys_pin_a: gpio-keys-active-state { pins = "gpio1", "gpio2", "gpio5"; @@ -463,3 +438,26 @@ }; }; }; + +&usb { + status = "okay"; + + phys = <&usb_hs1_phy>; + phy-select = <&tcsr 0xb000 0>; + extcon = <&smbb>, <&usb_id>; + vbus-supply = <&chg_otg>; + + hnp-disable; + srp-disable; + adp-disable; +}; + +&usb_hs1_phy { + status = "okay"; + + v1p8-supply = <&pm8941_l6>; + v3p3-supply = <&pm8941_l24>; + + extcon = <&smbb>; + qcom,init-seq = /bits/ 8 <0x1 0x64>; +}; diff --git a/arch/arm/boot/dts/qcom-msm8974pro-samsung-klte.dts b/arch/arm/boot/dts/qcom-msm8974pro-samsung-klte.dts index 52ece17986e4..b9698ffb66ca 100644 --- a/arch/arm/boot/dts/qcom-msm8974pro-samsung-klte.dts +++ b/arch/arm/boot/dts/qcom-msm8974pro-samsung-klte.dts @@ -376,28 +376,6 @@ status = "okay"; }; -&otg { - status = "okay"; - - phys = <&usb_hs1_phy>; - phy-select = <&tcsr 0xb000 0>; - - hnp-disable; - srp-disable; - adp-disable; - - ulpi { - phy@a { - status = "okay"; - - v1p8-supply = <&pma8084_l6>; - v3p3-supply = <&pma8084_l24>; - - qcom,init-seq = /bits/ 8 <0x1 0x64>; - }; - }; -}; - &pma8084_gpios { gpio_keys_pin_a: gpio-keys-active-state { pins = "gpio2", "gpio3", "gpio5"; @@ -814,3 +792,23 @@ bias-disable; }; }; + +&usb { + status = "okay"; + + phys = <&usb_hs1_phy>; + phy-select = <&tcsr 0xb000 0>; + + hnp-disable; + srp-disable; + adp-disable; +}; + +&usb_hs1_phy { + status = "okay"; + + v1p8-supply = <&pma8084_l6>; + v3p3-supply = <&pma8084_l24>; + + qcom,init-seq = /bits/ 8 <0x1 0x64>; +}; diff --git a/arch/arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts b/arch/arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts index 07131db2e35d..3b1cc39f2269 100644 --- a/arch/arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts +++ b/arch/arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts @@ -213,31 +213,6 @@ }; }; -&otg { - status = "okay"; - - phys = <&usb_hs1_phy>; - phy-select = <&tcsr 0xb000 0>; - extcon = <&smbb>, <&usb_id>; - vbus-supply = <&chg_otg>; - - hnp-disable; - srp-disable; - adp-disable; - - ulpi { - phy@a { - status = "okay"; - - v1p8-supply = <&pm8941_l6>; - v3p3-supply = <&pm8941_l24>; - - extcon = <&smbb>; - qcom,init-seq = /bits/ 8 <0x1 0x64>; - }; - }; -}; - &pm8941_coincell { status = "okay"; @@ -638,3 +613,26 @@ bias-disable; }; }; + +&usb { + status = "okay"; + + phys = <&usb_hs1_phy>; + phy-select = <&tcsr 0xb000 0>; + extcon = <&smbb>, <&usb_id>; + vbus-supply = <&chg_otg>; + + hnp-disable; + srp-disable; + adp-disable; +}; + +&usb_hs1_phy { + status = "okay"; + + v1p8-supply = <&pm8941_l6>; + v3p3-supply = <&pm8941_l24>; + + extcon = <&smbb>; + qcom,init-seq = /bits/ 8 <0x1 0x64>; +}; From c8f740af515848b26be9469c5f338e3b5dd0e57c Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Mon, 28 Nov 2022 18:25:29 +0100 Subject: [PATCH 100/102] dt-bindings: arm: qcom: Document oneplus,bacon device Document the OnePlus One ("bacon") which is a smartphone based on the Snapdragon 801 SoC. Also allow msm8974(pro) devices to use qcom,msm-id and qcom,board-id. Signed-off-by: Luca Weiss Reviewed-by: Krzysztof Kozlowski Reviewed-by: Dmitry Baryshkov Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221128172531.828660-1-luca@z3ntu.xyz --- Documentation/devicetree/bindings/arm/qcom.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 0d0db7c60464..a7a47c79b482 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -179,6 +179,7 @@ properties: - items: - enum: - fairphone,fp2 + - oneplus,bacon - samsung,klte - sony,xperia-castor - const: qcom,msm8974pro From 378f0231330dd13da27e856c44031cef00012ee3 Mon Sep 17 00:00:00 2001 From: Julian Goldsmith Date: Mon, 28 Nov 2022 18:25:30 +0100 Subject: [PATCH 101/102] ARM: dts: qcom: msm8974: Add OnePlus One OnePlus One is a smartphone launched in 2014 and is based on the Snapdragon 801 SoC (-AC variant). Supported features: * ADSP * Charger * Coincell charger * Fuel gauge * Internal storage * Touchscreen * UART * USB * Wifi/Bluetooth Signed-off-by: Julian Goldsmith Co-developed-by: Oleg Chernovskiy Signed-off-by: Oleg Chernovskiy Co-developed-by: Luca Weiss Signed-off-by: Luca Weiss Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221128172531.828660-2-luca@z3ntu.xyz --- arch/arm/boot/dts/Makefile | 1 + .../dts/qcom-msm8974pro-oneplus-bacon.dts | 417 ++++++++++++++++++ 2 files changed, 418 insertions(+) create mode 100644 arch/arm/boot/dts/qcom-msm8974pro-oneplus-bacon.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 640858290ec7..de63fa6cbfa2 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1061,6 +1061,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \ qcom-msm8974-sony-xperia-rhine-amami.dtb \ qcom-msm8974-sony-xperia-rhine-honami.dtb \ qcom-msm8974pro-fairphone-fp2.dtb \ + qcom-msm8974pro-oneplus-bacon.dtb \ qcom-msm8974pro-samsung-klte.dtb \ qcom-msm8974pro-sony-xperia-shinano-castor.dtb \ qcom-mdm9615-wp8548-mangoh-green.dtb \ diff --git a/arch/arm/boot/dts/qcom-msm8974pro-oneplus-bacon.dts b/arch/arm/boot/dts/qcom-msm8974pro-oneplus-bacon.dts new file mode 100644 index 000000000000..b5606623f968 --- /dev/null +++ b/arch/arm/boot/dts/qcom-msm8974pro-oneplus-bacon.dts @@ -0,0 +1,417 @@ +// SPDX-License-Identifier: GPL-2.0 +#include "qcom-msm8974pro.dtsi" +#include "qcom-pm8841.dtsi" +#include "qcom-pm8941.dtsi" +#include +#include + +/ { + model = "OnePlus One"; + compatible = "oneplus,bacon", "qcom,msm8974pro", "qcom,msm8974"; + chassis-type = "handset"; + qcom,msm-id = <194 0x10000>; + qcom,board-id = <8 0>; + + aliases { + serial0 = &blsp1_uart2; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +&blsp1_i2c1 { + status = "okay"; + + fuel-gauge@55 { + compatible = "ti,bq27541"; + reg = <0x55>; + power-supplies = <&bq24196_charger>; + }; +}; + +&blsp1_i2c2 { + status = "okay"; + + rmi4-i2c-dev@20 { + compatible = "syna,rmi4-i2c"; + reg = <0x20>; + + syna,startup-delay-ms = <100>; + + interrupts-extended = <&tlmm 61 IRQ_TYPE_EDGE_FALLING>; + vdd-supply = <&pm8941_l22>; + vio-supply = <&pm8941_lvs3>; + + pinctrl-names = "default"; + pinctrl-0 = <&touch_default_state>; + + #address-cells = <1>; + #size-cells = <0>; + + rmi4-f01@1 { + reg = <0x1>; + syna,nosleep-mode = <1>; + }; + + rmi4-f12@12 { + reg = <0x12>; + syna,sensor-type = <1>; + /* + * Touchscreen size is 2040x1080, y-values between + * 1920-2040 are used for touchkey (menu, home & back). + * For now clip it off so we don't get touch events + * outside of the display area. + */ + syna,clip-y-high = <1920>; + }; + }; +}; + +&blsp1_i2c6 { + status = "okay"; + + bq24196_charger: charger@6b { + compatible = "ti,bq24196"; + reg = <0x6b>; + interrupts-extended = <&tlmm 31 IRQ_TYPE_EDGE_FALLING>; + omit-battery-class; + }; +}; + +&blsp1_uart2 { + status = "okay"; +}; + +&gcc { + compatible = "qcom,gcc-msm8974pro-ac"; +}; + +&pm8941_coincell { + qcom,rset-ohms = <800>; + qcom,vset-millivolts = <3200>; + + status = "okay"; +}; + +&pronto { + vddmx-supply = <&pm8841_s1>; + vddcx-supply = <&pm8841_s2>; + vddpx-supply = <&pm8941_s3>; + + pinctrl-names = "default"; + pinctrl-0 = <&wcnss_pin_a>; + + status = "okay"; + + iris { + vddxo-supply = <&pm8941_l6>; + vddrfa-supply = <&pm8941_l11>; + vddpa-supply = <&pm8941_l19>; + vdddig-supply = <&pm8941_s3>; + }; + + smd-edge { + qcom,remote-pid = <4>; + label = "pronto"; + + wcnss { + status = "okay"; + }; + }; +}; + +&remoteproc_adsp { + cx-supply = <&pm8841_s2>; + + status = "okay"; +}; + +&rpm_requests { + regulators-0 { + compatible = "qcom,rpm-pm8841-regulators"; + + pm8841_s1: s1 { + regulator-min-microvolt = <675000>; + regulator-max-microvolt = <1050000>; + }; + + pm8841_s2: s2 { + regulator-min-microvolt = <875000>; + regulator-max-microvolt = <1050000>; + regulator-always-on; + }; + + pm8841_s3: s3 { + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + }; + }; + + regulators-1 { + compatible = "qcom,rpm-pm8941-regulators"; + + vdd_l1_l3-supply = <&pm8941_s1>; + vdd_l2_lvs1_2_3-supply = <&pm8941_s3>; + vdd_l4_l11-supply = <&pm8941_s1>; + vdd_l5_l7-supply = <&pm8941_s2>; + vdd_l6_l12_l14_l15-supply = <&pm8941_s2>; + vdd_l8_l16_l18_l19-supply = <&vreg_vph_pwr>; + vdd_l9_l10_l17_l22-supply = <&vreg_boost>; + vdd_l13_l20_l23_l24-supply = <&vreg_boost>; + vdd_l21-supply = <&vreg_boost>; + + pm8941_s1: s1 { + regulator-min-microvolt = <1300000>; + regulator-max-microvolt = <1300000>; + + regulator-always-on; + regulator-boot-on; + }; + + pm8941_s2: s2 { + regulator-min-microvolt = <2150000>; + regulator-max-microvolt = <2150000>; + + regulator-boot-on; + }; + + pm8941_s3: s3 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-system-load = <154000>; + + regulator-always-on; + regulator-boot-on; + regulator-allow-set-load; + }; + + pm8941_l1: l1 { + regulator-min-microvolt = <1225000>; + regulator-max-microvolt = <1225000>; + + regulator-always-on; + regulator-boot-on; + }; + + pm8941_l2: l2 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + pm8941_l3: l3 { + regulator-min-microvolt = <1225000>; + regulator-max-microvolt = <1225000>; + }; + + pm8941_l4: l4 { + regulator-min-microvolt = <1225000>; + regulator-max-microvolt = <1225000>; + }; + + pm8941_l5: l5 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + pm8941_l6: l6 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-boot-on; + }; + + pm8941_l7: l7 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-boot-on; + }; + + pm8941_l8: l8 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + pm8941_l9: l9 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2950000>; + }; + + pm8941_l10: l10 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2950000>; + }; + + pm8941_l11: l11 { + regulator-min-microvolt = <1225000>; + regulator-max-microvolt = <1350000>; + }; + + pm8941_l12: l12 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-always-on; + regulator-boot-on; + regulator-allow-set-load; + }; + + pm8941_l13: l13 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2950000>; + + regulator-boot-on; + }; + + pm8941_l14: l14 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + pm8941_l15: l15 { + regulator-min-microvolt = <2050000>; + regulator-max-microvolt = <2050000>; + }; + + pm8941_l16: l16 { + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <2700000>; + }; + + pm8941_l17: l17 { + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + }; + + pm8941_l18: l18 { + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + }; + + pm8941_l19: l19 { + regulator-min-microvolt = <2900000>; + regulator-max-microvolt = <3350000>; + }; + + pm8941_l20: l20 { + regulator-min-microvolt = <2950000>; + regulator-max-microvolt = <2950000>; + + regulator-system-load = <200000>; + regulator-allow-set-load; + regulator-boot-on; + }; + + pm8941_l21: l21 { + regulator-min-microvolt = <2950000>; + regulator-max-microvolt = <2950000>; + + regulator-boot-on; + }; + + pm8941_l22: l22 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-allow-set-load; + }; + + pm8941_l23: l23 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + }; + + pm8941_l24: l24 { + regulator-min-microvolt = <3075000>; + regulator-max-microvolt = <3075000>; + + regulator-boot-on; + }; + + pm8941_lvs3: lvs3 {}; + }; +}; + +&sdhc_1 { + vmmc-supply = <&pm8941_l20>; + vqmmc-supply = <&pm8941_s3>; + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&sdc1_on>; + pinctrl-1 = <&sdc1_off>; + + status = "okay"; +}; + +&tlmm { + sdc1_on: sdc1-on-state { + clk-pins { + pins = "sdc1_clk"; + drive-strength = <4>; + bias-disable; + }; + + cmd-data-pins { + pins = "sdc1_cmd", "sdc1_data"; + drive-strength = <4>; + bias-pull-up; + }; + }; + + touch_default_state: touch-default-state { + int-pins { + pins = "gpio61"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + input-enable; + }; + + reset-pins { + pins = "gpio60"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + wcnss_pin_a: wcnss-pin-active-state { + wlan-pins { + pins = "gpio36", "gpio37", "gpio38", "gpio39", "gpio40"; + function = "wlan"; + drive-strength = <6>; + bias-pull-down; + }; + + bt-pins { + pins = "gpio35", "gpio43", "gpio44"; + function = "bt"; + drive-strength = <2>; + bias-pull-down; + }; + }; +}; + +&usb { + phys = <&usb_hs1_phy>; + phy-select = <&tcsr 0xb000 0>; + extcon = <&smbb>, <&usb_id>; + vbus-supply = <&chg_otg>; + + hnp-disable; + srp-disable; + adp-disable; + + status = "okay"; +}; + +&usb_hs1_phy { + status = "okay"; + + v1p8-supply = <&pm8941_l6>; + v3p3-supply = <&pm8941_l24>; + + extcon = <&smbb>; + qcom,init-seq = /bits/ 8 <0x1 0x64>; +}; From 812e13ddb56aa5c4534c96b522d2e39e094df677 Mon Sep 17 00:00:00 2001 From: Owen Yang Date: Mon, 5 Dec 2022 13:36:14 +0800 Subject: [PATCH 102/102] dt-bindings: arm: qcom: Add zombie Add entries in the device tree binding for sc7280-zombie. Reviewed-by: Krzysztof Kozlowski Reviewed-by: Douglas Anderson Reviewed-by: Matthias Kaehlcke Signed-off-by: Owen Yang Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221205133603.v15.1.Idfcba5344b7995b44b7fa2e20f1aa4351defeca6@changeid --- Documentation/devicetree/bindings/arm/qcom.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index a7a47c79b482..452e2fb69e4e 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -649,6 +649,16 @@ properties: - const: google,villager-sku512 - const: qcom,sc7280 + - description: Google Zombie (newest rev) + items: + - const: google,zombie + - const: qcom,sc7280 + + - description: Google Zombie with LTE (newest rev) + items: + - const: google,zombie-sku512 + - const: qcom,sc7280 + - items: - enum: - lenovo,flex-5g