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riscv: dts: microchip: mpfs: remove pci axi address translation property 

An AXI master address translation table property was inadvertently
added to the device tree & this was not caught by dtbs_check at the
time. Remove the property - it should not be in mpfs.dtsi anyway as
it would be more suitable in -fabric.dtsi nor does it actually apply
to the version of the reference design we are using for upstream.

Link: https://www.microsemi.com/document-portal/doc_download/1245812-polarfire-fpga-and-polarfire-soc-fpga-pci-express-user-guide # Section 1.3.3
Fixes: 528a5b1f25 ("riscv: dts: microchip: add new peripherals to icicle kit device tree")
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
This commit is contained in:
Conor Dooley 2022-08-20 00:14:16 +01:00
parent 2b55915d27
commit e4009c5fa7
1 changed files with 0 additions and 1 deletions
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1
arch/riscv/boot/dts/microchip/mpfs.dtsi
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@ -485,7 +485,6 @@
ranges = <0x3000000 0x0 0x8000000 0x20 0x8000000 0x0 0x80000000>;
msi-parent = <&pcie>;
msi-controller;
microchip,axi-m-atr0 = <0x10 0x0>;
status = "disabled";
pcie_intc: interrupt-controller {
#address-cells = <0>;