Merge branch 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm into next
Pull ARM updates from Russell King: - Major clean-up of the L2 cache support code. The existing mess was becoming rather unmaintainable through all the additions that others have done over time. This turns it into a much nicer structure, and implements a few performance improvements as well. - Clean up some of the CP15 control register tweaks for alignment support, moving some code and data into alignment.c - DMA properties for ARM, from Santosh and reviewed by DT people. This adds DT properties to specify bus translations we can't discover automatically, and to indicate whether devices are coherent. - Hibernation support for ARM - Make ftrace work with read-only text in modules - add suspend support for PJ4B CPUs - rework interrupt masking for undefined instruction handling, which allows us to enable interrupts earlier in the handling of these exceptions. - support for big endian page tables - fix stacktrace support to exclude stacktrace functions from the trace, and add save_stack_trace_regs() implementation so that kprobes can record stack traces. - Add support for the Cortex-A17 CPU. - Remove last vestiges of ARM710 support. - Removal of ARM "meminfo" structure, finally converting us solely to memblock to handle the early memory initialisation. * 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: (142 commits) ARM: ensure C page table setup code follows assembly code (part II) ARM: ensure C page table setup code follows assembly code ARM: consolidate last remaining open-coded alignment trap enable ARM: remove global cr_no_alignment ARM: remove CPU_CP15 conditional from alignment.c ARM: remove unused adjust_cr() function ARM: move "noalign" command line option to alignment.c ARM: provide common method to clear bits in CPU control register ARM: 8025/1: Get rid of meminfo ARM: 8060/1: mm: allow sub-architectures to override PCI I/O memory type ARM: 8066/1: correction for ARM patch 8031/2 ARM: 8049/1: ftrace/add save_stack_trace_regs() implementation ARM: 8065/1: remove last use of CONFIG_CPU_ARM710 ARM: 8062/1: Modify ldrt fixup handler to re-execute the userspace instruction ARM: 8047/1: rwsem: use asm-generic rwsem implementation ARM: l2c: trial at enabling some Cortex-A9 optimisations ARM: l2c: add warnings for stuff modifying aux_ctrl register values ARM: l2c: print a warning with L2C-310 caches if the cache size is modified ARM: l2c: remove old .set_debug method ARM: l2c: kill L2X0_AUX_CTRL_MASK before anyone else makes use of this ...
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@@ -692,6 +692,7 @@ struct acpi_dev_node {
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* @coherent_dma_mask: Like dma_mask, but for alloc_coherent mapping as not all
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* hardware supports 64-bit addresses for consistent allocations
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* such descriptors.
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* @dma_pfn_offset: offset of DMA memory range relatively of RAM
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* @dma_parms: A low level driver may set these to teach IOMMU code about
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* segment limitations.
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* @dma_pools: Dma pools (if dma'ble device).
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@@ -759,6 +760,7 @@ struct device {
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not all hardware supports
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64 bit addresses for consistent
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allocations such descriptors. */
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unsigned long dma_pfn_offset;
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struct device_dma_parameters *dma_parms;
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@@ -129,6 +129,13 @@ static inline int dma_coerce_mask_and_coherent(struct device *dev, u64 mask)
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extern u64 dma_get_required_mask(struct device *dev);
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#ifndef set_arch_dma_coherent_ops
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static inline int set_arch_dma_coherent_ops(struct device *dev)
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{
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return 0;
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}
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#endif
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static inline unsigned int dma_get_max_seg_size(struct device *dev)
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{
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return dev->dma_parms ? dev->dma_parms->max_segment_size : 65536;
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@@ -62,6 +62,9 @@ extern int of_pci_range_parser_init(struct of_pci_range_parser *parser,
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extern struct of_pci_range *of_pci_range_parser_one(
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struct of_pci_range_parser *parser,
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struct of_pci_range *range);
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extern int of_dma_get_range(struct device_node *np, u64 *dma_addr,
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u64 *paddr, u64 *size);
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extern bool of_dma_is_coherent(struct device_node *np);
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#else /* CONFIG_OF_ADDRESS */
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static inline struct device_node *of_find_matching_node_by_address(
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struct device_node *from,
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@@ -89,6 +92,17 @@ static inline struct of_pci_range *of_pci_range_parser_one(
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{
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return NULL;
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}
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static inline int of_dma_get_range(struct device_node *np, u64 *dma_addr,
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u64 *paddr, u64 *size)
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{
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return -ENODEV;
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}
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static inline bool of_dma_is_coherent(struct device_node *np)
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{
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return false;
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}
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#endif /* CONFIG_OF_ADDRESS */
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#ifdef CONFIG_OF
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@@ -327,6 +327,8 @@ extern unsigned long get_safe_page(gfp_t gfp_mask);
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extern void hibernation_set_ops(const struct platform_hibernation_ops *ops);
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extern int hibernate(void);
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extern bool system_entering_hibernation(void);
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asmlinkage int swsusp_save(void);
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extern struct pbe *restore_pblist;
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#else /* CONFIG_HIBERNATION */
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static inline void register_nosave_region(unsigned long b, unsigned long e) {}
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static inline void register_nosave_region_late(unsigned long b, unsigned long e) {}
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@@ -32,6 +32,7 @@ struct vm_area_struct;
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struct mm_struct;
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struct inode;
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struct notifier_block;
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struct page;
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#define UPROBE_HANDLER_REMOVE 1
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#define UPROBE_HANDLER_MASK 1
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@@ -127,6 +128,8 @@ extern int arch_uprobe_exception_notify(struct notifier_block *self, unsigned l
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extern void arch_uprobe_abort_xol(struct arch_uprobe *aup, struct pt_regs *regs);
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extern unsigned long arch_uretprobe_hijack_return_addr(unsigned long trampoline_vaddr, struct pt_regs *regs);
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extern bool __weak arch_uprobe_ignore(struct arch_uprobe *aup, struct pt_regs *regs);
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extern void __weak arch_uprobe_copy_ixol(struct page *page, unsigned long vaddr,
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void *src, unsigned long len);
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#else /* !CONFIG_UPROBES */
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struct uprobes_state {
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};
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