Merge branch 'linus' into tracing/ftrace
This commit is contained in:
@@ -261,7 +261,7 @@ struct el_MCPCIA_uncorrected_frame_mcheck {
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}
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#endif
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static inline int __mcpcia_is_mmio(unsigned long addr)
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extern inline int __mcpcia_is_mmio(unsigned long addr)
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{
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return (addr & 0x80000000UL) == 0;
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}
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@@ -356,13 +356,13 @@ struct el_t2_frame_corrected {
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#define vip volatile int *
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#define vuip volatile unsigned int *
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static inline u8 t2_inb(unsigned long addr)
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extern inline u8 t2_inb(unsigned long addr)
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{
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long result = *(vip) ((addr << 5) + T2_IO + 0x00);
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return __kernel_extbl(result, addr & 3);
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}
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static inline void t2_outb(u8 b, unsigned long addr)
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extern inline void t2_outb(u8 b, unsigned long addr)
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{
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unsigned long w;
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@@ -371,13 +371,13 @@ static inline void t2_outb(u8 b, unsigned long addr)
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mb();
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}
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static inline u16 t2_inw(unsigned long addr)
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extern inline u16 t2_inw(unsigned long addr)
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{
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long result = *(vip) ((addr << 5) + T2_IO + 0x08);
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return __kernel_extwl(result, addr & 3);
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}
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static inline void t2_outw(u16 b, unsigned long addr)
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extern inline void t2_outw(u16 b, unsigned long addr)
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{
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unsigned long w;
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@@ -386,12 +386,12 @@ static inline void t2_outw(u16 b, unsigned long addr)
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mb();
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}
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static inline u32 t2_inl(unsigned long addr)
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extern inline u32 t2_inl(unsigned long addr)
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{
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return *(vuip) ((addr << 5) + T2_IO + 0x18);
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}
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static inline void t2_outl(u32 b, unsigned long addr)
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extern inline void t2_outl(u32 b, unsigned long addr)
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{
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*(vuip) ((addr << 5) + T2_IO + 0x18) = b;
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mb();
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@@ -435,7 +435,7 @@ static inline void t2_outl(u32 b, unsigned long addr)
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set_hae(msb); \
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}
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static DEFINE_SPINLOCK(t2_hae_lock);
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extern spinlock_t t2_hae_lock;
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/*
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* NOTE: take T2_DENSE_MEM off in each readX/writeX routine, since
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@@ -35,7 +35,7 @@
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* register not being up-to-date with respect to the hardware
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* value.
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*/
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static inline void __set_hae(unsigned long new_hae)
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extern inline void __set_hae(unsigned long new_hae)
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{
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unsigned long flags;
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local_irq_save(flags);
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@@ -49,7 +49,7 @@ static inline void __set_hae(unsigned long new_hae)
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local_irq_restore(flags);
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}
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static inline void set_hae(unsigned long new_hae)
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extern inline void set_hae(unsigned long new_hae)
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{
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if (new_hae != alpha_mv.hae_cache)
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__set_hae(new_hae);
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@@ -176,7 +176,7 @@ REMAP2(u64, writeq, volatile)
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#undef REMAP1
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#undef REMAP2
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static inline void __iomem *generic_ioportmap(unsigned long a)
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extern inline void __iomem *generic_ioportmap(unsigned long a)
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{
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return alpha_mv.mv_ioportmap(a);
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}
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@@ -23,7 +23,7 @@
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#endif
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extern inline unsigned long
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static inline unsigned long
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__reload_thread(struct pcb_struct *pcb)
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{
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register unsigned long a0 __asm__("$16");
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@@ -114,7 +114,7 @@ extern unsigned long last_asn;
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#define __MMU_EXTERN_INLINE
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#endif
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static inline unsigned long
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extern inline unsigned long
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__get_new_mm_context(struct mm_struct *mm, long cpu)
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{
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unsigned long asn = cpu_last_asn(cpu);
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@@ -226,7 +226,7 @@ ev4_activate_mm(struct mm_struct *prev_mm, struct mm_struct *next_mm)
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# endif
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#endif
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extern inline int
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static inline int
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init_new_context(struct task_struct *tsk, struct mm_struct *mm)
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{
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int i;
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@@ -1,6 +1,76 @@
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#ifndef __ALPHA_PERCPU_H
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#define __ALPHA_PERCPU_H
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#include <linux/compiler.h>
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#include <linux/threads.h>
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#include <asm-generic/percpu.h>
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/*
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* Determine the real variable name from the name visible in the
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* kernel sources.
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*/
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#define per_cpu_var(var) per_cpu__##var
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#ifdef CONFIG_SMP
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/*
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* per_cpu_offset() is the offset that has to be added to a
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* percpu variable to get to the instance for a certain processor.
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*/
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extern unsigned long __per_cpu_offset[NR_CPUS];
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#define per_cpu_offset(x) (__per_cpu_offset[x])
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#define __my_cpu_offset per_cpu_offset(raw_smp_processor_id())
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#ifdef CONFIG_DEBUG_PREEMPT
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#define my_cpu_offset per_cpu_offset(smp_processor_id())
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#else
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#define my_cpu_offset __my_cpu_offset
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#endif
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#ifndef MODULE
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#define SHIFT_PERCPU_PTR(var, offset) RELOC_HIDE(&per_cpu_var(var), (offset))
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#define PER_CPU_ATTRIBUTES
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#else
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/*
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* To calculate addresses of locally defined variables, GCC uses 32-bit
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* displacement from the GP. Which doesn't work for per cpu variables in
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* modules, as an offset to the kernel per cpu area is way above 4G.
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*
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* This forces allocation of a GOT entry for per cpu variable using
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* ldq instruction with a 'literal' relocation.
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*/
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#define SHIFT_PERCPU_PTR(var, offset) ({ \
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extern int simple_identifier_##var(void); \
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unsigned long __ptr, tmp_gp; \
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asm ( "br %1, 1f \n\
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1: ldgp %1, 0(%1) \n\
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ldq %0, per_cpu__" #var"(%1)\t!literal" \
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: "=&r"(__ptr), "=&r"(tmp_gp)); \
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(typeof(&per_cpu_var(var)))(__ptr + (offset)); })
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#define PER_CPU_ATTRIBUTES __used
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#endif /* MODULE */
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/*
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* A percpu variable may point to a discarded regions. The following are
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* established ways to produce a usable pointer from the percpu variable
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* offset.
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*/
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#define per_cpu(var, cpu) \
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(*SHIFT_PERCPU_PTR(var, per_cpu_offset(cpu)))
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#define __get_cpu_var(var) \
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(*SHIFT_PERCPU_PTR(var, my_cpu_offset))
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#define __raw_get_cpu_var(var) \
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(*SHIFT_PERCPU_PTR(var, __my_cpu_offset))
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#else /* ! SMP */
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#define per_cpu(var, cpu) (*((void)(cpu), &per_cpu_var(var)))
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#define __get_cpu_var(var) per_cpu_var(var)
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#define __raw_get_cpu_var(var) per_cpu_var(var)
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#endif /* SMP */
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#define DECLARE_PER_CPU(type, name) extern __typeof__(type) per_cpu_var(name)
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#endif /* __ALPHA_PERCPU_H */
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@@ -184,7 +184,7 @@ enum amask_enum {
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__amask; })
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#define __CALL_PAL_R0(NAME, TYPE) \
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static inline TYPE NAME(void) \
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extern inline TYPE NAME(void) \
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{ \
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register TYPE __r0 __asm__("$0"); \
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__asm__ __volatile__( \
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@@ -196,7 +196,7 @@ static inline TYPE NAME(void) \
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}
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#define __CALL_PAL_W1(NAME, TYPE0) \
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static inline void NAME(TYPE0 arg0) \
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extern inline void NAME(TYPE0 arg0) \
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{ \
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register TYPE0 __r16 __asm__("$16") = arg0; \
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__asm__ __volatile__( \
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@@ -207,7 +207,7 @@ static inline void NAME(TYPE0 arg0) \
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}
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#define __CALL_PAL_W2(NAME, TYPE0, TYPE1) \
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static inline void NAME(TYPE0 arg0, TYPE1 arg1) \
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extern inline void NAME(TYPE0 arg0, TYPE1 arg1) \
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{ \
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register TYPE0 __r16 __asm__("$16") = arg0; \
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register TYPE1 __r17 __asm__("$17") = arg1; \
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@@ -219,7 +219,7 @@ static inline void NAME(TYPE0 arg0, TYPE1 arg1) \
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}
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#define __CALL_PAL_RW1(NAME, RTYPE, TYPE0) \
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static inline RTYPE NAME(TYPE0 arg0) \
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extern inline RTYPE NAME(TYPE0 arg0) \
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{ \
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register RTYPE __r0 __asm__("$0"); \
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register TYPE0 __r16 __asm__("$16") = arg0; \
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@@ -232,7 +232,7 @@ static inline RTYPE NAME(TYPE0 arg0) \
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}
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#define __CALL_PAL_RW2(NAME, RTYPE, TYPE0, TYPE1) \
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static inline RTYPE NAME(TYPE0 arg0, TYPE1 arg1) \
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extern inline RTYPE NAME(TYPE0 arg0, TYPE1 arg1) \
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{ \
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register RTYPE __r0 __asm__("$0"); \
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register TYPE0 __r16 __asm__("$16") = arg0; \
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@@ -13,7 +13,7 @@
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#define VT_BUF_HAVE_MEMSETW
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#define VT_BUF_HAVE_MEMCPYW
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extern inline void scr_writew(u16 val, volatile u16 *addr)
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static inline void scr_writew(u16 val, volatile u16 *addr)
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{
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if (__is_ioaddr(addr))
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__raw_writew(val, (volatile u16 __iomem *) addr);
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@@ -21,7 +21,7 @@ extern inline void scr_writew(u16 val, volatile u16 *addr)
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*addr = val;
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}
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extern inline u16 scr_readw(volatile const u16 *addr)
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static inline u16 scr_readw(volatile const u16 *addr)
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{
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if (__is_ioaddr(addr))
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return __raw_readw((volatile const u16 __iomem *) addr);
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@@ -29,7 +29,7 @@ extern inline u16 scr_readw(volatile const u16 *addr)
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return *addr;
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}
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extern inline void scr_memsetw(u16 *s, u16 c, unsigned int count)
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||||
static inline void scr_memsetw(u16 *s, u16 c, unsigned int count)
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||||
{
|
||||
if (__is_ioaddr(s))
|
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memsetw_io((u16 __iomem *) s, c, count);
|
||||
|
||||
@@ -96,7 +96,7 @@ struct bfin_serial_port {
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||||
struct work_struct tx_dma_workqueue;
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#endif
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||||
#ifdef CONFIG_SERIAL_BFIN_CTSRTS
|
||||
struct work_struct cts_workqueue;
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struct timer_list cts_timer;
|
||||
int cts_pin;
|
||||
int rts_pin;
|
||||
#endif
|
||||
|
||||
@@ -88,7 +88,7 @@ struct bfin_serial_port {
|
||||
# endif
|
||||
#endif
|
||||
#ifdef CONFIG_SERIAL_BFIN_CTSRTS
|
||||
struct work_struct cts_workqueue;
|
||||
struct timer_list cts_timer;
|
||||
int cts_pin;
|
||||
int rts_pin;
|
||||
#endif
|
||||
|
||||
@@ -96,7 +96,7 @@ struct bfin_serial_port {
|
||||
struct work_struct tx_dma_workqueue;
|
||||
#endif
|
||||
#ifdef CONFIG_SERIAL_BFIN_CTSRTS
|
||||
struct work_struct cts_workqueue;
|
||||
struct timer_list cts_timer;
|
||||
int cts_pin;
|
||||
int rts_pin;
|
||||
#endif
|
||||
|
||||
@@ -99,7 +99,7 @@ struct bfin_serial_port {
|
||||
struct work_struct tx_dma_workqueue;
|
||||
#endif
|
||||
#ifdef CONFIG_SERIAL_BFIN_CTSRTS
|
||||
struct work_struct cts_workqueue;
|
||||
struct timer_list cts_timer;
|
||||
int cts_pin;
|
||||
int rts_pin;
|
||||
#endif
|
||||
@@ -187,7 +187,7 @@ static void bfin_serial_hw_init(struct bfin_serial_port *uart)
|
||||
|
||||
#ifdef CONFIG_BFIN_UART1_CTSRTS
|
||||
peripheral_request(P_UART1_RTS, DRIVER_NAME);
|
||||
peripheral_request(P_UART1_CTS DRIVER_NAME);
|
||||
peripheral_request(P_UART1_CTS, DRIVER_NAME);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
@@ -202,7 +202,7 @@ static void bfin_serial_hw_init(struct bfin_serial_port *uart)
|
||||
|
||||
#ifdef CONFIG_BFIN_UART3_CTSRTS
|
||||
peripheral_request(P_UART3_RTS, DRIVER_NAME);
|
||||
peripheral_request(P_UART3_CTS DRIVER_NAME);
|
||||
peripheral_request(P_UART3_CTS, DRIVER_NAME);
|
||||
#endif
|
||||
#endif
|
||||
SSYNC();
|
||||
|
||||
@@ -88,7 +88,7 @@ struct bfin_serial_port {
|
||||
# endif
|
||||
#endif
|
||||
#ifdef CONFIG_SERIAL_BFIN_CTSRTS
|
||||
struct work_struct cts_workqueue;
|
||||
struct timer_list cts_timer;
|
||||
int cts_pin;
|
||||
int rts_pin;
|
||||
#endif
|
||||
|
||||
@@ -8,7 +8,7 @@
|
||||
#ifndef _ASM_IA64_SN_SIMULATOR_H
|
||||
#define _ASM_IA64_SN_SIMULATOR_H
|
||||
|
||||
|
||||
#if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2) || defined(CONFIG_IA64_SGI_UV)
|
||||
#define SNMAGIC 0xaeeeeeee8badbeefL
|
||||
#define IS_MEDUSA() ({long sn; asm("mov %0=cpuid[%1]" : "=r"(sn) : "r"(2)); sn == SNMAGIC;})
|
||||
|
||||
@@ -16,5 +16,10 @@
|
||||
#define IS_RUNNING_ON_SIMULATOR() (sn_prom_type)
|
||||
#define IS_RUNNING_ON_FAKE_PROM() (sn_prom_type == 2)
|
||||
extern int sn_prom_type; /* 0=hardware, 1=medusa/realprom, 2=medusa/fakeprom */
|
||||
#else
|
||||
#define IS_MEDUSA() 0
|
||||
#define SIMULATOR_SLEEP()
|
||||
#define IS_RUNNING_ON_SIMULATOR() 0
|
||||
#endif
|
||||
|
||||
#endif /* _ASM_IA64_SN_SIMULATOR_H */
|
||||
|
||||
@@ -56,7 +56,7 @@ struct cpuinfo_mips {
|
||||
struct cache_desc tcache; /* Tertiary/split secondary cache */
|
||||
int srsets; /* Shadow register sets */
|
||||
int core; /* physical core number */
|
||||
#if defined(CONFIG_MIPS_MT_SMTC)
|
||||
#if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_MIPS_MT_SMTC)
|
||||
/*
|
||||
* In the MIPS MT "SMTC" model, each TC is considered
|
||||
* to be a "CPU" for the purposes of scheduling, but
|
||||
@@ -64,7 +64,7 @@ struct cpuinfo_mips {
|
||||
* to all TCs within the same VPE.
|
||||
*/
|
||||
int vpe_id; /* Virtual Processor number */
|
||||
#endif /* CONFIG_MIPS_MT */
|
||||
#endif
|
||||
#ifdef CONFIG_MIPS_MT_SMTC
|
||||
int tc_id; /* Thread Context number */
|
||||
#endif
|
||||
|
||||
@@ -24,8 +24,8 @@
|
||||
|
||||
#define MSK(n) ((1 << (n)) - 1)
|
||||
#define REG32(addr) (*(volatile unsigned int *) (addr))
|
||||
#define REG(base, offs) REG32((unsigned int)(base) + offs##_##OFS)
|
||||
#define REGP(base, phys) REG32((unsigned int)(base) + (phys))
|
||||
#define REG(base, offs) REG32((unsigned long)(base) + offs##_##OFS)
|
||||
#define REGP(base, phys) REG32((unsigned long)(base) + (phys))
|
||||
|
||||
/* Accessors */
|
||||
#define GIC_REG(segment, offset) \
|
||||
|
||||
@@ -4,10 +4,10 @@
|
||||
#define LASAT_BASE_BAUD_100 (7372800 / 16)
|
||||
#define LASAT_UART_REGS_BASE_100 0x1c8b0000
|
||||
#define LASAT_UART_REGS_SHIFT_100 2
|
||||
#define LASATINT_UART_100 8
|
||||
#define LASATINT_UART_100 16
|
||||
|
||||
/* * LASAT 200 boards serial configuration */
|
||||
#define LASAT_BASE_BAUD_200 (100000000 / 16 / 12)
|
||||
#define LASAT_UART_REGS_BASE_200 (Vrc5074_PHYS_BASE + 0x0300)
|
||||
#define LASAT_UART_REGS_SHIFT_200 3
|
||||
#define LASATINT_UART_200 13
|
||||
#define LASATINT_UART_200 21
|
||||
|
||||
@@ -615,6 +615,7 @@ enum soc_au1500_ints {
|
||||
AU1000_RTC_MATCH1_INT,
|
||||
AU1000_RTC_MATCH2_INT,
|
||||
AU1500_PCI_ERR_INT,
|
||||
AU1500_RESERVED_INT,
|
||||
AU1000_USB_DEV_REQ_INT,
|
||||
AU1000_USB_DEV_SUS_INT,
|
||||
AU1000_USB_HOST_INT,
|
||||
|
||||
@@ -134,6 +134,4 @@
|
||||
|
||||
#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_MODIFIED | _CACHE_MASK)
|
||||
|
||||
#define CONF_CM_DEFAULT (PAGE_CACHABLE_DEFAULT>>_CACHE_SHIFT)
|
||||
|
||||
#endif /* _ASM_PGTABLE_BITS_H */
|
||||
|
||||
@@ -17,8 +17,6 @@
|
||||
#define MB_POWER 6 /* media bay contains a Power device (???) */
|
||||
#define MB_NO 7 /* media bay contains nothing */
|
||||
|
||||
int check_media_bay(struct device_node *which_bay, int what);
|
||||
|
||||
/* Number of bays in the machine or 0 */
|
||||
extern int media_bay_count;
|
||||
|
||||
@@ -29,6 +27,16 @@ int check_media_bay_by_base(unsigned long base, int what);
|
||||
/* called by IDE PMAC host driver to register IDE controller for media bay */
|
||||
int media_bay_set_ide_infos(struct device_node *which_bay, unsigned long base,
|
||||
int irq, ide_hwif_t *hwif);
|
||||
|
||||
int check_media_bay(struct device_node *which_bay, int what);
|
||||
|
||||
#else
|
||||
|
||||
static inline int check_media_bay(struct device_node *which_bay, int what)
|
||||
{
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
@@ -131,7 +131,6 @@ struct spu {
|
||||
u64 flags;
|
||||
u64 class_0_pending;
|
||||
u64 class_0_dar;
|
||||
u64 class_0_dsisr;
|
||||
u64 class_1_dar;
|
||||
u64 class_1_dsisr;
|
||||
size_t ls_size;
|
||||
|
||||
@@ -254,7 +254,7 @@ struct spu_state {
|
||||
u64 spu_chnldata_RW[32];
|
||||
u32 spu_mailbox_data[4];
|
||||
u32 pu_mailbox_data[1];
|
||||
u64 class_0_dar, class_0_dsisr, class_0_pending;
|
||||
u64 class_0_dar, class_0_pending;
|
||||
u64 class_1_dar, class_1_dsisr;
|
||||
unsigned long suspend_time;
|
||||
spinlock_t register_lock;
|
||||
|
||||
@@ -34,7 +34,7 @@
|
||||
* SMP since it is only used to order updates to system memory.
|
||||
*/
|
||||
#define mb() __asm__ __volatile__ ("sync" : : : "memory")
|
||||
#define rmb() __asm__ __volatile__ (__stringify(LWSYNC) : : : "memory")
|
||||
#define rmb() __asm__ __volatile__ ("sync" : : : "memory")
|
||||
#define wmb() __asm__ __volatile__ ("sync" : : : "memory")
|
||||
#define read_barrier_depends() do { } while(0)
|
||||
|
||||
|
||||
@@ -112,8 +112,8 @@ extern int geode_get_dev_base(unsigned int dev);
|
||||
#define VSA_VR_UNLOCK 0xFC53 /* unlock virtual register */
|
||||
#define VSA_VR_SIGNATURE 0x0003
|
||||
#define VSA_VR_MEM_SIZE 0x0200
|
||||
#define VSA_SIG 0x4132 /* signature is ascii 'VSA2' */
|
||||
|
||||
#define AMD_VSA_SIG 0x4132 /* signature is ascii 'VSA2' */
|
||||
#define GSW_VSA_SIG 0x534d /* General Software signature */
|
||||
/* GPIO */
|
||||
|
||||
#define GPIO_OUTPUT_VAL 0x00
|
||||
|
||||
@@ -14,7 +14,8 @@
|
||||
#define __PAGE_OFFSET _AC(CONFIG_PAGE_OFFSET, UL)
|
||||
|
||||
#ifdef CONFIG_X86_PAE
|
||||
#define __PHYSICAL_MASK_SHIFT 36
|
||||
/* 44=32+12, the limit we can fit into an unsigned long pfn */
|
||||
#define __PHYSICAL_MASK_SHIFT 44
|
||||
#define __VIRTUAL_MASK_SHIFT 32
|
||||
#define PAGETABLE_LEVELS 3
|
||||
|
||||
|
||||
@@ -166,6 +166,9 @@ unifdef-y += acct.h
|
||||
unifdef-y += adb.h
|
||||
unifdef-y += adfs_fs.h
|
||||
unifdef-y += agpgart.h
|
||||
ifeq ($(wildcard include/asm-$(SRCARCH)/a.out.h),include/asm-$(SRCARCH)/a.out.h)
|
||||
unifdef-y += a.out.h
|
||||
endif
|
||||
unifdef-y += apm_bios.h
|
||||
unifdef-y += atalk.h
|
||||
unifdef-y += atmdev.h
|
||||
|
||||
@@ -1,8 +1,6 @@
|
||||
#ifndef __A_OUT_GNU_H__
|
||||
#define __A_OUT_GNU_H__
|
||||
|
||||
#ifdef CONFIG_ARCH_SUPPORTS_AOUT
|
||||
|
||||
#define __GNU_EXEC_MACROS__
|
||||
|
||||
#ifndef __STRUCT_EXEC_OVERRIDE__
|
||||
@@ -277,10 +275,4 @@ struct relocation_info
|
||||
#endif /* no N_RELOCATION_INFO_DECLARED. */
|
||||
|
||||
#endif /*__ASSEMBLY__ */
|
||||
#else /* CONFIG_ARCH_SUPPORTS_AOUT */
|
||||
#ifndef __ASSEMBLY__
|
||||
struct exec {
|
||||
};
|
||||
#endif
|
||||
#endif /* CONFIG_ARCH_SUPPORTS_AOUT */
|
||||
#endif /* __A_OUT_GNU_H__ */
|
||||
|
||||
@@ -30,14 +30,6 @@
|
||||
#ifndef _AGP_BACKEND_H
|
||||
#define _AGP_BACKEND_H 1
|
||||
|
||||
#ifndef TRUE
|
||||
#define TRUE 1
|
||||
#endif
|
||||
|
||||
#ifndef FALSE
|
||||
#define FALSE 0
|
||||
#endif
|
||||
|
||||
enum chipset_type {
|
||||
NOT_SUPPORTED,
|
||||
SUPPORTED,
|
||||
@@ -57,7 +49,7 @@ struct agp_kern_info {
|
||||
size_t aper_size;
|
||||
int max_memory; /* In pages */
|
||||
int current_memory;
|
||||
int cant_use_aperture;
|
||||
bool cant_use_aperture;
|
||||
unsigned long page_mask;
|
||||
struct vm_operations_struct *vm_ops;
|
||||
};
|
||||
@@ -83,9 +75,9 @@ struct agp_memory {
|
||||
off_t pg_start;
|
||||
u32 type;
|
||||
u32 physical;
|
||||
u8 is_bound;
|
||||
u8 is_flushed;
|
||||
u8 vmalloc_flag;
|
||||
bool is_bound;
|
||||
bool is_flushed;
|
||||
bool vmalloc_flag;
|
||||
};
|
||||
|
||||
#define AGP_NORMAL_MEMORY 0
|
||||
|
||||
@@ -206,8 +206,8 @@ struct agp_front_data {
|
||||
struct agp_controller *current_controller;
|
||||
struct agp_controller *controllers;
|
||||
struct agp_file_private *file_priv_list;
|
||||
u8 used_by_controller;
|
||||
u8 backend_acquired;
|
||||
bool used_by_controller;
|
||||
bool backend_acquired;
|
||||
};
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
@@ -94,7 +94,7 @@ extern unsigned long init_bootmem_node(pg_data_t *pgdat,
|
||||
unsigned long freepfn,
|
||||
unsigned long startpfn,
|
||||
unsigned long endpfn);
|
||||
extern void reserve_bootmem_node(pg_data_t *pgdat,
|
||||
extern int reserve_bootmem_node(pg_data_t *pgdat,
|
||||
unsigned long physaddr,
|
||||
unsigned long size,
|
||||
int flags);
|
||||
|
||||
@@ -41,7 +41,7 @@ struct ip_tunnel_prl {
|
||||
__u16 __reserved;
|
||||
__u32 datalen;
|
||||
__u32 __reserved2;
|
||||
void __user *data;
|
||||
/* data follows */
|
||||
};
|
||||
|
||||
/* PRL flags */
|
||||
|
||||
@@ -367,6 +367,12 @@ static inline int ipv6_addr_any(const struct in6_addr *a)
|
||||
a->s6_addr32[2] | a->s6_addr32[3] ) == 0);
|
||||
}
|
||||
|
||||
static inline int ipv6_addr_loopback(const struct in6_addr *a)
|
||||
{
|
||||
return ((a->s6_addr32[0] | a->s6_addr32[1] |
|
||||
a->s6_addr32[2] | (a->s6_addr32[3] ^ htonl(1))) == 0);
|
||||
}
|
||||
|
||||
static inline int ipv6_addr_v4mapped(const struct in6_addr *a)
|
||||
{
|
||||
return ((a->s6_addr32[0] | a->s6_addr32[1] |
|
||||
|
||||
@@ -95,6 +95,11 @@ extern struct list_head net_namespace_list;
|
||||
#ifdef CONFIG_NET_NS
|
||||
extern void __put_net(struct net *net);
|
||||
|
||||
static inline int net_alive(struct net *net)
|
||||
{
|
||||
return net && atomic_read(&net->count);
|
||||
}
|
||||
|
||||
static inline struct net *get_net(struct net *net)
|
||||
{
|
||||
atomic_inc(&net->count);
|
||||
@@ -125,6 +130,12 @@ int net_eq(const struct net *net1, const struct net *net2)
|
||||
return net1 == net2;
|
||||
}
|
||||
#else
|
||||
|
||||
static inline int net_alive(struct net *net)
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
|
||||
static inline struct net *get_net(struct net *net)
|
||||
{
|
||||
return net;
|
||||
|
||||
@@ -15,6 +15,7 @@ enum nf_ct_ext_id
|
||||
|
||||
/* Extensions: optional stuff which isn't permanently in struct. */
|
||||
struct nf_ct_ext {
|
||||
struct rcu_head rcu;
|
||||
u8 offset[NF_CT_EXT_NUM];
|
||||
u8 len;
|
||||
char data[0];
|
||||
|
||||
Reference in New Issue
Block a user