In case a counter is already reserved by the watchdog or perf_event
subsystem, oprofile ignored this counters silently. This case is
handled now and oprofile_setup() now reports an error.
Signed-off-by: Robert Richter <robert.richter@amd.com>
For AMD's and Intel's P6 generic performance counters have pairwise
counter and control msrs. This patch changes the counter reservation
in a way that both msrs must be registered. It joins some counter
loops and also removes the unnecessary NUM_CONTROLS macro in the AMD
implementation.
Signed-off-by: Robert Richter <robert.richter@amd.com>
This patch improves the error handler in nmi_setup(). Most parts of
the code are moved to allocate_msrs(). In case of an error
allocate_msrs() also frees already allocated memory. nmi_setup()
becomes easier and better extendable.
Signed-off-by: Robert Richter <robert.richter@amd.com>
When we compare the devices DMA mask to the amount of memory we need to
make sure we treat the DMA mask as an address boundary. For example if
the DMA_MASK(32) and we have 4G of memory we'd incorrectly set the dma
ops to swiotlb. We need to add one to the dma mask when we convert it.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Zoom2 and 3 have UARTs only on the external debug board.
GPMC needs to be mapped early to use it for DEBUG_LL.
Additionally, 0xfb000000 overlaps with other areas, so
use 0xfa400000 for the virtual address instead.
Note that with the pending serial.c patches you need to
set console=ttyS0,115200n8 as it will be the only UART
mapped. To use DEBUG_LL, you need to pass also earlyprintk
in cmdline.
Cc: Allen Pais <allen.pais@ti.com>
Acked-by: Vikram Pandita <vikram.pandita@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This removes the dependency to the UART1 being available for storing
the debug configuration in uncompress.h. This will simplify the
DEBUG_LL UART configuration for boards that may not have UART1, or
have an external UART as it requires only one mapping for DEBUG_LL.
The patch has a few limitations. Basically now we're assuming that
the kernel uncompress code won't overlap with OMAP_UART_INFO. We also
assume the printascii is called at least once before paging_init in
order for addruart to have a chance to read the UART setup from
OMAP_UART_INFO.
As suggested by Cyril Chemparathy <cyril@ti.com>,
Vikram Pandita <vikram.pandita@ti.com> and
Kevin Hilman <khilman@deeprootsystems.com>. Based on an earlier
patch posted for Davinci by Cyril Chemparathy <cyril@ti.com>.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Otherwise we'll get an error about get_irqnr_and_base being defined
twice. Add an entry for omap4, and use ARCH_OMAP3 for omap3 instead of
ARCH_OMAP3430.
Also fix the check for omap1 to use ARCH_OMAP2PLUS to avoid having to
add ARCH_OMAP4 separately there.
Signed-off-by: Tony Lindgren <tony@atomide.com>
K8_NB depends on PCI and when the last is disabled (allnoconfig) we fail
at the final linking stage due to missing exported num_k8_northbridges.
Add a header stub for that.
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
LKML-Reference: <20100503183036.GJ26107@aftab>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
The only difference between FPU and SIMD exceptions is where the
status bits are read from (cwd/swd vs. mxcsr). This also fixes
the discrepency introduced by commit adf77bac, which fixed FPU
but not SIMD.
Signed-off-by: Brian Gerst <brgerst@gmail.com>
LKML-Reference: <1269176446-2489-3-git-send-email-brgerst@gmail.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
The cache flush denied error is an erratum on some AMD 486 clones. If an invd
instruction is executed in userspace, the processor calls exception 19 (13 hex)
instead of #GP (13 decimal). On cpus where XMM is not supported, redirect
exception 19 to do_general_protection(). Also, remove die_if_kernel(), since
this was the last user.
Signed-off-by: Brian Gerst <brgerst@gmail.com>
LKML-Reference: <1269176446-2489-2-git-send-email-brgerst@gmail.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Since commit b2a731aa5c, dns323_init() is
setting the power led gpio direction with gpio_direction_output() but
doesn't request the gpio before (which is not permitted by the gpio
layer afaik). This behaviour is triggering a WARN() at boot time.
Tested-by: Christian Samsel <csamsel@gmxpro.de>
Cc: Martin Michlmayr <tbm@cyrius.com>
Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
[ Part 2: "Attached Text" ]
Handle incorrectly reported permission faults for qsd8650. On
permission faults, retry MVA to PA conversion. If retry detects
translation fault. Report as translation fault.
Cc: Jamie Lokier <jamie@shareable.org>
Signed-off-by: Dave Estes <cestes@quicinc.com>
ARCH_MSM supports armv7 cpus, so we're pushed the CPU_V6/CPU_V7 selection
down into the arch/arm/mach-msm/Kconfig.
Also update the description to be a bit more accurate.
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
Update mx51_defconfig to include USB EHCI by default.
This patch applies to 2.6.34-rc6.
Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds USB HW initializiation code to /plat-mxc/ehci.c.
-Sets some specific PHY settings
Renames mxc_set_usbcontrol to mxc_initialize_usb_hw.
Adds new register bit defines for the USB HW on Freescale
SoCs.
This patch applies to 2.6.34-rc6.
Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
Reviewed-by: Daniel Mack <daniel@caiaq.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch enables USB host functionality for Host1 and OTG port on
Freescale MX51 Babbage HW. This patch contains the board specific
HW initialization of the USB HW.
This patch applies to 2.6.34-rc6.
Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
Reviewed-by: Daniel Mack <daniel@caiaq.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch is part of enabling USB for Freescale MX51 Babbage HW. This
patch adds device structures for USB Host1 and OTG port, and adds
clocking information for USB HW.
This patch applies to 2.6.34-rc6.
Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch is part of enabling USB for Freescale MX51 Babbage HW. This
patch updates the iomux pins for USB, and gpio line for reset the
USB hub on the MX51 Babbage HW.
This patch applies to 2.6.34-rc6.
Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Disable the processor clock when the CPU is idle.
This saves much more power than merely entering 'Wait for Interrupt' mode.
Since JTAG-debugging doesn't work when the processor clock is switched off,
make it conditional on CONFIG_DEBUG_KERNEL.
Signed-off-by: Anders Larsen <al@alarsen.net>
Acked-by: Andrew Victor <avictor.za@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch adds support for CNS3420VB rev 1.3 boards. With this patch
CNS3420VB boards are able to boot up to the userspace, with a console
available on UART0.
Signed-off-by: Anton Vorontsov <avorontsov@mvista.com>
This patch adds very basic support for ECONA CNS3xxx ARM11 MPcore
(ARMv6) dual-core processors.
Note that SMP is not yet supported, as well as many peripheral
devices. Support for these features will be added later.
Signed-off-by: Anton Vorontsov <avorontsov@mvista.com>
This patch updates the initialisation routines for the Realview boards
and the Versatile Express board [ca9x4 tile] so that they register their
PMU IRQs with the PMU framework in the Kernel.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
In anticipation of PMU support for Realview boards, the IRQs defined
for some of these boards need updating.
This patch removes incorrect L220 IRQ definitions, corrects incorrect PMU
IRQs and adds any missing IRQs that are required.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
