Some 43602 devices are band specific and identify themselves
with different PCIE device ID. This patch adds support for the
43602 2.4G and 5.0G devices used in for example R8000 router.
Reviewed-by: Arend Van Spriel <arend@broadcom.com>
Reviewed-by: Franky (Zhenhui) Lin <frankyl@broadcom.com>
Reviewed-by: Pieter-Paul Giesberts <pieterpg@broadcom.com>
Reviewed-by: Daniel (Deognyoun) Kim <dekim@broadcom.com>
Signed-off-by: Hante Meuleman <meuleman@broadcom.com>
Signed-off-by: Arend van Spriel <arend@broadcom.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Pull "last dts changes for 3.19" from Jason Cooper:
- rk3288 thermal driver that got accepted into the thermal tree
- mmc fifo sizes for Cortex-A9 SoCs
- labels for the leds on the RadxaRock
- core system supply for the Marsboard
* tag 'v3.19-rockchip-dts4' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: Add input voltage supply regulators in pmic for Marsboard
ARM: dts: rockchip: set FIFO size for SDMMC, SDIO and EMMC on rk3066 and rk3188
ARM: dts: rockchip: add label property for leds on Radxa Rock
ARM: dts: rockchip: enable thermal on rk3288-evb board
ARM: dts: rockchip: add main thermal info to rk3288
ARM: dts: rockchip: add RK3288 Thermal data
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Wake On Lan was not working on laptop DELL Vostro 1500.
If WOL was turned on, BCM4401 was powered up in suspend mode. LEDs blinked.
But the laptop could not be woken up with the Magic Packet. The reason for
that was that PCIE was not enabled as a system wakeup source and
therefore the host PCI bridge was not powered up in suspend mode.
PCIE was not enabled in suspend by PM because no child devices were
registered as wakeup source during suspend process.
On laptop BCM4401 is connected through the SSB bus, that is connected to the
PCI-Express bus. SSB and B44 did not use standard PM wakeup functions
and did not forward wakeup settings to their parents.
To fix that B44 driver enables PM wakeup and registers new wakeup source
using device_set_wakeup_enable(). Wakeup is automatically reported to the parent SSB
bus via power.wakeup_path. SSB bus enables wakeup for the parent PCI bridge, if there is any
child devices with enabled wakeup functionality. All other steps are
done by PM core code.
Signed-off-by: Andrey Skvortsov <Andrej.Skvortzov@gmail.com>
Signed-off-by: Michael Buesch <m@bues.ch>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This is the selection of the new PWM driver using TC Blocks. This driver is
useful so we enable it in both sama5 and at91_dt defconfig files.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Add the Atmel eXtended DMA Controller driver option. This driver is first used
on SAMA5D4 SoCs and only relevant in sama5_defconfig file.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
This commit adjusts the registration of the cpufreq-dt driver in the
mvebu platform to indicate to the cpufreq driver that the platform has
independent clocks for each CPU.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Johannes Berg <johannes@sipsolutions.net> says:
"This time I have Felix's no-status rate control work, which will allow
drivers to work better with rate control even if they don't have perfect
status reporting. In addition to this, a small hwsim fix from Patrik,
one of the regulatory patches from Arik, and a number of cleanups and
fixes I did myself.
Of note is a patch where I disable CFG80211_WEXT so that compatibility
is no longer selectable - this is intended as a wake-up call for anyone
who's still using it, and is still easily worked around (it's a one-line
patch) before we fully remove the code as well in the future."
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Samuel Ortiz <sameo@linux.intel.com> says:
"NFC: 3.19 pull request
This is the NFC pull request for 3.19.
With this one we get:
- NFC digital improvements for DEP support: Chaining, NACK and ATN
support added.
- NCI improvements: Support for p2p target, SE IO operand addition,
SE operands extensions to support proprietary implementations, and
a few fixes.
- NFC HCI improvements: OPEN_PIPE and NOTIFY_ALL_CLEARED support,
and SE IO operand addition.
- A bunch of minor improvements and fixes for STMicro st21nfcb and
st21nfca"
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Pull "ARM: tegra: Device tree changes for v3.19" from Thierry Reding:
The bulk of these changes add memory controller nodes for Tegra30,
Tegra114 and Tegra124. The memory controller implements an IOMMU that
the display controllers are attached to. This allows them to scan out
physically non-contiguous framebuffers and removes one of the primary
users of CMA.
The only other change adds a new MIPI pad control bank to the pin
controller on Tegra124. The corresponding driver patch for this went
into v3.18 as:
3ccc11f6b8 pinctrl: tegra: Add MIPI pad control
* tag 'tegra-for-3.19-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Enable IOMMU for display controllers on Tegra124
ARM: tegra: Enable IOMMU for display controllers on Tegra114
ARM: tegra: Enable IOMMU for display controllers on Tegra30
ARM: tegra: Add memory controller support for Tegra124
ARM: tegra: Add memory controller support for Tegra114
ARM: tegra: Add memory controller support for Tegra30
ARM: tegra: Add APB_MISC_GP as a MIPI pad control bank
These additional commits are merged as dependencies:
memory: Add NVIDIA Tegra memory controller support
of: Add NVIDIA Tegra memory controller binding
ARM: tegra: Move AHB Kconfig to drivers/amba
amba: Add Kconfig file
clk: tegra: Implement memory-controller clock
powerpc/iommu: Rename iommu_[un]map_sg functions
iommu: Improve error handling when setting bus iommu
iommu: Do more input validation in iommu_map_sg()
iommu: Add iommu_map_sg() function
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Pull "ARM: tegra: IOMMU support for v3.19" from Thierry Reding:
This adds the driver pieces required for IOMMU support on Tegra30,
Tegra114 and Tegra124.
* tag 'tegra-for-3.19-iommu' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
memory: Add NVIDIA Tegra memory controller support
of: Add NVIDIA Tegra memory controller binding
ARM: tegra: Move AHB Kconfig to drivers/amba
amba: Add Kconfig file
clk: tegra: Implement memory-controller clock
powerpc/iommu: Rename iommu_[un]map_sg functions
iommu: Improve error handling when setting bus iommu
iommu: Do more input validation in iommu_map_sg()
iommu: Add iommu_map_sg() function
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
While writing changeset fdf1bc9fa2, I noticed some checkpatch
complains about the CodingStyle for function parameters. So,
clean them.
While here, also removes uneeded "extern" from function prototype.
No functional changes.
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
This patch is basically produced while testing a tool that
Joe Perches sent upstream sometime ago:
https://lkml.org/lkml/2014/7/11/794
I used it with those arguments:
$ reformat_with_checkpatch.sh drivers/media/usb/em28xx/em28xx*.[ch]
It actually produced 24 patches, with is too much, and showed
interesting things: gcc produced different codes on most of the
patches, even with just linespace changes. The total code data
remained the same on all cases I checked though.
Anyway, provided that we fold the resulting patches, this tool
seems useful.
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
Since PCIe is using SMMUv1 which only supports 15-bit stream ID,
only 7-bit PCI bus id is used to specify stream ID. Therefore,
we only limit the PCI bus range to 0x7f.
Signed-off-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
VE's reset driver lives at the third level of the directories:
drivers/power/reset/vexpress-poweroff.c
and wasn't matched by the */*/vexpress* pattern.
Added additional pattern for all files at this level. This should be
enough for a while...
Signed-off-by: Pawel Moll <pawel.moll@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch adds support for new type of firmware versions of Si2168 chip.
Old type: n x 8 bytes (all data, first byte seems to be 04 or 05)
New type: n x 17 bytes (1 byte indicates len and max 16 bytes data)
New version of TechnoTrend CT2-4400 drivers
(http://www.tt-downloads.de/bda-treiber_4.3.0.0.zip) contains newer
firmware for Si2168-B40 that is in the new format. It can be extracted
with the following command:
dd if=ttTVStick4400_64.sys ibs=1 skip=323872 count=6919 of=dvb-demod-si2168-b40-01.fw
Signed-off-by: Olli Salonen <olli.salonen@iki.fi>
Reviewed-by: Antti Palosaari <crope@iki.fi>
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
Pull "Reset controller changes for v3.19" from Philipp Zabel:
This adds a new driver for the sti soc family, and creates
a reset_control_status interface, which is added to the existing
drivers.
* tag 'reset-for-3.19-2' of git://git.pengutronix.de/git/pza/linux:
reset: add socfpga_reset_status
reset: sti: Document sti-picophyreset controllers bindings.
reset: stih407: Add softreset, powerdown and picophy controllers
reset: stih407: Add reset controllers DT bindings
reset: add reset_control_status helper function
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
As reported by smatch:
drivers/media/tuners/tda18271-common.c:176 tda18271_read_extended() warn: if statement not indented
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
Drivers that use dvb_attach can have just one exported symbol,
or they will cause compilation breakages depending on the
selected frontends.
As Jim reported:
drivers/built-in.o: In function `technisat_usb2_set_voltage':
technisat-usb2.c:(.text+0x3b4919): undefined reference to `stv090x_set_gpio'
make: *** [vmlinux] Error 1
That happens because, on his configuration, the configuration
is:
CONFIG_DVB_USB=y
CONFIG_DVB_STV090x=m
Luis proposed ar way to fix, but that would just force the
STV090x to be selected, even if one wants to use a device
with a different frontend.
Instead, let's do the right thing: move set_gpio to the
configuration structure and fill it during dvb_attach().
This way, the driver can still call it, and dvb_attach()
will load stv090x module only if the device really needs it.
Reported by: Jim Davis <jim.epost@gmail.com>
Cc: Luis Rodriguez <mcgrof@suse.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
Fixed issue reported by Dan Carpenter
410 if (adf_get_cfg_int(accel_dev, "Accelerator0",
411 ADF_ETRMGR_COALESCING_ENABLED_FORMAT,
412 bank_num, &coalesc_enabled) && coalesc_enabled)
This condition is reversed, so it only enables coalescing on error.
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Tadeusz Struk <tadeusz.struk@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Pull "mvebu SoC suspend changes for v3.19" from Jason Cooper:
- Armada 370/XP suspend/resume support
- mvebu SoC driver suspend/resume support
- irqchip
- clocksource
- mbus
- clk
* tag 'mvebu-soc-suspend-3.19' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: add SDRAM controller description for Armada XP
ARM: mvebu: adjust mbus controller description on Armada 370/XP
ARM: mvebu: add suspend/resume DT information for Armada XP GP
ARM: mvebu: synchronize secondary CPU clocks on resume
ARM: mvebu: make sure MMU is disabled in armada_370_xp_cpu_resume
ARM: mvebu: Armada XP GP specific suspend/resume code
ARM: mvebu: reserve the first 10 KB of each memory bank for suspend/resume
ARM: mvebu: implement suspend/resume support for Armada XP
clk: mvebu: add suspend/resume for gatable clocks
bus: mvebu-mbus: provide a mechanism to save SDRAM window configuration
bus: mvebu-mbus: suspend/resume support
clocksource: time-armada-370-xp: add suspend/resume support
irqchip: armada-370-xp: Add suspend/resume support
Documentation: dt-bindings: minimal documentation for MVEBU SDRAM controller
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This is a squash of several imx_v6_v7_defconfig update patches.
- Enable tlv320aic3x audio codec by default (Phytec PBAB01 board)
- Enable DS1307 rtc and gpio fan by default (TBS2910 board)
- Select thermal related drivers
- Add SNVS power off driver
Signed-off-by: Dmitry Lavnikevich <d.lavnikevich@sam-solutions.com>
Signed-off-by: Soeren Moch <smoch@web.de>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Robin Gong <b38343@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This pull request contains the following changes to the Broadcom GISB bus
arbiter from Kevin Cernekee:
- Extend brcmstb GISB bus driver to work on MIPS (currently ARM-only) and support
65nm and 40nm MIPS-based chips such as: BCM7038, BCM7400 and BCM7435
* tag 'arm-soc/for-3.19/brcmstb-drivers' of https://github.com/brcm/linux:
bus: brcmstb_gisb: Add register offset tables for older chips
bus: brcmstb_gisb: Look up register offsets in a table
bus: brcmstb_gisb: Introduce wrapper functions for MMIO accesses
bus: brcmstb_gisb: Make the driver buildable on MIPS
Conflicts:
drivers/bus/brcmstb_gisb.c
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Currently we use a mixture of atomic/non-atomic bitops
and the local_int spin lock to protect the pending_irqs bitmap
and interrupt payload data.
We need to use atomic bitops for the pending_irqs bitmap everywhere
and in addition acquire the local_int lock where interrupt data needs
to be protected.
Signed-off-by: Jens Freimann <jfrei@linux.vnet.ibm.com>
Reviewed-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
The cpu address of a source cpu (responsible for an external irq) is only to
be stored if bit 6 of the ext irq code is set.
If bit 6 is not set, it is to be zeroed out.
The special external irq code used for virtio and pfault uses the cpu addr as a
parameter field. As bit 6 is set, this implementation is correct.
Reviewed-by: Thomas Huth <thuth@linux.vnet.ibm.com>
Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Remove TechnoTrend CT2-4400 and CT2-4650 devices from cxusb.
They are supported by dvb-usb-dvbsky driver in PATCH 3/3.
Signed-off-by: Nibble Max <nibble.max@gmail.com>
Reviewed-by: Olli Salonen <olli.salonen@iki.fi>
Reviewed-by: Antti Palosaari <crope@iki.fi>
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
Add iommus properties to the device tree nodes for the two display
controllers found on Tegra124. This will allow the display controllers
to map physically non-contiguous buffers to I/O virtual contiguous
address spaces so that they can be used for scan-out.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add iommus properties to the device tree nodes for the two display
controllers found on Tegra114. This will allow the display controllers
to map physically non-contiguous buffers to I/O virtual contiguous
address spaces so that they can be used for scan-out.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add iommus properties to the device tree nodes for the two display
controllers found on Tegra30. This will allow the display controllers to
map physically non-contiguous buffers to I/O virtual contiguous address
spaces so that they can be used for scan-out.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add the memory controller and wire up the interrupt that is used to
report errors. Provide a reference to the memory controller clock and
mark the device as being an IOMMU by adding an #iommu-cells property.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add the device tree node for the memory controller found on Tegra114
SoCs. The memory controller integrates an IOMMU (called SMMU) as well as
various knobs to tweak memory accesses by the various clients.
The old IOMMU device tree node is collapsed into the memory controller
node to more accurately describe the hardware. While this change is
incompatible, the IOMMU driver has never had any users so the change is
not going to cause any breakage.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Collapses the old memory-controller and IOMMU device tree nodes into a
single node to more accurately describe the hardware.
While this is an incompatible change there are no users of the IOMMU on
Tegra, even though a driver has existed for some time.
Signed-off-by: Thierry Reding <treding@nvidia.com>
This patch adds the APB_MISC_GP_MIPI_PAD_CTRL_0 as a pin-control bank on
Tegra124 so the new MIPI pad control group can be muxed between CSI and
DSI_B.
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
rescuer_thread() caches &rescuer->scheduled in a local variable
scheduled for convenience. There's one WARN_ON_ONCE() which was using
&rescuer->scheduled directly. Replace it with the local variable.
This patch causes no functional difference.
Signed-off-by: Tejun Heo <tj@kernel.org>
