Commit Graph

506942 Commits

Author SHA1 Message Date
Andrew Bresticker
dfc94d1b21 MIPS: sead3: Do not overlap CPU/GIC IRQ ranges
In preparation for GIC IRQ domain support, assign a GIC IRQ base
that does not overlap with the CPU IRQs.

Note that this breaks SEAD-3 when the GIC is in EIC mode, though
I'm not convinced it was working before either.  It will be fixed
in the following patches.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-by: Qais Yousef <qais.yousef@imgtec.com>
Tested-by: Qais Yousef <qais.yousef@imgtec.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Jeffrey Deans <jeffrey.deans@imgtec.com>
Cc: Markos Chandras <markos.chandras@imgtec.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Jonas Gorski <jogo@openwrt.org>
Cc: John Crispin <blogic@openwrt.org>
Cc: David Daney <ddaney.cavm@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7813/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:44:54 +01:00
Andrew Bresticker
d8725fddfd MIPS: SEAD3: Remove sead3-serial.c
It's a duplicate of sead3-platform.c and is not even compiled.
Remove it before we start fixing up IRQ assignments.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-by: Qais Yousef <qais.yousef@imgtec.com>
Tested-by: Qais Yousef <qais.yousef@imgtec.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Jeffrey Deans <jeffrey.deans@imgtec.com>
Cc: Markos Chandras <markos.chandras@imgtec.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Jonas Gorski <jogo@openwrt.org>
Cc: John Crispin <blogic@openwrt.org>
Cc: David Daney <ddaney.cavm@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7807/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:44:53 +01:00
Andrew Bresticker
a67b3cf1af MIPS: Remove gic_{enable,disable}_interrupt()
Nothing calls gic_{enable,disable}_interrupt() any more.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-by: Qais Yousef <qais.yousef@imgtec.com>
Tested-by: Qais Yousef <qais.yousef@imgtec.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Bresticker <abrestic@chromium.org>
Cc: Jeffrey Deans <jeffrey.deans@imgtec.com>
Cc: Markos Chandras <markos.chandras@imgtec.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Qais Yousef <qais.yousef@imgtec.com>
Cc: Jonas Gorski <jogo@openwrt.org>
Cc: John Crispin <blogic@openwrt.org>
Cc: David Daney <ddaney.cavm@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7806/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:44:53 +01:00
Andrew Bresticker
ff1e29ade4 MIPS: smp-cps: Enable all hardware interrupts on secondary CPUs
Currently interrupt vectors 2 and 5 are left disabled on secondary CPUs.
Since systems using CPS must also have a GIC, which is responsible for
routing all external interrupts and can map them to any hardware interrupt
vector, enable the remaining vectors.  The two software interrupt vectors
are left disabled since they are not used with CPS.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-by: Qais Yousef <qais.yousef@imgtec.com>
Tested-by: Qais Yousef <qais.yousef@imgtec.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Bresticker <abrestic@chromium.org>
Cc: Jeffrey Deans <jeffrey.deans@imgtec.com>
Cc: Markos Chandras <markos.chandras@imgtec.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Qais Yousef <qais.yousef@imgtec.com>
Cc: Jonas Gorski <jogo@openwrt.org>
Cc: John Crispin <blogic@openwrt.org>
Cc: David Daney <ddaney.cavm@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7803/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:44:53 +01:00
Andrew Bresticker
a669efc4a3 MIPS: Add hook to get C0 performance counter interrupt
The hardware perf event driver and oprofile interpret the global
cp0_perfcount_irq differently: in the hardware perf event driver
it is an offset from MIPS_CPU_IRQ_BASE and in oprofile it is the
actual IRQ number.  This still works most of the time since
MIPS_CPU_IRQ_BASE is usually 0, but is clearly wrong.  Since the
performance counter interrupt may vary from platform to platform
like the C0 timer interrupt, add the optional get_c0_perfcount_int
hook which returns the IRQ number of the performance counter.
The hook should return < 0 if the performance counter interrupt is
shared with the timer.  If the hook is not present, the CPU vector
reported in C0_IntCtl (cp0_perfcount_irq) is used.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-by: Qais Yousef <qais.yousef@imgtec.com>
Tested-by: Qais Yousef <qais.yousef@imgtec.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Bresticker <abrestic@chromium.org>
Cc: Jeffrey Deans <jeffrey.deans@imgtec.com>
Cc: Markos Chandras <markos.chandras@imgtec.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Qais Yousef <qais.yousef@imgtec.com>
Cc: Jonas Gorski <jogo@openwrt.org>
Cc: John Crispin <blogic@openwrt.org>
Cc: David Daney <ddaney.cavm@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7805/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:44:53 +01:00
Andrew Bresticker
079a460176 MIPS: i8259: Use IRQ domains
Create a legacy IRQ domain for the 16 i8259 interrupts.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-by: Qais Yousef <qais.yousef@imgtec.com>
Tested-by: Qais Yousef <qais.yousef@imgtec.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Bresticker <abrestic@chromium.org>
Cc: Jeffrey Deans <jeffrey.deans@imgtec.com>
Cc: Markos Chandras <markos.chandras@imgtec.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Qais Yousef <qais.yousef@imgtec.com>
Cc: Jonas Gorski <jogo@openwrt.org>
Cc: John Crispin <blogic@openwrt.org>
Cc: David Daney <ddaney.cavm@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7804/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:44:52 +01:00
Andrew Bresticker
f64e55dcbf MIPS: Set vint handler when mapping CPU interrupts
When mapping an interrupt in the CPU IRQ domain, set the vint handler
for that interrupt if the CPU uses vectored interrupt handling.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-by: Qais Yousef <qais.yousef@imgtec.com>
Tested-by: Qais Yousef <qais.yousef@imgtec.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Bresticker <abrestic@chromium.org>
Cc: Jeffrey Deans <jeffrey.deans@imgtec.com>
Cc: Markos Chandras <markos.chandras@imgtec.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Qais Yousef <qais.yousef@imgtec.com>
Cc: Jonas Gorski <jogo@openwrt.org>
Cc: John Crispin <blogic@openwrt.org>
Cc: David Daney <ddaney.cavm@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7802/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:44:52 +01:00
Andrew Bresticker
85f7cdacbb MIPS: Provide a generic plat_irq_dispatch
For platforms which boot with device-tree or have correctly chained
all external interrupt controllers, a generic plat_irq_dispatch() can
be used.  Implement a plat_irq_dispatch() which simply handles all the
pending interrupts as reported by C0_Cause.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-by: Qais Yousef <qais.yousef@imgtec.com>
Tested-by: Qais Yousef <qais.yousef@imgtec.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Bresticker <abrestic@chromium.org>
Cc: Jeffrey Deans <jeffrey.deans@imgtec.com>
Cc: Markos Chandras <markos.chandras@imgtec.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Qais Yousef <qais.yousef@imgtec.com>
Cc: Jonas Gorski <jogo@openwrt.org>
Cc: John Crispin <blogic@openwrt.org>
Cc: David Daney <ddaney.cavm@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7801/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:44:52 +01:00
Andrew Bresticker
afe8dc2547 MIPS: Rename mips_cpu_intc_init() -> mips_cpu_irq_of_init()
mips_cpu_intc_init() is used for DT-based initialization of the CPU
IRQ domain.  Give it a more appropriate name.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-by: Qais Yousef <qais.yousef@imgtec.com>
Tested-by: Qais Yousef <qais.yousef@imgtec.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Bresticker <abrestic@chromium.org>
Cc: Jeffrey Deans <jeffrey.deans@imgtec.com>
Cc: Markos Chandras <markos.chandras@imgtec.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Qais Yousef <qais.yousef@imgtec.com>
Cc: Jonas Gorski <jogo@openwrt.org>
Cc: John Crispin <blogic@openwrt.org>
Cc: David Daney <ddaney.cavm@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7800/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:44:52 +01:00
Andrew Bresticker
0f84c30535 MIPS: Always use IRQ domains for CPU IRQs
Use an IRQ domain for the 8 CPU IRQs in both the DT and non-DT cases.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-by: Qais Yousef <qais.yousef@imgtec.com>
Tested-by: Qais Yousef <qais.yousef@imgtec.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Bresticker <abrestic@chromium.org>
Cc: Jeffrey Deans <jeffrey.deans@imgtec.com>
Cc: Markos Chandras <markos.chandras@imgtec.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Qais Yousef <qais.yousef@imgtec.com>
Cc: Jonas Gorski <jogo@openwrt.org>
Cc: John Crispin <blogic@openwrt.org>
Cc: David Daney <ddaney.cavm@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7799/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:44:51 +01:00
Markos Chandras
97f4ad29da MIPS: cpu: Add 'noftlb' kernel command line option to disable the FTLB
Add new 'noftlb' kernel command line option to disable the FTLB.
Since the kernel command line is not available when probing and
enabling the CPU features in cpu_probe(), we let the kernel configure
the FTLB during the config4 decode operation and we disable the FTLB later
on, once the command line has become available to us. This should have
no negative effects since FTLB isn't used so early in the boot process.
FTLB increases the effective TLB size leading to less TLB misses. However,
sometimes it's useful to be able to disable it when debugging memory related
core features or other hardware components.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/7586/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:44:51 +01:00
Joe Perches
7178d2cdd9 mips: Convert pr_warning to pr_warn
Use the much more common pr_warn instead of pr_warning
with the goal of removing pr_warning eventually.

Other miscellanea:

o Coalesce formats
o Realign arguments

Signed-off-by: Joe Perches <joe@perches.com>
Cc: linux-mips <linux-mips@linux-mips.org>
Cc: LKML <linux-kernel@vger.kernel.org>
Patchwork: https://patchwork.linux-mips.org/patch/7935/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:44:51 +01:00
Sergey Ryazanov
e5067c718b MIPS: pci-rt3883: Remove odd locking in PCI config space access code
Caller (generic PCI code) already do proper locking so no need to add
another one here. Local PCI read/write functions are never called
simultaneously, also they do not require synchronization with the PCI
controller ops, since they are used before the controller registration.

Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
Cc: Linux MIPS <linux-mips@linux-mips.org>
Cc: Gabor Juhos <juhosg@openwrt.org>
Patchwork: https://patchwork.linux-mips.org/patch/7603/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:44:50 +01:00
Sergey Ryazanov
490a0ece6c MIPS: pci-ar7{1x, 24}x: remove odd locking in PCI config space access code
Caller (generic PCI code) already do proper locking so no need to add
another one here.

Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
Cc: Linux MIPS <linux-mips@linux-mips.org>
Cc: Gabor Juhos <juhosg@openwrt.org>
Patchwork: https://patchwork.linux-mips.org/patch/7602/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:44:50 +01:00
Sergey Ryazanov
c4a305374b MIPS: MSP71xx: remove odd locking in PCI config space access code
Caller (generic PCI code) already do proper locking so no need to add
another one here.

Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
Cc: Linux MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/7601/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:44:50 +01:00
Sergey Ryazanov
6ff9c2fcfa MIPS: NILE4: Remove odd locking in PCI config space access code
Caller (generic PCI code) already do proper locking so no need to add
another one here.

Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
Cc: Linux MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/7600/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:44:49 +01:00
Eunbong Song
856839b768 MIPS: Add arch_trigger_all_cpu_backtrace() function
Currently, arch_trigger_all_cpu_backtrace() is defined in only x86 and
sparc which have an NMI.  But in case of softlockup, it could be possible
to dump backtrace of all cpus. and this could be helpful for debugging.

for example, if system has 2 cpus.

	CPU 0				CPU 1
 acquire read_lock()

				try to do write_lock()

 ,,,
 missing read_unlock()

In this case, softlockup will occur becasuse CPU 0 does not call
read_unlock().  And dump_stack() print only backtrace for "CPU 0". If
CPU1's backtrace is printed it's very helpful.

[ralf@linux-mips.org: Fixed whitespace and formatting issues.]

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8200/
2014-11-24 07:44:49 +01:00
Ralf Baechle
635c990706 MIPS: Remove useless parentheses
Based on the spatch

@@
expression e;
@@
- return (e);
+ return e;

with heavy hand editing because some of the changes are either whitespace
or identation only or result in excessivly long lines.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:44:49 +01:00
Steven J. Hill
b4da18b371 MIPS: Fix address type used for early memory detection.
In 'early_parse_mem' the data type used for the start
and size of a memory region specified on the command line
is incorrect. If 64-bit addressing is used, the value
gets truncated.

Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8456/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:44:07 +01:00
Markos Chandras
9e2b53725a MIPS: Kconfig: Don't allow both microMIPS and SmartMIPS to be selected.
microMIPS and SmartMIPS can't be used together. This fixes the
following build problem:

Warning: the 32-bit microMIPS architecture does not support the `smartmips' extension
arch/mips/kernel/entry.S:90: Error: unrecognized opcode `mtlhx $24'
[...]
arch/mips/kernel/entry.S:109: Error: unrecognized opcode `mtlhx $24'

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7421/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:44:07 +01:00
Markos Chandras
76cff82943 MIPS: kernel: cps-vec: Set ISA level to mips32r2 for the MIPS MT ASE
Fixes the following build warnings:
arch/mips/kernel/cps-vec.S: Assembler messages:
arch/mips/kernel/cps-vec.S:228: Warning: the `mt' extension requires
MIPS32 revision 2 or greater
[...]
arch/mips/kernel/cps-vec.S: Assembler messages:
arch/mips/kernel/cps-vec.S:345: Warning: the `mt' extension requires
MIPS32 revision 2 or greater

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: Paul Burton <Paul.Burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7355/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:44:06 +01:00
Florian Fainelli
3964917c6b MIPS: Netlogic: handle modular AHCI builds
Commits a951440971 ("MIPS: Netlogic: Support for XLP3XX on-chip SATA")
and fedfcb1137 ("MIPS: Netlogic: XLP9XX on-chip SATA support") added
ahci-init and ahci-init-xlp2 as objects to build when CONFIG_SATA_AHCI
is enabled.

If CONFIG_SATA_AHCI is made modular, these two files will also get built
as modules (obj-m), which will result in the following linking failure:

ERROR: "nlm_set_pic_extra_ack" [arch/mips/netlogic/xlp/ahci-init.ko]
undefined!
ERROR: "nlm_io_base" [arch/mips/netlogic/xlp/ahci-init.ko] undefined!
ERROR: "nlm_nodes" [arch/mips/netlogic/xlp/ahci-init-xlp2.ko] undefined!
ERROR: "nlm_set_pic_extra_ack"
[arch/mips/netlogic/xlp/ahci-init-xlp2.ko] undefined!
ERROR: "xlp_socdev_to_node" [arch/mips/netlogic/xlp/ahci-init-xlp2.ko]
undefined!
ERROR: "nlm_io_base" [arch/mips/netlogic/xlp/ahci-init-xlp2.ko]
undefined!

Just check whether CONFIG_SATA_AHCI is defined for this build, and if
that is the case, add these objects to the list of built-in object
files.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: ganesanr@broadcom.com
Cc: jchandra@broadcom.com
Patchwork: https://patchwork.linux-mips.org/patch/7855/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:44:06 +01:00
Florian Fainelli
717ce64639 MIPS: Netlogic: handle modular USB case
Commit 1004165f34 ("MIPS: Netlogic: USB support for XLP") and then
commit 9eac3591e7 ("MIPS: Netlogic: Add support for USB on XLP2xx")
added usb-init and usb-init-xlp2 as objects to build when CONFIG_USB is
enabled.

If CONFIG_USB is made modular, these two files will also get built as
modules (obj-m), which will result in the following linking failure:

ERROR: "nlm_io_base" [arch/mips/netlogic/xlp/usb-init.ko] undefined!
ERROR: "nlm_nodes" [arch/mips/netlogic/xlp/usb-init-xlp2.ko] undefined!
ERROR: "nlm_set_pic_extra_ack" [arch/mips/netlogic/xlp/usb-init-xlp2.ko]
undefined!
ERROR: "xlp_socdev_to_node" [arch/mips/netlogic/xlp/usb-init-xlp2.ko]
undefined!
ERROR: "nlm_io_base" [arch/mips/netlogic/xlp/usb-init-xlp2.ko]
undefined!

Just check whether CONFIG_USB is defined for this build, and if that is
the case, add these objects to the list of built-in object files.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: ganesanr@broadcom.com
Cc: jchandra@broadcom.com
Patchwork: https://patchwork.linux-mips.org/patch/7854/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:44:06 +01:00
Aaro Koskinen
26927f7649 MIPS: Loongson: Make platform serial setup always built-in.
If SERIAL_8250 is compiled as a module, the platform specific setup
for Loongson will be a module too, and it will not work very well.
At least on Loongson 3 it will trigger a build failure,
since loongson_sysconf is not exported to modules.

Fix by making the platform specific serial code always built-in.

Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Reported-by: Ralf Baechle <ralf@linux-mips.org>
Cc: stable@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: Huacai Chen <chenhc@lemote.com>
Cc: Markos Chandras <Markos.Chandras@imgtec.com>
Patchwork: https://patchwork.linux-mips.org/patch/8533/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:44:06 +01:00
Paul Burton
14fa12df1d MIPS: fix EVA & non-SMP non-FPU FP context signal handling
The save_fp_context & restore_fp_context pointers were being assigned
to the wrong variables if either:

  - The kernel is configured for UP & runs on a system without an FPU,
    since b2ead52828 "MIPS: Move & rename
    fpu_emulator_{save,restore}_context".

  - The kernel is configured for EVA, since ca750649e0 "MIPS: kernel:
    signal: Prevent save/restore FPU context in user memory".

This would lead to FP context being clobbered incorrectly when setting
up a sigcontext, then the garbage values being saved uselessly when
returning from the signal.

Fix by swapping the pointer assignments appropriately.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: stable@vger.kernel.org # v3.15+
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8230/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:44:06 +01:00
Markos Chandras
cf0a8aa022 MIPS: cpu-probe: Set the FTLB probability bit on supported cores
Make use of the Config6/FLTBP bit to set the probability of a TLBWR
instruction to hit the FTLB or the VTLB. A value of 0 (which may be
the default value on certain cores, such as proAptiv or P5600)
means that a TLBWR instruction will never hit the VTLB which
leads to performance limitations since it effectively decreases
the number of available TLB slots.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Cc: <stable@vger.kernel.org> # v3.15+
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8368/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:44:05 +01:00
Kevin Cernekee
4ec8f9e9b0 MIPS: BMIPS: Fix ".previous without corresponding .section" warnings
Commit 078a55fc82 ("Delete __cpuinit/__CPUINIT usage from MIPS code")
removed our __CPUINIT directives, so now the ".previous" directives
are superfluous.  Remove them.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Cc: f.fainelli@gmail.com
Cc: mbizon@freebox.fr
Cc: jogo@openwrt.org
Cc: jfraser@broadcom.com
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8156/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:44:05 +01:00
Ralf Baechle
14aa136161 MIPS: uaccess.h: Fix strnlen_user comment.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:44:05 +01:00
Markos Chandras
83fd43449b MIPS: r4kcache: Add EVA case for protected_writeback_dcache_line
Commit de8974e3f7 ("MIPS: asm: r4kcache: Add EVA cache flushing
functions") added cache function for EVA using the cachee instruction.
However, it didn't add a case for the protected_writeback_dcache_line.
mips_dsemul() calls r4k_flush_cache_sigtramp() which in turn uses
the protected_writeback_dcache_line() to flush the trampoline code
back to memory. This used the wrong "cache" instruction leading to
random userland crashes on non-FPU cores.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: <stable@vger.kernel.org> # v3.15+
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8331/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:44:04 +01:00
Rafał Miłecki
7f0dd7683c MIPS: Fix info about plat_setup in arch_mem_init comment
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7607/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:44:04 +01:00
Masanari Iida
3dc4bf310a MIPS: rtlx: Remove KERN_DEBUG from pr_debug() arguments in rtlx.c
Signed-off-by: Masanari Iida <standby24x7@gmail.com>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7938/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:44:04 +01:00
Ralf Baechle
a54b8b0800 MIPS: SEAD3: Fix LED device registration.
This isn't a module and shouldn't be one.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Cc: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8202/
2014-11-24 07:44:03 +01:00
Huacai Chen
b61a393945 MIPS: Fix a copy & paste error in unistd.h
Commit 5df4c8dbbc (MIPS: Wire up bpf syscall.) break the N32 build
because of a copy & paste error.

Signed-off-by: Huacai Chen <chenhc@lemote.com>
Cc: John Crispin <john@phrozen.org>
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/8390/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:44:03 +01:00
Emmanuel Grumbach
dcad8e4299 iwlwifi: update the secure mem space and for the CPUs
Also update the timeout for the data verification.

Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
2014-11-24 08:30:44 +02:00
Oren Givon
3c4e2998a4 iwlwifi: sdio: new SDIO card id for 4165 series
Add a new SDIO card id intended for the new 4165 series.

Signed-off-by: Oren Givon <oren.givon@intel.com>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
2014-11-24 08:30:44 +02:00
Eliad Peller
47abce8f2d iwlwifi: declare d0i3 support for IWL_DEVICE_8000
Signed-off-by: Eliad Peller <eliadx.peller@intel.com>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
2014-11-24 08:30:43 +02:00
Arik Nemtsov
e198f5e76f iwlwifi: mvm: disconnect TDLS peers before channel switch
In case of channel switch, we need to teardown the TDLS peers.

Signed-off-by: Arik Nemtsov <arikx.nemtsov@intel.com>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
2014-11-24 08:30:42 +02:00
Eyal Shapira
339b30864e iwlwifi: mvm: declare support for VHT BF info in radiotap
The driver knows whether an rx frame was beamformed and marks
it in the radiotap VHT flags. However it should also declare
that it knows to extract this info otherwise this gets discarded
by sniffers like Wireshark.

Signed-off-by: Eyal Shapira <eyalx.shapira@intel.com>
Reviewed-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
2014-11-24 08:30:41 +02:00
Chaya Rachel Ivgy
30269c125b iwlwifi: mvm: add support to MFUART loading notification
Add support to MFUART loading notification (print notification
data with IWL_DEBUG_INFO)

Signed-off-by: Chaya Rachel Ivgy <chaya.rachel.ivgi@intel.com>
Reviewed-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
2014-11-24 08:30:41 +02:00
Eliad Peller
465921c841 iwlwifi: mvm: call iwl_trans_suspend/resume
call the appropriate iwl_trans_suspend/resume ops
on iwl_mvm_suspend/resume calls.

Signed-off-by: Eliad Peller <eliadx.peller@intel.com>
Reviewed-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
2014-11-24 08:30:40 +02:00
Eliad Peller
8e551e503b iwlwifi: trans: add suspend/resume ops
Add suspend/resume trans ops that will be called from
mac80211's suspend/resume ops.

Signed-off-by: Eliad Peller <eliadx.peller@intel.com>
Reviewed-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
2014-11-24 08:30:39 +02:00
Luciano Coelho
2021a89d7b iwlwifi: mvm: treat netdetect wake up separately
When the device wakes up due to netdetect, we need to query different
things from the firmware than when it wakes up with a normal WoWLAN.
To make this easier, separate the netdetect wake up handling from the
rest.  For now, we don't send netdetect as a wake up reason, treating
it as a non-wireless wake up.

Signed-off-by: Luciano Coelho <luciano.coelho@intel.com>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
2014-11-24 08:30:38 +02:00
Luciano Coelho
ec12f457d6 iwlwifi: mvm: refactor iwl_mvm_query_wakeup_reasons()
Refactor the iwl_mvm_query_wakeup_reasons() function to split the part
that gets the firmware status from the part that sets up the WoWLAN
status.  This will allow netdetect to reuse the code.

Signed-off-by: Luciano Coelho <luciano.coelho@intel.com>
Reviewed-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
2014-11-24 08:30:38 +02:00
Luciano Coelho
3acc952b03 iwlwifi: mvm: refactor wowlan and netdetect configuration when suspending
We need to send a WOWLAN_CONFIGURATION command also for netdetect and
configure the rfkill release trigger if needed.  To do so, refactor
the code that configures wowlan and netdetect when suspending and send
the WOWLAN_CONFIGURATION command also for net_detect.

Signed-off-by: Luciano Coelho <luciano.coelho@intel.com>
Reviewed-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
2014-11-24 08:30:37 +02:00
Luciano Coelho
c55385f55c iwlwifi: mvm: add support for net detect
Add the net detect WoWLAN flag to indicate support and use the
nd_config from the WoWLAN configuration to start net detect, if it is
set.  The WoWLAN configuration takes precedence over the debugfs
configuration.

Signed-off-by: Luciano Coelho <luciano.coelho@intel.com>
Reviewed-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
2014-11-24 08:30:36 +02:00
Luciano Coelho
686e7fe1c4 iwlwifi: mvm: protect session during CSA
When another vif is also running during a channel switch, we need to
use a session protection when we move to the new channel, so that we
don't miss the beacons.  Without this, sometimes the other vif
repeatedly gets time exactly when we should be hearing the beacons,
preventing channel switch from completing.  Adding a session
protection that lasts from the moment the channel changes until 2
TBTTs later, ensures that we will hear the beacons on the destination
channel.

Signed-off-by: Luciano Coelho <luciano.coelho@intel.com>
2014-11-24 08:30:35 +02:00
Luciano Coelho
0c6505c6ed iwlwifi: mvm: clear TE data if CSA time event fails to start
If setting the CSA time event fails, we must clear the TE data,
otherwise we'll try to remove it when, for instance, a disconnection
occurs, causing a SYSASSERT.

Signed-off-by: Luciano Coelho <luciano.coelho@intel.com>
2014-11-24 08:30:35 +02:00
Luciano Coelho
c6e0a3e044 iwlwifi: mvm: disable beacon filtering during CSA
After a channel switch, transmission on the new channel is only
started once we see a beacon on it.  Thus, beacon filtering needs to
be disabled during channel switch so that mac80211 receives this
beacon and finishes the process.

Signed-off-by: Luciano Coelho <luciano.coelho@intel.com>
2014-11-24 08:30:34 +02:00
Luciano Coelho
622e3f9b71 iwlwifi: mvm: add a channel_switch op to bypass mac80211 timer
We need to call ieee80211_chswitch_done() ourselves just when the
absence TE started, so we perform the actual context switch early
enough.  To do so, add a dummy channel_switch op, which will cause
mac80211 to skip the countdown timer and allow us to call
ieee80211_chswitch_done() to complete the operation.

Signed-off-by: Luciano Coelho <luciano.coelho@intel.com>
2014-11-24 08:30:33 +02:00
Luciano Coelho
a57c688d34 iwlwifi: mvm: finalize on post_switch instead of unassign
Now that mac80211 waits for the first beacon on the new channel before
calling post_channel_switch, the reconfiguration of the firmware
should be done in the post_channel_switch operation instead of when
assigning the vif to the new context.

Signed-off-by: Luciano Coelho <luciano.coelho@intel.com>
2014-11-24 08:30:32 +02:00