Instead of pinning per-cpu TLB into a DTR, use DTC. This will free up
one TLB entry for application, or even kernel if access pattern to
per-cpu data area has high temporal locality.
Since per-cpu is mapped at the top of region 7 address, we just need to
add special case in alt_dtlb_miss. The physical address of per-cpu data
is already conveniently stored in IA64_KR(PER_CPU_DATA). Latency for
alt_dtlb_miss is not affected as we can hide all the latency. It was
measured that alt_dtlb_miss handler has 23 cycles latency before and
after the patch.
The performance effect is massive for applications that put lots of tlb
pressure on CPU. Workload environment like database online transaction
processing or application uses tera-byte of memory would benefit the most.
Measurement with industry standard database benchmark shown an upward
of 1.6% gain. While smaller workloads like cpu, java also showing small
improvement.
Signed-off-by: Ken Chen <kenneth.w.chen@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
It's not efficient to use a per-cpu variable just to store
how many physical stack register a cpu has. Ever since the
incarnation of ia64 up till upcoming Montecito processor, that
variable has "glued" to 96. Having a variable in memory means
that the kernel is burning an extra cacheline access on every
syscall and kernel exit path. Such "static" value is better
served with the instruction patching utility exists today.
Convert ia64_phys_stacked_size_p8 into dynamic insn patching.
This also has a pleasant side effect of eliminating access to
per-cpu area while psr.ic=0 in the kernel exit path. (fixable
for per-cpu DTC work, but why bother?)
There are some concerns with the default value that the instruc-
tion encoded in the kernel image. It shouldn't be concerned.
The reasons are:
(1) cpu_init() is called at CPU initialization. In there, we
find out physical stack register size from PAL and patch
two instructions in kernel exit code. The code in question
can not be executed before the patching is done.
(2) current implementation stores zero in ia64_phys_stacked_size_p8,
and that's what the current kernel exit path loads the value with.
With the new code, it is equivalent that we store reg size 96
in ia64_phys_stacked_size_p8, thus creating a better safety net.
Given (1) above can never fail, having (2) is just a bonus.
All in all, this patch allow one less memory reference in the kernel
exit path, thus reducing syscall and interrupt return latency; and
avoid polluting potential useful data in the CPU cache.
Signed-off-by: Ken Chen <kenneth.w.chen@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
* 'for-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jikos/hid:
USB HID: handle multi-interface devices for Apple macbook pro properly
HID: move away from DEBUG defines in favor of CONFIG_HID_DEBUG
USB HID: fix bogus comment in hid_get_class_descriptor()
USB HID: remove hid_find_field_by_usage()
HID: API - fix leftovers of hidinput API in USB HID
HID: hid debug from hid-debug.h to hid layer
hid: force feedback driver for PantherLord USB/PS2 2in1 Adapter
hid: quirk for multi-input devices with unneeded output reports
hid: allow force feedback for multi-input devices
* 'for-linus' of master.kernel.org:/pub/scm/linux/kernel/git/roland/infiniband:
IB/ehca: Remove obsolete prototypes
IB/ehca: Remove use of do_mmap()
RDMA/addr: Handle ethernet neighbour updates during route resolution
IB: Make sure struct ib_user_mad.data is aligned
IB/srp: Don't wait for response when QP is in error state.
IB: Return qp pointer as part of ib_wc
IB: Include <linux/kref.h> explicitly in <rdma/ib_verbs.h>
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/drzeus/mmc: (32 commits)
mmc: tifm: replace kmap with page_address
mmc: sdhci: fix voltage ocr
mmc: sdhci: replace kmap with page_address
mmc: wbsd: replace kmap with page_address
mmc: handle pci_enable_device() return value in sdhci
mmc: Proper unclaim in mmc_block
mmc: change wbsd mailing list
mmc: Graceful fallback for fancy features
mmc: Handle wbsd's stupid command list
mmc: Allow host drivers to specify max block count
mmc: Allow host drivers to specify a max block size
tifm_sd: add suspend and resume functionality
tifm_core: add suspend/resume infrastructure for tifm devices
tifm_7xx1: prettify
tifm_7xx1: recognize device 0xac8f as supported
tifm_7xx1: switch from workqueue to kthread
tifm_7xx1: Merge media insert and media remove functions
tifm_7xx1: simplify eject function
Add dummy_signal_irq function to save check in ISR
Remove unused return value from signal_irq callback
...
Fix the key serial number collision avoidance code in key_alloc_serial().
This didn't use to be so much of a problem as the key serial numbers were
allocated from a simple incremental counter, and it would have to go through
two billion keys before it could possibly encounter a collision. However, now
that random numbers are used instead, collisions are much more likely.
This is fixed by finding a hole in the rbtree where the next unused serial
number ought to be and using that by going almost back to the top of the
insertion routine and redoing the insertion with the new serial number rather
than trying to be clever and attempting to work out the insertion point
pointer directly.
This fixes kernel BZ #7727.
Signed-off-by: David Howells <dhowells@redhat.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* git://git.kernel.org/pub/scm/linux/kernel/git/sfrench/cifs-2.6:
[CIFS] Minor cleanup
[CIFS] Missing free in error path
[CIFS] Reduce cifs stack space usage
[CIFS] lseek polling returned stale EOF
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (40 commits)
[MIPS] Yosemite: Fix missing parens in SERIAL_READ_1 macro
[MIPS] Fix warnings in run_uncached on 32bit kernel
[MIPS] Comment fix
[MIPS] MT: Nuke duplicate mips_mt_regdump() prototype.
[MIPS] Alchemy: Fix PCI-memory access
[MIPS] Move .set reorder out of conditional code
[MIPS] Check FCSR for pending interrupts before restoring from a context.
[MIPS] Jaguar ATX: Fix large number of warnings.
[MIPS] Jaguar: Fix MAC address detection after platform_device conversion.
[MIPS] SMTC: Make a bunch of functions and variables static.
[MIPS] Use compat_sys_pselect6
[MIPS] SMTC: Cleanup idle hook invocation.
[MIPS] SELinux: Add security hooks to mips-mt {get,set}affinity
[MIPS] IRIX: Linux coding style cleanups.
[MIPS] PB1100: Fix pile of warnings
[MIPS] Alchemy: Fix bunch of warnings
[MIPS] Whitespace cleanups.
[MIPS] Alchemy: Fix bunch more warnings.
[MIPS] Use ARRAY_SIZE macro when appropriate
[MIPS] Fix some whitespace damage
...
Tildes as in path as in filenames are handled correctly now:
only files, containing tilde '~', are backups, thus are not valid.
[KJ]:
Definition of `space' was removed, scripts/Kbuild.include has one.
That definition was taken right from the GNU make manual, while Kbuild's
version is original.
Cc: Roman Zippel <zippel@linux-m68k.org>
Cc: Bastian Blank <bastian@waldi.eu.org>
Cc: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Oleg Verych <olecom@flower.upol.cz>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This patch adds the definitions used by pfkeyv2 interface for Camellia
cipher algorithm.
Signed-off-by: Noriaki TAKAMIYA <takamiya@po.ntts.co.jp>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Now that all cipher/compression users have switched over to the new
allocation scheme, we can get rid of the compatility defines and use
proper structs for them.
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This patch adds support for multiple frontend types for each backend
algorithm by passing the type and mask through to the backend type
init function.
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
The crypto_comp conversion missed the last remaining crypto_alloc_tfm
call. This patch replaces it with crypto_alloc_comp.
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This patch adds tests for SHA384 HMAC and SHA512 HMAC to the tcrypt module. Test data was taken from
RFC4231. This patch is a follow-up to the discovery (bug 7646) that the kernel SHA384 HMAC
implementation was not generating proper SHA384 HMACs.
Signed-off-by: Andrew Donofrio <linuxbugzilla@kriptik.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Using blkcipher/hash crypto operations in hard IRQ context can lead
to random memory corruption due to the reuse of kmap_atomic slots.
Since crypto operations were never meant to be used in hard IRQ
contexts, this patch checks for such usage and returns an error
before kmap_atomic is performed.
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
arch/mips/lib/uncached.c: In function 'run_uncached':
arch/mips/lib/uncached.c:47: warning: comparison is always true due to limited range of data type
arch/mips/lib/uncached.c:48: warning: comparison is always false due to limited range of data type
arch/mips/lib/uncached.c:57: warning: comparison is always true due to limited range of data type
arch/mips/lib/uncached.c:58: warning: comparison is always false due to limited range of data type
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The problem was introduced in 2.6.18.3 with the casting of some
36bit-defines (PCI memory) in au1000.h to resource_size_t which may be
u32 or u64 depending on the experimental CONFIG_RESOURCES_64BIT.
With unset CONFIG_RESOURCES_64BIT, the pci-memory cannot be accessed
because the ioremap in arch/mips/au1000/common/pci.c already used the
truncated addresses.
With set CONFIG_RESOURCES_64BIT, things get even worse, because PCI-scan
aborts, due to resource conflict: request_resource() in arch/mips/pci/pci.c
fails because the maximum iomem-address is 0xffffffff (32bit) but the
pci-memory-start-address is 0x440000000 (36bit).
To get pci working again, I propose the following patch:
1. remove the resource_size_t-casting from au1000.h again
2. make the casting in arch/mips/au1000/common/pci.c (it's allowed and
necessary here. The 36bit-handling will be done in __fixup_bigphys_addr).
With this patch pci works again like in 2.6.18.2, the gcc-compile warnings
in pci.c are gone and it doesn't depend on CONFIG_EXPERIMENTAL.
Signed-off-by: Alexander Bigga <ab@mycable.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The N32 and O32 pselect6 syscalls need to use compat_sys_pselect6 to
translate arguments from 32-bit to 64-bit layout.
Signed-off-by: Joseph Myers <joseph@codesourcery.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This patch adds LSM hooks into the setaffinity and getaffinity functions
for the mips architecture to enable security modules to control these
operations between tasks with different security attributes. This
implementation uses the existing task_setscheduler and task_getscheduler
LSM hooks.
Signed-Off-By: David Quigley <dpquigl@tycho.nsa.gov>
Acked-by: Stephen Smalley <sds@tycho.nsa.gov>
Signed-off-by: James Morris <jmorris@namei.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
CC arch/mips/au1000/pb1100/board_setup.o
arch/mips/au1000/pb1100/board_setup.c: In function ‘board_setup’:
arch/mips/au1000/pb1100/board_setup.c:104: warning: passing argument 1 of ‘readb’ makes pointer from integer without a cast
arch/mips/au1000/pb1100/board_setup.c:105: warning: passing argument 1 of ‘readb’ makes pointer from integer without a cast
arch/mips/au1000/pb1100/board_setup.c:105: warning: passing argument 2 of ‘writeb’ makes pointer from integer without a cast
arch/mips/au1000/pb1100/board_setup.c:109: warning: passing argument 1 of ‘readb’ makes pointer from integer without a cast
arch/mips/au1000/pb1100/board_setup.c:110: warning: passing argument 1 of ‘readb’ makes pointer from integer without a cast
arch/mips/au1000/pb1100/board_setup.c:110: warning: passing argument 2 of ‘writeb’ makes pointer from integer without a cast
arch/mips/au1000/pb1100/board_setup.c:51: warning: unused variable ‘sys_clksrc’
arch/mips/au1000/pb1100/board_setup.c:51: warning: unused variable ‘sys_freqctrl’
arch/mips/au1000/pb1100/board_setup.c:50: warning: unused variable ‘pin_func’
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
CC arch/mips/au1000/common/pci.o
arch/mips/au1000/common/pci.c:42: warning: large integer implicitly truncated to unsigned type
arch/mips/au1000/common/pci.c:43: warning: large integer implicitly truncated to unsigned type
arch/mips/au1000/common/pci.c:49: warning: large integer implicitly truncated to unsigned type
arch/mips/au1000/common/pci.c:50: warning: large integer implicitly truncated to unsigned type
arch/mips/au1000/common/pci.c: In function ‘au1x_pci_setup’:
arch/mips/au1000/common/pci.c:82: warning: ISO C90 forbids mixed declarations and code
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
