This patch adds usb otg/host controllers and phys nodes on rk322x.
Signed-off-by: William Wu <william.wu@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This augments the Moxa Art and Aspeed device trees to:
- Explicitly name the clock "PCLK" as the Faraday FTTMR010
names it.
- List the Moxa timer as compatible with the Faradat FTTMR010
vanilla version.
- Add a comment that the Aspeed driver is a Faraday
FTTMR010 derivative.
- Pass all IRQs to the timer from Aspeed: they are all there
so they should be in the device tree, we only use the
first one anyways.
Tested-by: Joel Stanley <joel@jms.id.au>
Tested-by: Jonas Jensen <jonas.jensen@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
This is a first set of Gemini DTS patches for the v4.13 cycle.
This adds the reset and clock lines to the Gemini core DTS SoC.
These bindings have been ACKed by the DT maintainer Rob.
The reset driver is going to be merged by the reset maintainer.
The clock driver is going to be merged by the clock maintainers.
Each of these have their macro defines coming with them, split
off as separate patches.
A post-rc1 patch will be sumbitted for switching the numerical
values to the defined macros in line with the ARM SoC DT header
merge strategy.
* tag 'gemini-v4.13-dts-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: dts: Add clocks to the Gemini SoC
ARM: dts: Add the Gemini reset controller
dt-bindings: Augment Gemini for clocks, resets
Signed-off-by: Olof Johansson <olof@lixom.net>
Renesas ARM Based SoC DT Updates for v4.13
* Switch to panel-lvds bindings for Mitsubishi panels
* Clean up PFC node names
* Enable UHS-I SDR-50 and SDR-104 on r8a7793/Gose
* Add GyroADC clock and device for r8a7791 SoC
* Add USB clocks to device tree for r7s72100 SoC
* tag 'renesas-dt-for-v4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: dts: renesas: Switch to panel-lvds bindings for Mitsubishi panels
ARM: dts: gose: Enable UHS-I SDR-50 and SDR-104
ARM: dts: r8a7793: set maximum frequency for SDHI clocks
ARM: dts: r8a7791: Add GyroADC clock and device node
ARM: dts: r7s72100: add usb clocks to device tree
ARM: dts: sh73a0: update PFC node name to pin-controller
ARM: dts: r8a7793: update PFC node name to pin-controller
ARM: dts: r8a7791: update PFC node name to pin-controller
ARM: dts: r8a7790: update PFC node name to pin-controller
ARM: dts: r8a7779: update PFC node name to pin-controller
ARM: dts: r8a7778: update PFC node name to pin-controller
ARM: dts: r8a7740: update PFC node name to pin-controller
ARM: dts: r8a73a4: update PFC node name to pin-controller
ARM: dts: emev2: update PFC node name to pin-controller
ARM: dts: r7s72100: add USB bit definitions
ARM: dts: r7s72100: add Renesas RZ/A1 pinctrl header
ARM: dts: r8a7791: add GyroADC clock
Signed-off-by: Olof Johansson <olof@lixom.net>
mvebu fixes for 4.12
Fix the interrupt description of the crypto node for device tree of
the Armada 7K/8K SoCs
* tag 'mvebu-fixes-4.12-1' of git://git.infradead.org/linux-mvebu: (316 commits)
arm64: marvell: dts: fix interrupts in 7k/8k crypto nodes
+ Linux 4.12-rc2
Signed-off-by: Olof Johansson <olof@lixom.net>
Fixes for 4.12:
Fix two compilation issues
* tag 'at91-4.12-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux:
ARM: at91: select CONFIG_ARM_CPU_SUSPEND
memory: atmel-ebi: mark PM ops as __maybe_unused
Signed-off-by: Olof Johansson <olof@lixom.net>
Most of DT files in ARM use #include "..." to make pre-processor
include DT in the same directory, but this is one of the exceptional
files that use #include <...> for that.
Fix it to remove -I$(srctree)/arch/$(SRCARCH)/boot/dts path from
dtc_cpp_flags.
ARM: dts: versatile: use #include "..." to include DT in the same directory
Most of DT files in ARM use #include "..." to make pre-processor
include DT in the same directory, but we have 3 exceptional files
that use #include <...> for that.
They must be fixed to remove -I$(srctree)/arch/$(SRCARCH)/boot/dts
path from dtc_cpp_flags.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
The only adc button connected to adc input is recovery button.
Signed-off-by: Randy Li <ayaka@soulik.info>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Right now mach-imx6ul registers a fixup for the ksz8081 phy. The same
register values can be set through the micrel phy driver by using dts
properties.
This seems preferable and allows cleanly fixing suspend/resume.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Make the module autoloadable by tying it to the CPU feature bits that
describe whether the optional instructions it relies on are implemented
by the current CPU.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Make the module autoloadable by tying it to the CPU feature bit that
describes whether the optional instructions it relies on are implemented
by the current CPU.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Make the module autoloadable by tying it to the CPU feature bit that
describes whether the optional instructions it relies on are implemented
by the current CPU.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Make the module autoloadable by tying it to the CPU feature bit that
describes whether the optional instructions it relies on are implemented
by the current CPU.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Make the module autoloadable by tying it to the CPU feature bit that
describes whether the optional instructions it relies on are implemented
by the current CPU.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
NanoPi M1 Plus is designed and developed by FriendlyElec
for professionals, enterprise users, makers and hobbyists
using the Allwinner H3 SOC.
NanoPi M1 Plus key features
- Allwinner H3, Quad-core Cortex-A7@1.2GHz
- 1GB DDR3 RAM
- 8GB eMMC
- microSD slot
- 10/100/1000M Ethernet
- Serial Debug Port
- 5V 2A DC power-supply
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
While trying a fix a build warning unrelated to s3c64xx, I ran into
a circular dependency:
drivers/i2c/Kconfig:7: symbol I2C is selected by FB_DDC
drivers/video/fbdev/Kconfig:63: symbol FB_DDC is selected by FB_CYBER2000_DDC
drivers/video/fbdev/Kconfig:381: symbol FB_CYBER2000_DDC depends on FB_CYBER2000
drivers/video/fbdev/Kconfig:369: symbol FB_CYBER2000 depends on FB
drivers/video/fbdev/Kconfig:5: symbol FB is selected by DRM_KMS_FB_HELPER
drivers/gpu/drm/Kconfig:72: symbol DRM_KMS_FB_HELPER is selected by DRM_KMS_CMA_HELPER
drivers/gpu/drm/Kconfig:137: symbol DRM_KMS_CMA_HELPER is selected by DRM_PL111
drivers/gpu/drm/pl111/Kconfig:1: symbol DRM_PL111 depends on ARM_AMBA
drivers/amba/Kconfig:1: symbol ARM_AMBA is selected by S3C64XX_PL080
arch/arm/mach-s3c64xx/Kconfig:42: symbol S3C64XX_PL080 default value contains DMADEVICES
drivers/dma/Kconfig:5: symbol DMADEVICES is selected by SND_SOC_SH4_SIU
sound/soc/sh/Kconfig:29: symbol SND_SOC_SH4_SIU is selected by SND_SIU_MIGOR
sound/soc/sh/Kconfig:59: symbol SND_SIU_MIGOR depends on I2C
The I2C and FB dependencies are hard to untangle, but I notice that
S3C64XX_PL080 selecting ARM_AMBA is one piece of the puzzle that
can easily be avoided, as ARCH_S3C64XX already select ARM_AMBA.
Removing the redundant 'select' now can help us in the future if we
run into a variation of the same dependency.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Add the needed clock nodes for the CLKOUT2 to be usable by boards.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Use the new EBI/NAND bindings to declare NAND chips and remove old NAND
nodes along the way.
Note that we keep using old bindings in at91rm9200.dtsi because this
SoC is not supported by the EBI driver.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Tested-by: Peter Rosin <peda@axentia.se>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
According to the binding documentation and the source code the atmel-gpio
controller takes IRQ_TYPE_* as its flags values, not GPIO_ACTIVE_*.
This patch uses the right variable type which yields the same result
when compiled. Note that this might be wrong and actually
IRQ_TYPE_LEVEL_LOW is intended by the dt author.
Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
David Mosberger reports random segfaults and other problems when running
his buildroot userspace. It turns out that his kernel did not have
support for Thumb userspace, nor did his application, but glibc made use
of Thumb instructions in glibc.
The kernel Thumb support option already recommends being enabled, and
is also so biased, but clearly this is not enough of a recommendation.
So, hide this behind CONFIG_EXPERT as well, and include a note to
indicate the potential issues if it's turned off and userspace Thumb
mode is made use of.
Reported-by: David Mosberger <davidm@egauge.net>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
The gpio node has 144 gpios. Each gpio is capable of generating
an interrupt. Hence add interrupt-controller property to the gpio
node. With this in place one can use interrupts property in device
tree to request for the gpio interrupts.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
CPPI 4.1 DMA is now supported on AM18xx.
Update the config to use it instead of PIO mode.
Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
This adds CPPI 4.1 DMA controller to USB OTG controller.
Changes since v2:
- Fixed the the property reg-names (had glue register defined)
- Removed few useless property
Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
arch_teardown_dma_ops() being the inverse of arch_setup_dma_ops()
,dma_ops should be cleared in the teardown path. Currently, only the
device's iommu mapping structures are cleared in arch_teardown_dma_ops,
but not the dma_ops. So on the next reprobe, dma_ops left in place is
stale from the first IOMMU setup, but iommu mappings has been disposed
of. This is a problem when the probe of the device is deferred and
recalled with the IOMMU probe deferral.
So for fixing this, slightly refactor by moving the code from
__arm_iommu_detach_device to arm_iommu_detach_device and cleanup
the former. This takes care of resetting the dma_ops in the teardown
path.
Fixes: 09515ef5dd ("of/acpi: Configure dma operations at probe time for platform/amba/pci bus devices")
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
arch_setup_dma_ops() is used in device probe code paths to create an
IOMMU mapping and attach it to the device. The function assumes that the
device is attached to a device-specific IOMMU instance (or at least a
device-specific TLB in a shared IOMMU instance) and thus creates a
separate mapping for every device.
On several systems (Renesas R-Car Gen2 being one of them), that
assumption is not true, and IOMMU mappings must be shared between
multiple devices. In those cases the IOMMU driver knows better than the
generic ARM dma-mapping layer and attaches mapping to devices manually
with arm_iommu_attach_device(), which sets the DMA ops for the device.
The arch_setup_dma_ops() function takes this into account and bails out
immediately if the device already has DMA ops assigned. However, the
corresponding arch_teardown_dma_ops() function, called from driver
unbind code paths (including probe deferral), will tear the mapping down
regardless of who created it. When the device is reprobed
arch_setup_dma_ops() will be called again but won't perform any
operation as the DMA ops will still be set.
We need to reset the DMA ops in arch_teardown_dma_ops() to fix this.
However, we can't do so unconditionally, as then a new mapping would be
created by arch_setup_dma_ops() when the device is reprobed, regardless
of whether the device needs to share a mapping or not. We must thus keep
track of whether arch_setup_dma_ops() created the mapping, and only in
that case tear it down in arch_teardown_dma_ops().
Keep track of that information in the dev_archdata structure. As the
structure is embedded in all instances of struct device let's not grow
it, but turn the existing dma_coherent bool field into a bitfield that
can be used for other purposes.
Fixes: 09515ef5dd ("of/acpi: Configure dma operations at probe time for platform/amba/pci bus devices")
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
The reference to cpu_resume requires the corresponding
generic code to be enabled when CONFIG_PM is set:
arch/arm/mach-at91/pm.o: In function `sama5d2_pm_init':
pm.c:(.init.text+0x5e8): undefined reference to `cpu_resume'
Fixes: 24a0f5c539 ("ARM: at91: pm: Add sama5d2 backup mode")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Add node for SPI NOR flash on orange-pi-zero board. Disable this node
by default and leave it to users to enable it if their board has
SPI NOR flash chip populated.
SPI NOR flash was optional in the first production batch in Dec 2016.
In later batches flash chip was pre-populated. However there should
be quite a few boards around which do not have flash chip.
Signed-off-by: Sergey Matyukevich <geomatsi@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The USB PHY can use either a GPIO pin or the PMIC's USB power supply
to sense VBUS. Since both options are available on the Cubietruck,
add the missing property for the USB power supply to the USB PHY node.
The device tree provides all usable options. Ultimately, which method
is used is up to the driver implementation.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The ACIN pins of the AXP221 PMIC on the A31 Hummingbird are tied to the
DC jack on the board through a 12V to 5V buck converter.
Enable the ACIN power supply.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The ACIN pins of the AXP209 PMIC on the Cubieboard are tied to the
DC jack on the board.
Enable the ACIN power supply.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The ACIN pins of the AXP209 PMIC on the Bananapi M1 Plus are tied to the
"power input" micro USB connector next to the SATA connector on the board.
Enable the ACIN power supply.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The ACIN pins of the AXP209 PMIC on the Cubieboard 2 are tied to the
DC jack on the board.
Enable the ACIN power supply.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
We want to keep node references in alphabetical order, except for
instances where node must be #included first.
Move the usb_otg node reference so that all references to non-AXP209
device nodes are in alphabetical order.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Two of the Ethernet switches on this board have EEPROMs connected.
Add the eeprom-length property to the device tree, making it possible
to access the EEPROM using ethtool -e.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch extends the L2 cache controller node for the Amlogic Meson8
and Meson8b SoCs with some missing parameters. These are taken from the
Amlogic GPL kernel source.
Signed-off-by: Carlo Caione <carlo@endlessm.com>
[apply the change to Meson8 and Meson8b and updated description]
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Currently only meson6.dtsi and meson8.dtsi inherit the generic
meson.dtsi. However, since the Meson8b platform is basically a slightly
updated version of Meson8 we can safely inherit meson.dtsi. An indicator
for this are the nodes which are identical in meson.dtsi and
meson8b.dtsi (L2, gic, timer, uart_AO, uart_A, uart_B, uart_C).
Additionally this makes the following devices available on Meson8b which
were not avaialble before (however, since all affected drivers support
Meson6, Meson8 and the whole GX series there's no reason to assume that
they are not working):
- i2c_a and i2c_B
- the IR receiver
- SPFIC (SPI flash controller)
- the dwmac ethernet controller
Differences between Meson8 and Meson8b seem to be:
- ARM Cortex-A5 core instead of Cortex-A9 on Meson8
- dwmac on Meson8b supports RGMII
- small pinctrl updates
Inheriting meson.dtsi makes it easier to maintain by removing duplicate
definitions.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The Amlogic Meson SoCs have most of the internal peripherals organized
in busses. Use them to make the dts easier to read and to avoid
duplicated register (bus) offset definitions.
The bus information is taken from the vendor kernel:
#define IO_CBUS_PHY_BASE 0xc1100000 ///2M
#define IO_AOBUS_PHY_BASE 0xc8100000 ///1M
There are more internal busses (such as the abp bus which seems to
contain audio, HDMI and Mali registers), but since we don't have
drivers for them yet these are not added (yet).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
[khilman: minor whitespace fix]
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Looks like nobody bothered to configure USB host for 37xx-evm
when we converted things to device tree, so let's add it. This
is similar to beagleboard configuration with few extra quirks
to configure the port. And as with beagleboard, OHCI won't work
because there is no USB LS/FS PHY. A HS USB hub is needed to use
devices like keyboard and mice.
Acked-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The at24 driver allows to register I2C EEPROM chips using different vendor
and devices, but the I2C subsystem does not take the vendor into account
when matching using the I2C table since it only has device entries.
But when matching using an OF table, both the vendor and device has to be
taken into account so the driver defines only a set of compatible strings
using the "atmel" vendor as a generic fallback for compatible I2C devices.
So add this generic fallback to the device node compatible string to make
the device to match the driver using the OF device ID table.
Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
As long as the kernel cmdline has "earlycon" in it, this allows
seeing debug messages earlier and does not require DEBUG_LL to
be enabled.
Acked-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
As long as the kernel cmdline has "earlycon" in it, this allows
seeing debug messages earlier and does not require DEBUG_LL to
be enabled.
Signed-off-by: Tony Lindgren <tony@atomide.com>
This adds the serial slave device for the WL1835 Bluetooth interface.
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
