This support both sdhc1 and sdhc2 with WP and CD for the marxbot and
devboard mx31moboard baseboards.
sdhc2 is present on both, but is not directly included in the
mx31moboard file because a third baseboard (not supported yet) without
sdhc2 is planned.
Changes since v1: removed pin initialization from init/exit function and
taken different comments into account
Changes since v2: pin initialiation now is done in another patch for all
current mx31moboard pins
Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Changes since v1: all the pins needed for the drivers are claimed in
another patch
Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
As suggested by Sascha, here we setup all the pins that we are using in
the current (and currently reviewed) drivers for mx31moboard system.
changes since v1: changed I2C1 pin names
Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
As suggested by Sascha, I regroup them in a single patch so that the
other patches become more orthogonal.
changes since v1: changed I2C1 pin names
Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This hw-random driver add support to RNGA hardware found
on some i.MX processors.
Signed-off-by: Alan Carvalho de Assis <acassis@gmail.com>
Acked-by: Matt Mackall <mpm@selenic.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Various improvements (includes in alphabetical order, platform devices
declaration order change, ...)
The pins now are claimed in a single function call from a main table for
every board for a better clarity and to adopt the current agreement for
mx31 devices.
Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Adds a defconfig file for the i.MX21 SoC, targeting
the Freescale i.MX21ADS (M9328MX21ADSE) Application
Development System.
Signed-off-by: Ivo Clarysse <ivo.clarysse@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Kconfig enables now HAVE_PWM (this enables in turn the selection of
CONFIG_BACKLIGHT_PWM)
* changes CONFIG_ARCH_MXyy to CONFIG_MACH_MXyy
* fix some register names to match those of the reference manual
* write a stub code so that the PWM can be used to program the
LCD backlight
* convert from #ifdef CONFIG_ARCH_MXxx to cpu_is_mxXX()
* remove unneeded defines and fix 80-column "violations" of checkpatch.pl
Signed-off-by: Holger Schurig <hs4233@mail.mn-solutions.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
[PATCH v6] MXC: mx21ads base support
Base machine support for the Freescale i.MX21ADS
(M9328MX21ADSE) Application Development System.
Signed-off-by: Ivo Clarysse <ivo.clarysse@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
MXC GPIO controller does not support generation of interrupts on both
edges. Emulate this mode in software by reconfiguring the irq trigger
polarity on each interrupt. This follows an example of
drivers/mfd/asic3.c.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
arch-imx is superseeded by the MXC architecture support.
This patch removes arch/arm/mach-imx from the kernel.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
arch-imx is superseeded by the MXC architecture support.
This patch removes arch-imx from the build system.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Currently we depend on hardcoded base addresses for the interrupt
controller. This prevents us from compiling in more than one i.MX
architecture at a time. This patch changes the base address to a
runtime calculated one.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Currently we depend on hardcoded base addresses for the timer.
This prevents us from compiling in more than one i.MX architecture
at a time. This patch changes the base address to a runtime
calculated one.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This allows us to have more mapping functions for more than one
i.MX architecture in the kernel. As this is the earliest board
specific hook we have, also use it to set the cpu type.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
It is no longer present in newer cores. Unfortunately Freescale decided
to put the bit which decides between automotive clock path and consumer
clock path in the automotive clock path direction. With current code we
cannot detect the core revision, so just remove automotive path completely.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This iomux is called iomux-v3 in the tree because it is the third known
incarnation of MXC iomuxers. It is not only found on the MX35 but also
on the MX51 and probably others.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Merge reason: this topic is ready for upstream now. It passed
Oleg's review and Andrew had no further mm/*
objections/observations either.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Add support for S3C6400 SDHCI channels 0 and 1, making
the GPIO code common to both S3C6400 and S3C6410.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add detection support for the S3C6400 SoC which has it's
id register in a different place to the S3C6410.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add power management support to the VIC by registering
each VIC as a system device to get suspend/resume
events going.
Since the VIC registeration is done early, we need to
record the VICs in a static array which is used to add
the system devices later once the initcalls are run. This
means there is now a configuration value for the number
of VICs in the system.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Move the GPIO suspend/resume support inline with the gpiolib support
so that it will work with both the S3C24XX and S3C64XX series.
The s3c_gpio_chip is extended to have a pm callback and a save block
to keep the state of the GPIO over suspend, and the code from the
s3c24xx implementation is added to a new common file.
The suspend process now uses the list of registered chips to go through
saving and restoring each one as appropriate, using the pm callback to
select the appropriate routine depending on the type of control register
present.
This change also means that any additional GPIO added should not require
changes to the PM.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add support for saving the state of the IRQ registers over suspend.
This requires moving the S3C64XX UART registers into <plat/regs-serial.h>
and adding irq-pm.c which saves the state of all the IRQ registers.
The irq-pm.c saves all the IRQ registers, including the IRQ_EINT and
IRQ_EINT_GROUP registers as it was easier than adding three different
files. Also ensuring that all the registers are restored to the same
state as before suspend is considered to be the best thing to do.
Note, we do not suspend the VIC here, this is done by the VIC driver
itself.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add an s3c64xx_sysclass and device for items that currently
want to bind to any s3c64xx processor. The first user of this
will be parts of the s3c64xx suspend support which need to
save device state over suspend/resume.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add the initial support for the S3C64XX based systems to use
suspend-to-RAM to sleep.
Includes basic debugging for use with the SMDK6410 usign the
LEDs on the baseboard.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add a simple debug message on saving the UART state and add a per-arch
pre-restore function to be used by the s3c64xx restore code to ensure
the UARTs control registers do not go through any illegal state changes.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
