Commit Graph

1970 Commits

Author SHA1 Message Date
Konrad Dybcio
0710c3d304 dt-bindings: Batch-update Konrad Dybcio's email
Use my @kernel.org address everywhere.

Signed-off-by: Konrad Dybcio <konradybcio@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240726-topic-konrad_email-v1-3-f94665da2919@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2024-07-29 13:35:47 -06:00
Linus Torvalds
a4f9285520 Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
 "This a large collection of clk driver updates and a handful of new SoC
  clk driver support.

  We have the usual Qualcomm clk drivers, along with clk drivers for the
  Sophgo and T-Head vendors, all to support some new SoCs.

  Nothing in particular stands out to me in the updates. There's the
  interconnect clk driver which exposes clks as interconnects, crossing
  subsystems. There's a bunch of janitorial things that are improving
  drivers in general like kmemdup_array() or fixing error paths. But
  overall the updates look normal to fix the description data which is
  usually the stuff that's wrong and/or untested.

  Core:
   - Skip gate basic type KUnit tests on s390 due to lack of MMIO
     emulation

  New Drivers:
   - AP sub-system clock controller in the T-Head TH1520
   - Sophgo Sophon sg2042 clk driver
   - Qualcomm SM7150 camera, display and video clk drivers
   - Qualcomm QCM2290 GPU clk driver
   - Qualcomm QCS8386/QCS8084 NSS clk driver
   - Qualcomm SM8650 camera and video drivers

  Updates:
   - Add reset support to Airoha EN7581 clk driver
   - Add MODULE_DESCRIPTIONs to various clk drivers
   - Introduce helper logic to expose clock controllers as simple
     interconnect providers
   - Use the interconnect helper above on Qualcomm ipq9574
   - Add CLK_SET_RATE_PARENT to the remaining USB pipe clocks on
     Qualcomm X1Elite
   - Improve error handling in Qualcomm kpss-xcc driver
   - Mark Qualcomm SC8280XP LPASS clock controller regmap_config const
   - Export more clocks for Rockchip rk3128 peripherals
   - Convert Rockchip clk drivers to use kmemdup_array()
   - Drop CLK_NR_CLKS from Rockchip rk3128 and rk3188 binding headers
   - Make qcom_cc_really_probe() take a struct device to allow reuse in
     non-platform-drivers
   - Introduce prepare-only branch clock ops in the qcom clk driver to
     support clocks on buses that take locks
   - Describe parent/child relationship for Qualcomm SC7280 camera GDSCs
   - Support Qualcomm Huayra 2290 alpha PLL
   - Adjust the highest SDCC clock frequency on Qualcomm IPQ6018 to
     match HS200 support
   - Add missing PCIe PIPE clocks on Qualcomm IPQ9574
   - Fix various configurations and properties in the Qualcomm SA8775P,
     X1E80100 and SM7280 drivers
   - Park Qualcomm SM8350 GPU RCGs on XO while disabled
   - Remove unused CONFIG_QCOM_RPMCC Kconfig symbol
   - exynos-clkout: Remove usage of of_device_id table as
     .of_match_table, because the driver is instantiated as MFD cell,
     not as standalone platform driver. Populated .of_match_table
     confused people few times to convert the code to
     device_get_match_data(), which broke the driver
   - Mark one Samsung UFS clock as critical, because having it off stops
     the system from shutdown
   - Use kmemdup_array() when applicable
   - Remove unused 'struct gates_data' from old sunxi driver library
   - Add GPADC clock and reset for Allwinner H616
   - Minor Amlogic S4 clock fixes
   - DT bindings Yaml conversion of the Amlogic AXG audio controller
   - Amlogic C3 clock controllers support
   - Amlogic clk flag added to skip init of already enabled PLLs and
     avoid relocking
   - Amlogic A1 DT bindings updates for system pll support
   - Add missing MODULE_DESCRIPTION where necessary
   - Remove obsolete clock DT binding header files
   - Add Battery Backup (VBATTB) and I2C clocks, resets, and power
     domains on Renesas RZ/G3S
   - Add audio clocks on Renesas R-Car V4M
   - Add video capture (ISPCS, CSI-2, VIN) clocks on Renesas R-Car V4M"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (135 commits)
  clk: thead: Add support for T-Head TH1520 AP_SUBSYS clocks
  dt-bindings: clock: Document T-Head TH1520 AP_SUBSYS controller
  clk: sophgo: Avoid -Wsometimes-uninitialized in sg2042_clk_pll_set_rate()
  clk/sophgo: Using BUG() instead of unreachable() in mmux_get_parent_id()
  clk: mxs: Use clamp() in clk_ref_round_rate() and clk_ref_set_rate()
  clk: sunxi-ng r40: Constify struct regmap_config
  clk: en7523: fix rate divider for slic and spi clocks
  clk: lpc32xx: Constify struct regmap_config
  clk: xilinx: Constify struct regmap_config
  clk: en7523: Remove PCIe reset open drain configuration for EN7581
  clk: en7523: Remove pcie prepare/unpreare callbacks for EN7581 SoC
  clk: en7523: Add reset-controller support for EN7581 SoC
  dt-bindings: clock: airoha: Add reset support to EN7581 clock binding
  dt-bindings: clock: mediatek: Document reset cells for MT8188 sys
  clk: mediatek: mt8173-infracfg: Handle unallocated infracfg when module
  dt-bindings: clock: mediatek: add syscon compatible for mt7622 pciesys
  dt-bindings: clock: sprd,sc9860-clk: convert to YAML
  dt-bindings: clock: qoriq-clock: convert to yaml format
  clk: qcom: Park shared RCGs upon registration
  clk: qcom: ipq9574: Use icc-clk for enabling NoC related clocks
  ...
2024-07-19 12:16:28 -07:00
Linus Torvalds
0ffb8a4c96 Merge tag 'devicetree-for-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree updates from Rob Herring:
 "DT Bindings:

   - Convert and add a bunch of IBM FSI related bindings

   - Add a new schema listing legacy compatibles which will (probably)
     never be documented. This will silence various checks warning about
     them.

   - Add bindings for Sierra Wireless mangOH Green SPI IoT interface,
     new Arm 2024 Cortex and Neoverse CPUs, QCom sc8180x PDC, QCom SDX75
     GPI DMA, imx8mp/imx8qxp fsl,irqsteer, and Renesas RZ/G2UL CRU and
     CSI-2 blocks

   - Convert Spreadtrum sprd-timer, FSL cpm_qe, FSL fsl,ls-scfg-msi, FSL
     q(b)man-*, FSL qoriq-mc, and img,pdc-wdt bindings to DT schema

   - Drop obsolete stericsson,abx500.txt

  DT core:

   - Update dtc to upstream version v1.7.0-93-g1df7b047fe43

   - Add support to run DT validation on DTs with applied overlays

   - Add helper for creating boolean properties in dynamic nodes and use
     that for dynamic PCI nodes

   - Clean-up early parsing of '#{address,size}-cells'"

* tag 'devicetree-for-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (39 commits)
  dt-bindings: timer: sprd-timer: convert to YAML
  dt-bindings: incomplete-devices: document devices without bindings
  dt-bindings: trivial-devices: document the Sierra Wireless mangOH Green SPI IoT interface
  scripts/dtc: Update to upstream version v1.7.0-93-g1df7b047fe43
  dt-bindings: soc: fsl: Add fsl,ls1028a-reset for reset syscon node
  dt-bindings: soc: fsl: cpm_qe: convert to yaml format
  dt-bindings: i2c: i2c-fsi: Convert to json-schema
  dt-bindings: fsi: Document the FSI Hub Controller
  dt-bindings: fsi: Document the AST2700 FSI controller
  dt-bindings: fsi: ast2600-fsi-master: Convert to json-schema
  dt-bindings: fsi: ibm,i2cr-fsi-master: Reference common FSI controller
  dt-bindings: fsi: Document the FSI controller common properties
  dt-bindings: fsi: Document the IBM SBEFIFO engine
  dt-bindings: fsi: p9-occ: Convert to json-schema
  dt-bindings: fsi: Document the IBM SCOM engine
  dt-bindings: fsi: fsi2spi: Document SPI controller child nodes
  dt-bindings: interrupt-controller: convert fsl,ls-scfg-msi to yaml
  dt-bindings: soc: fsl: Convert q(b)man-* to yaml format
  dt-bindings: misc: fsl,qoriq-mc: convert to yaml format
  dt-bindings: drop stale Anson Huang from maintainers
  ...
2024-07-17 18:07:31 -07:00
Linus Torvalds
1200af3ac1 Merge tag 'mfd-next-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd
Pull MFD updates from Lee Jones:
 "New Drivers:
   - ROHM BD96801 Power Management IC
   - Cirrus Logic CS40L50 Haptic Driver with Waveform Memory
   - Marvell 88PM886 Power Management IC

  New Device Support:
   - Keyboard Backlight to ChromeOS Embedded Controller
   - LEDs to ChromeOS Embedded Controller
   - Charge Control to ChromeOS Embedded Controller
   - HW Monitoring Service to ChromeOS Embedded Controller
   - AUXADCs to MediaTek MT635{7,8,9} Power Management ICs

  New Functionality:
   - Allow Syscon consumers to supply their own Regmaps on registration

  Fix-ups:
   - Constify/staticise applicable data structures
   - Remove superfluous/duplicated/unused sections
   - Device Tree binding adaptions/conversions/creation
   - Trivial; spelling, whitespace, coding-style adaptions
   - Utilise centrally provided helpers and macros to aid
     simplicity/duplication
   - Drop i2c_device_id::driver_data where the value is unused
   - Replace ACPI/DT firmware helpers with agnostic variants
   - Move over to GPIOD (descriptor-based) APIs
   - Annotate a bunch of __counted_by() cases
   - Straighten out some includes

  Bug Fixes:
   - Ensure potentially asserted recent lines are deasserted during
     initialisation
   - Avoid "<module>.ko is added to multiple modules" warnings
   - Supply a bunch of MODULE_DESCRIPTIONs to silence modpost warnings
   - Fix Wvoid-pointer-to-enum-cast warnings"

* tag 'mfd-next-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (87 commits)
  mfd: timberdale: Attach device properties to TSC2007 board info
  mfd: tmio: Move header to platform_data
  mfd: tmio: Sanitize comments
  mfd: tmio: Update include files
  mmc: tmio/sdhi: Fix includes
  mfd: tmio: Remove obsolete io accessors
  mfd: tmio: Remove obsolete platform_data
  watchdog: bd96801_wdt: Add missing include for FIELD_*()
  dt-bindings: mfd: syscon: Add APM poweroff mailbox
  dt-bindings: mfd: syscon: Split and enforce documenting MFD children
  dt-bindings: mfd: rk817: Merge support for RK809
  dt-bindings: mfd: rk817: Fixup clocks and reference dai-common
  dt-bindings: mfd: syscon: Add TI's opp table compatible
  mfd: omap-usb-tll: Use struct_size to allocate tll
  dt-bindings: mfd: Explain lack of child dependency in simple-mfd
  dt-bindings: mfd: Dual licensing for st,stpmic1 bindings
  mfd: omap-usb-tll: Annotate struct usbtll_omap with __counted_by
  mfd: tps6594-core: Remove unneeded semicolon in tps6594_check_crc_mode()
  mfd: lm3533: Move to new GPIO descriptor-based APIs
  mfd: tps65912: Use devm helper functions to simplify probe
  ...
2024-07-17 17:42:20 -07:00
Linus Torvalds
e3950967f6 Merge tag 'soc-dt-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC dt updates from Arnd Bergmann:
 "The devicetree updates are fairly well spread out across platforms,
  with Qualcomm making up about a third of the total.

  There are three new SoCs in existing product families this:

   - NXP i.MX95 is a variant of i.MX93, now with six Cortex-A55 cores
     instead of just two as well as a GPU and more high-speed I/O
     devices.

   - Qualcomm QCS8550 is a variant of SM8550 for IOT devices

   - Airoha EN7581 is a 10G-PON network chip and related to the MT7981
     Wireless router chip from its parent Mediatek.

  In total there are 58 new machines, including four riscv boards and
  eight for 32-bit arm.

  The most exciting new addition is probably a pair of laptops based on
  the Qualcomm x1e80100 (Snapdragon X1 Elite) chip, the Asus Vivobook
  S15 and the Lenovo Yoga Slim7x.

  Other noteworthy new additions are:

   - A total of 20 Qualcomm based machines, mostly Android devices from
     Samsung, Motorola and LG, as well as a wireless router and some
     reference designs

   - Six NXP i.MX based machines, mostly industrial boards along with
     some reference designs

   - Mediatek sees some interesting Filogic based routers including the
     "OpenWRT One", a few new Chromebooks as well as single-board
     computers.

   - Four machines from Solidrun based on Marvell cn913x, replacing the
     older Armada 8000 based counterparts

   - The four Amlogic machines are all set top boxes or reference
     designs for them

   - The nine new Rockchips machines are mostly single-board computers
     including some interesting ones based on the rk3588 chip like the
     ROCK 5 ITX board and the CM3588 with its four NVMe slots

   - The RISC-V boards are all single-board computers based on Starfive
     JH7110, Microchip MPFS and Allwinner D1, which all had similar
     boards already

  There are also a lot of updates to already supported machines, notably
  for the TI K3, Rockchips, Freescale and of course Qualcomm platforms"

* tag 'soc-dt-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (846 commits)
  arm64: dts: allwinner: h616: add crypto engine node
  riscv: dts: add clock generator for Sophgo SG2042 SoC
  arm64: dts: rockchip: Add Xunlong Orange Pi 3B
  dt-bindings: arm: rockchip: Add Xunlong Orange Pi 3B
  arm64: dts: rockchip: Add Radxa ROCK 3B
  dt-bindings: arm: rockchip: Add Radxa ROCK 3B
  mailmap: Update Luca Weiss's email address
  ARM: dts: ixp4xx: nslu2: beeper uses PWM
  arm64: dts: rockchip: add ROCK 5 ITX board
  dt-bindings: arm: rockchip: Add ROCK 5 ITX board
  arm64: dts: rockchip: Add dma-names to uart1 on Pine64 rk3566 devices
  arm64: dts: rockchip: Add avdd supplies to hdmi on rock64
  arm64: dts: qcom: msm8916-lg-c50: add initial dts for LG Leon LTE
  arm64: dts: qcom: msm8916-lg-m216: Add initial device tree
  dt-bindings: arm: qcom: Add msm8916 based LG devices
  ARM: dts: qcom: msm8960: correct memory base
  arm64: dts: qcom: ipq9574: Add icc provider ability to gcc
  dt-bindings: interconnect: Add Qualcomm IPQ9574 support
  arm64: dts: qcom: sm8150: Add video clock controller node
  arm64: dts: qcom: pm6150: Add vibrator
  ...
2024-07-16 11:43:51 -07:00
Stephen Boyd
589eb11498 Merge branches 'clk-qcom', 'clk-rockchip', 'clk-sophgo' and 'clk-thead' into clk-next
- Add support for the AP sub-system clock controller in the T-Head TH1520

* clk-qcom: (71 commits)
  clk: qcom: Park shared RCGs upon registration
  clk: qcom: ipq9574: Use icc-clk for enabling NoC related clocks
  clk: qcom: common: Add interconnect clocks support
  interconnect: icc-clk: Add devm_icc_clk_register
  interconnect: icc-clk: Specify master/slave ids
  dt-bindings: clock: qcom: Add AHB clock for SM8150
  clk: qcom: gcc-x1e80100: Set parent rate for USB3 sec and tert PHY pipe clks
  dt-bindings: interconnect: Add Qualcomm IPQ9574 support
  clk: qcom: kpss-xcc: Return of_clk_add_hw_provider to transfer the error
  clk: qcom: lpasscc-sc8280xp: Constify struct regmap_config
  clk: qcom: gcc-x1e80100: Fix halt_check for all pipe clocks
  clk: qcom: gcc-ipq6018: update sdcc max clock frequency
  clk: qcom: camcc-sm8650: Add SM8650 camera clock controller driver
  dt-bindings: clock: qcom: Add SM8650 camera clock controller
  dt-bindings: clock: qcom: Update the order of SC8280XP camcc header
  clk: qcom: videocc-sm8550: Add SM8650 video clock controller
  clk: qcom: videocc-sm8550: Add support for videocc XO clk ares
  dt-bindings: clock: qcom: Add SM8650 video clock controller
  dt-bindings: clock: qcom: Update SM8450 videocc header file name
  clk: qcom: gpucc-sa8775p: Update wait_val fields for GPU GDSC's
  ...

* clk-rockchip:
  dt-bindings: clock: rk3188-cru-common: remove CLK_NR_CLKS
  clk: rockchip: rk3188: Drop CLK_NR_CLKS usage
  clk: rockchip: Switch to use kmemdup_array()
  clk: rockchip: rk3128: Add HCLK_SFC
  dt-bindings: clock: rk3128: Add HCLK_SFC
  dt-bindings: clock: rk3128: Drop CLK_NR_CLKS
  clk: rockchip: rk3128: Drop CLK_NR_CLKS usage
  clk: rockchip: rk3128: Add hclk_vio_h2p to critical clocks
  clk: rockchip: rk3128: Export PCLK_MIPIPHY
  dt-bindings: clock: rk3128: Add PCLK_MIPIPHY

* clk-sophgo:
  clk: sophgo: Avoid -Wsometimes-uninitialized in sg2042_clk_pll_set_rate()
  clk/sophgo: Using BUG() instead of unreachable() in mmux_get_parent_id()
  clk: sophgo: Add SG2042 clock driver
  dt-bindings: clock: sophgo: add clkgen for SG2042
  dt-bindings: clock: sophgo: add RP gate clocks for SG2042
  dt-bindings: clock: sophgo: add pll clocks for SG2042

* clk-thead:
  clk: thead: Add support for T-Head TH1520 AP_SUBSYS clocks
  dt-bindings: clock: Document T-Head TH1520 AP_SUBSYS controller
2024-07-16 11:24:25 -07:00
Stephen Boyd
bc060e6bb7 Merge branches 'clk-renesas', 'clk-amlogic', 'clk-allwinner' and 'clk-samsung' into clk-next
* clk-renesas:
  clk: renesas: r9a08g045: Add clock, reset and power domain support for I2C
  clk: renesas: r8a779h0: Add Audio clocks
  clk: renesas: r9a08g045: Add clock, reset and power domain support for the VBATTB IP
  dt-bindings: clock: rcar-gen2: Remove obsolete header files
  dt-bindings: clock: r8a7779: Remove duplicate newline
  clk: renesas: Drop "Renesas" from individual driver descriptions
  clk: renesas: r8a779h0: Fix PLL2/PLL4 multipliers in comments
  clk: renesas: r8a779h0: Add VIN clocks
  dt-bindings: clock: renesas,rzg2l-cpg: Update description for #reset-cells
  clk: renesas: rcar-gen2: Use DEFINE_SPINLOCK() for static spinlock
  clk: renesas: cpg-lib: Use DEFINE_SPINLOCK() for global spinlock
  clk: renesas: r8a77970: Use common cpg_lock
  clk: renesas: r8a779h0: Add CSI-2 clocks
  clk: renesas: r8a779h0: Add ISPCS clocks

* clk-amlogic:
  clk: meson: add missing MODULE_DESCRIPTION() macros
  dt-bindings: clock: meson: a1: peripherals: support sys_pll input
  dt-bindings: clock: meson: a1: pll: introduce new syspll bindings
  clk: meson: add 'NOINIT_ENABLED' flag to eliminate init for enabled PLL
  clk: meson: c3: add c3 clock peripherals controller driver
  clk: meson: c3: add support for the C3 SoC PLL clock
  dt-bindings: clock: add Amlogic C3 peripherals clock controller
  dt-bindings: clock: add Amlogic C3 SCMI clock controller support
  dt-bindings: clock: add Amlogic C3 PLL clock controller
  dt-bindings: clock: meson: Convert axg-audio-clkc to YAML format
  clk: meson: s4: fix pwm_j_div parent clock
  clk: meson: s4: fix fixed_pll_dco clock

* clk-allwinner:
  clk: sunxi-ng r40: Constify struct regmap_config
  clk: sunxi-ng: h616: Add clock/reset for GPADC
  dt-bindings: clock: sun50i-h616-ccu: Add GPADC clocks
  clk: sunxi: Remove unused struct 'gates_data'
  clk: sunxi-ng: add missing MODULE_DESCRIPTION() macros

* clk-samsung:
  clk: samsung: gs101: mark gout_hsi2_ufs_embd_i_clk_unipro as critical
  clk: samsung: Switch to use kmemdup_array()
  clk: samsung: exynos-clkout: Remove misleading of_match_table/MODULE_DEVICE_TABLE
2024-07-16 11:24:16 -07:00
Stephen Boyd
160d7b9fb9 Merge branches 'clk-stm', 'clk-cleanup', 'clk-kunit' and 'clk-mediatek' into clk-next
- Add reset support to Airoha EN7581 clk driver
 - Add module description to mediatek clk drivers

* clk-stm:
  clk: stm32mp25: add security clocks
  clk: stm32mp2: use of STM32 access controller

* clk-cleanup:
  clk: mxs: Use clamp() in clk_ref_round_rate() and clk_ref_set_rate()
  clk: lpc32xx: Constify struct regmap_config
  clk: xilinx: Constify struct regmap_config
  dt-bindings: clock: sprd,sc9860-clk: convert to YAML
  dt-bindings: clock: qoriq-clock: convert to yaml format
  clk: vexpress-osc: add missing MODULE_DESCRIPTION() macro
  clk: sifive: prci: fix module autoloading
  dt-bindings: clock: milbeaut: Drop providers and consumers from example
  clk: sprd: add missing MODULE_DESCRIPTION() macro
  clk: sophgo: add missing MODULE_DESCRIPTION() macro

* clk-kunit:
  clk: disable clk gate tests for s390
  clk: test: add missing MODULE_DESCRIPTION() macros

* clk-mediatek:
  clk: en7523: fix rate divider for slic and spi clocks
  clk: en7523: Remove PCIe reset open drain configuration for EN7581
  clk: en7523: Remove pcie prepare/unpreare callbacks for EN7581 SoC
  clk: en7523: Add reset-controller support for EN7581 SoC
  dt-bindings: clock: airoha: Add reset support to EN7581 clock binding
  dt-bindings: clock: mediatek: Document reset cells for MT8188 sys
  clk: mediatek: mt8173-infracfg: Handle unallocated infracfg when module
  dt-bindings: clock: mediatek: add syscon compatible for mt7622 pciesys
  clk: mediatek: Add a module description where missing
2024-07-16 11:24:01 -07:00
Drew Fustini
1037885b30 dt-bindings: clock: Document T-Head TH1520 AP_SUBSYS controller
Document bindings for the T-Head TH1520 AP sub-system clock controller.

Link: https://openbeagle.org/beaglev-ahead/beaglev-ahead/-/blob/main/docs/TH1520%20System%20User%20Manual.pdf
Co-developed-by: Yangtao Li <frank.li@vivo.com>
Signed-off-by: Yangtao Li <frank.li@vivo.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Drew Fustini <dfustini@tenstorrent.com>
Link: https://lore.kernel.org/r/20240623-th1520-clk-v2-1-ad8d6432d9fb@tenstorrent.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2024-07-10 16:17:34 -07:00
Krzysztof Kozlowski
499f5e3c7c dt-bindings: drop stale Anson Huang from maintainers
Emails to Anson Huang bounce:

  Diagnostic-Code: smtp; 550 5.4.1 Recipient address rejected: Access denied.

Add IMX platform maintainers for bindings which would become orphaned.

Acked-by: Uwe Kleine-König <ukleinek@kernel.org>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com> # for I2C
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> # for IIO
Acked-by: Andi Shyti <andi.shyti@kernel.org>
Acked-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20240617065828.9531-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2024-07-09 07:40:17 -06:00
Stanislav Jakubek
2bcc896986 dt-bindings: clock: drop obsolete stericsson,abx500.txt
These bindings are already (better) described in mfd/stericsson,ab8500.yaml,
drop these now obsolete bindings.

Signed-off-by: Stanislav Jakubek <stano.jakubek@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/Zm7I2Zbq1JNPoEJp@standask-GA-A55M-S2HP
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2024-07-09 07:40:16 -06:00
Lorenzo Bianconi
7aa291962f dt-bindings: clock: airoha: Add reset support to EN7581 clock binding
Introduce reset capability to EN7581 device-tree clock binding
documentation. Add reset register mapping between misc scu and pb scu
ones in order to follow the memory order. This change is not
introducing any backward compatibility issue since the EN7581 dts is not
upstream yet.

Fixes: 0a382be005 ("dt-bindings: clock: airoha: add EN7581 binding")
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://lore.kernel.org/r/28fef3e83062d5d71e7b4be4b47583f851a15bf8.1719485847.git.lorenzo@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2024-07-08 12:08:43 -07:00
AngeloGioacchino Del Regno
6681afbb9c dt-bindings: clock: mediatek: Document reset cells for MT8188 sys
The MT8188 sys clocks embed a reset controller: add #reset-cells
to the binding to allow using resets.

Fixes: 1086a5310f ("dt-bindings: clock: mediatek: Add new MT8188 clock")
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20240619085322.66716-2-angelogioacchino.delregno@collabora.com
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2024-07-08 12:07:51 -07:00
Christian Marangi
9f7809c6a8 dt-bindings: clock: mediatek: add syscon compatible for mt7622 pciesys
Add required syscon compatible for mt7622 pciesys. This is required for
SATA interface as the regs are shared.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Link: https://lore.kernel.org/r/20240628105542.5456-2-ansuelsmth@gmail.com
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2024-07-08 12:01:46 -07:00
Stanislav Jakubek
db469084e3 dt-bindings: clock: sprd,sc9860-clk: convert to YAML
Convert the Spreadtrum SC9860 clock bindings to DT schema.

Signed-off-by: Stanislav Jakubek <stano.jakubek@gmail.com>
Link: https://lore.kernel.org/r/ZobghvwZAyMjl4eB@standask-GA-A55M-S2HP
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2024-07-08 11:59:20 -07:00
Frank Li
0d796569e1 dt-bindings: clock: qoriq-clock: convert to yaml format
Convert qoria-clock DT binding to yaml format. Split to two files
qoriq-clock.yaml and qoriq-clock-legancy.yaml.

Addtional change:
- Remove clock consumer part in example
- Fixed example dts error
- Deprecated legancy node
- fsl,b4420-clockgen and fsl,b4860-clockgen fallback to fsl,b4-clockgen.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Link: https://lore.kernel.org/r/20240701205809.1978389-1-Frank.Li@nxp.com
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2024-07-08 11:58:17 -07:00
Bjorn Andersson
b3d57c5582 Merge branch '20240430064214.2030013-3-quic_varada@quicinc.com' into clk-for-6.11
Merge the IPQ9574 interconnect binding through a topic branch, to make
it possible to use the constants in the DeviceTree source branch as
well.
2024-07-08 11:40:54 -05:00
Satya Priya Kakitapalli
6a98844a5a dt-bindings: clock: qcom: Add AHB clock for SM8150
SM8150 videocc needs AHB clock, so update the bindings for sm8150
to add the AHB clock.

Fixes: df3f61d2cd ("dt-bindings: clock: add SM8150 QCOM video clock bindings")
Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com>
Link: https://lore.kernel.org/r/20240509-videocc-sm8150-dt-node-v4-1-e9617f65e946@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-08 11:40:46 -05:00
Bjorn Andersson
47c7823be6 Merge branch '20240430064214.2030013-3-quic_varada@quicinc.com' into arm64-for-6.11
Merge IPQ9574 interconnect clock DeviceTree binding to gain access to
the interconnect constants.
2024-07-06 13:15:59 -05:00
Varadarajan Narayanan
d1f1570f3d dt-bindings: interconnect: Add Qualcomm IPQ9574 support
Add interconnect-cells to clock provider so that it can be
used as icc provider.

Add master/slave ids for Qualcomm IPQ9574 Network-On-Chip
interfaces. This will be used by the gcc-ipq9574 driver
that will for providing interconnect services using the
icc-clk framework.

Acked-by: Georgi Djakov <djakov@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Link: https://lore.kernel.org/r/20240430064214.2030013-3-quic_varada@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-06 13:13:14 -05:00
Rob Herring (Arm)
4c4ade1aba dt-bindings: mfd: syscon: Add more simple compatibles
Add another batch of various "simple" syscon compatibles which were
undocumented or still documented with old text bindings. Remove the old
text binding docs for the ones which were documented.

Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> # mtd
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20240603131230.136196-2-robh@kernel.org
Signed-off-by: Lee Jones <lee@kernel.org>
2024-07-04 17:38:38 +01:00
Richard Genoud
9040d64f58 dt-bindings: ti: fix TISCI protocol URL link
The http://processors.wiki.ti.com EOL in january 2021

Fix the old URL with the new one.

Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20240618150933.1824185-2-richard.genoud@bootlin.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2024-06-27 17:44:48 -05:00
Bjorn Andersson
e2ebc65958 Merge branch '20240602114439.1611-1-quic_jkona@quicinc.com' into arm64-for-6.11
Merge the SM8650 video and clock controller drivers to gain access to
the constants from the DeviceTree binding.
2024-06-25 21:51:55 -05:00
Bjorn Andersson
03675e398b Merge branch '20240602114439.1611-1-quic_jkona@quicinc.com' into clk-for-6.11
Merge SM8650 video and camera clock drivers through topic branch, to
make available the DeviceTree binding includes to the DeviceTree source
branches as well.
2024-06-25 21:49:46 -05:00
Jagadeesh Kona
1ae3f0578e dt-bindings: clock: qcom: Add SM8650 camera clock controller
Add device tree bindings for the camera clock controller on
Qualcomm SM8650 platform.

Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Link: https://lore.kernel.org/r/20240602114439.1611-7-quic_jkona@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-06-25 18:06:25 -05:00
Jagadeesh Kona
2bce2ce7ab dt-bindings: clock: qcom: Update the order of SC8280XP camcc header
Update the order of SC8280XP camcc header file in SM8450 camcc
bindings.

Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Link: https://lore.kernel.org/r/20240602114439.1611-6-quic_jkona@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-06-25 18:06:25 -05:00
Jagadeesh Kona
a6a61b9701 dt-bindings: clock: qcom: Add SM8650 video clock controller
SM8650 video clock controller has most clocks same as SM8450,
but it also has few additional clocks and resets. Add device tree
bindings for the video clock controller on Qualcomm SM8650 platform
by defining these additional clocks and resets on top of SM8450.

Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Link: https://lore.kernel.org/r/20240602114439.1611-3-quic_jkona@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-06-25 18:06:25 -05:00
Jagadeesh Kona
213e1b5847 dt-bindings: clock: qcom: Update SM8450 videocc header file name
Correct the videocc header file name in SM8450 videocc bindings.

Fixes: 1e910b2ba0 ("dt-bindings: clock: qcom: Add SM8450 video clock controller")
Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240602114439.1611-2-quic_jkona@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-06-25 18:06:25 -05:00
Chen Wang
5911423798 dt-bindings: clock: sophgo: add clkgen for SG2042
Add bindings for the clock generator of divider/mux and gates working
for other subsystem than RP subsystem for Sophgo SG2042.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Reviewed-by: Rob Herring <robh@kernel.org>
2024-06-14 14:49:40 +08:00
Chen Wang
5a7144d61d dt-bindings: clock: sophgo: add RP gate clocks for SG2042
Add bindings for the gate clocks of RP subsystem for Sophgo SG2042.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Reviewed-by: Rob Herring <robh@kernel.org>
2024-06-14 14:49:40 +08:00
Chen Wang
88a26c3c24 dt-bindings: clock: sophgo: add pll clocks for SG2042
Add bindings for the pll clocks for Sophgo SG2042.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Guo Ren <guoren@kernel.org>
2024-06-14 14:49:40 +08:00
Bjorn Andersson
ea5594aa3e Merge branch '20240606-topic-rb1_gpu-v4-1-4bc0c19da4af@linaro.org' into clk-for-6.11
Merge the QCM2290 GPUCC binding through a topic branch to allow for it
to also be merged into the DeviceTree branch.
2024-06-12 23:06:18 -05:00
Konrad Dybcio
525b42832b dt-bindings: clock: Add Qcom QCM2290 GPUCC
Add device tree bindings for graphics clock controller for Qualcomm
Technology Inc's QCM2290 SoCs.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240606-topic-rb1_gpu-v4-1-4bc0c19da4af@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-06-12 23:06:10 -05:00
Luo Jie
80bbd1c355 dt-bindings: clock: add qca8386/qca8084 clock and reset definitions
QCA8386/QCA8084 includes the clock & reset controller that is
accessed by MDIO bus. Two work modes are supported, qca8386 works
as switch mode, qca8084 works as PHY mode.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Luo Jie <quic_luoj@quicinc.com>
Link: https://lore.kernel.org/r/20240605124541.2711467-3-quic_luoj@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-06-12 23:04:26 -05:00
Krzysztof Kozlowski
7e828d77d2 dt-bindings: clock: qcom,sm8450-gpucc: reference qcom,gcc.yaml
Just like most of Qualcomm clock controllers, we can reference common
qcom,gcc.yaml schema to unify the common parts of the binding.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240605-dt-bindings-qcom-gcc-v2-16-f947b24f1283@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-06-12 23:03:13 -05:00
Krzysztof Kozlowski
4da364c759 dt-bindings: clock: qcom,sm8550-dispcc: reference qcom,gcc.yaml
Just like most of Qualcomm clock controllers, we can reference common
qcom,gcc.yaml schema to unify the common parts of the binding.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240605-dt-bindings-qcom-gcc-v2-15-f947b24f1283@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-06-12 23:03:13 -05:00
Krzysztof Kozlowski
8acff345c3 dt-bindings: clock: qcom,sm8450-dispcc: reference qcom,gcc.yaml
Just like most of Qualcomm clock controllers, we can reference common
qcom,gcc.yaml schema to unify the common parts of the binding.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240605-dt-bindings-qcom-gcc-v2-14-f947b24f1283@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-06-12 23:03:13 -05:00
Krzysztof Kozlowski
7b69a903fc dt-bindings: clock: qcom,sm6115-dispcc: reference qcom,gcc.yaml
Just like most of Qualcomm clock controllers, we can reference common
qcom,gcc.yaml schema to unify the common parts of the binding.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240605-dt-bindings-qcom-gcc-v2-13-f947b24f1283@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-06-12 23:03:13 -05:00
Krzysztof Kozlowski
4ef61bcf1a dt-bindings: clock: qcom,sdm845-dispcc: reference qcom,gcc.yaml
Just like most of Qualcomm clock controllers, we can reference common
qcom,gcc.yaml schema to unify the common parts of the binding.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240605-dt-bindings-qcom-gcc-v2-12-f947b24f1283@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-06-12 23:03:13 -05:00
Krzysztof Kozlowski
c9ae35ace8 dt-bindings: clock: qcom,sc7280-dispcc: reference qcom,gcc.yaml
Just like most of Qualcomm clock controllers, we can reference common
qcom,gcc.yaml schema to unify the common parts of the binding.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240605-dt-bindings-qcom-gcc-v2-11-f947b24f1283@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-06-12 23:03:13 -05:00
Krzysztof Kozlowski
e68a21bd18 dt-bindings: clock: qcom,sc7180-dispcc: reference qcom,gcc.yaml
Just like most of Qualcomm clock controllers, we can reference common
qcom,gcc.yaml schema to unify the common parts of the binding.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240605-dt-bindings-qcom-gcc-v2-10-f947b24f1283@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-06-12 23:03:13 -05:00
Krzysztof Kozlowski
a8197afc44 dt-bindings: clock: qcom,qcm2290-dispcc: reference qcom,gcc.yaml
Just like most of Qualcomm clock controllers, we can reference common
qcom,gcc.yaml schema to unify the common parts of the binding.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240605-dt-bindings-qcom-gcc-v2-9-f947b24f1283@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-06-12 23:03:13 -05:00
Krzysztof Kozlowski
fa02399d69 dt-bindings: clock: qcom,msm8998-gpucc: reference qcom,gcc.yaml
Just like most of Qualcomm clock controllers, we can reference common
qcom,gcc.yaml schema to unify the common parts of the binding.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240605-dt-bindings-qcom-gcc-v2-8-f947b24f1283@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-06-12 23:03:13 -05:00
Krzysztof Kozlowski
f68872fe10 dt-bindings: clock: qcom,gpucc: reference qcom,gcc.yaml
Just like most of Qualcomm clock controllers, we can reference common
qcom,gcc.yaml schema to unify the common parts of the binding.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240605-dt-bindings-qcom-gcc-v2-7-f947b24f1283@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-06-12 23:03:13 -05:00
Krzysztof Kozlowski
b20b9a7626 dt-bindings: clock: qcom,gpucc-sdm660: reference qcom,gcc.yaml
Just like most of Qualcomm clock controllers, we can reference common
qcom,gcc.yaml schema to unify the common parts of the binding.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240605-dt-bindings-qcom-gcc-v2-6-f947b24f1283@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-06-12 23:03:13 -05:00
Krzysztof Kozlowski
5576b6f8e9 dt-bindings: clock: qcom,dispcc-sm8x50: reference qcom,gcc.yaml
Just like most of Qualcomm clock controllers, we can reference common
qcom,gcc.yaml schema to unify the common parts of the binding.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240605-dt-bindings-qcom-gcc-v2-5-f947b24f1283@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-06-12 23:03:13 -05:00
Krzysztof Kozlowski
f168430195 dt-bindings: clock: qcom,dispcc-sm6350: reference qcom,gcc.yaml
Just like most of Qualcomm clock controllers, we can reference common
qcom,gcc.yaml schema to unify the common parts of the binding.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240605-dt-bindings-qcom-gcc-v2-4-f947b24f1283@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-06-12 23:03:13 -05:00
Krzysztof Kozlowski
cc9d138fff dt-bindings: clock: qcom,dispcc-sc8280xp: reference qcom,gcc.yaml
Just like most of Qualcomm clock controllers, we can reference common
qcom,gcc.yaml schema to unify the common parts of the binding.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240605-dt-bindings-qcom-gcc-v2-3-f947b24f1283@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-06-12 23:03:13 -05:00
Krzysztof Kozlowski
3b39fb00be dt-bindings: clock: qcom,videocc: reference qcom,gcc.yaml
Just like most of Qualcomm clock controllers, we can reference common
qcom,gcc.yaml schema to unify the common parts of the binding.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240605-dt-bindings-qcom-gcc-v2-2-f947b24f1283@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-06-12 23:03:12 -05:00
Krzysztof Kozlowski
acc4101466 dt-bindings: clock: qcom,sm8450-videocc: reference qcom,gcc.yaml
Just like most of Qualcomm clock controllers, we can reference common
qcom,gcc.yaml schema to unify the common parts of the binding.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240605-dt-bindings-qcom-gcc-v2-1-f947b24f1283@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-06-12 23:03:12 -05:00