mirror/linux
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
1,105,317 Commits 2 Branches 854 Tags
96fed779d3d4cb3c221bb70e94de59b8dec0abfc
Commit Graph

114 Commits

Author SHA1 Message Date
Bjorn Andersson
d65d005f9a clk: qcom: add sc8280xp GCC driver 
Add support for the Global Clock Controller found in the Qualcomm
SC8280XP platform.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20220505025457.1693716-3-bjorn.andersson@linaro.org
 2022-05-19 16:41:32 -05:00
Taniya Das
a9dd26639d clk: qcom: lpass: Add support for LPASS clock controller for SC7280 
The Low Power Audio subsystem core and audio clocks are required for
Audio client to be able to request for the clocks and power domains.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220223172248.18877-2-tdas@codeaurora.org
 2022-04-12 21:17:42 -05:00
Martin Botka
6e87c8f074 clk: qcom: Add display clock controller driver for SM6125 
Add support for the display clock controller found on SM6125
based devices. This allows display drivers to probe and
control their clocks.

Signed-off-by: Martin Botka <martin.botka@somainline.org>
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220303131812.302302-4-marijn.suijten@somainline.org
 2022-03-09 08:53:30 -06:00
Marijn Suijten
620f512528 clk: qcom: Fix sorting of SDX_GCC_65 in Makefile and Kconfig 
In order to keep at least the list of `CONFIG_SM_` drivers sorted
alphabetically, SDX_GCC_65 should have been moved one line up.  This in
turn makes it easier and cleaner to add the followup SM_DISPCC_6125
driver in the right place, right before SM_DISPCC_8250.

Fixes: d79afa2013 ("clk: qcom: Add SDX65 GCC support")
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220303131812.302302-2-marijn.suijten@somainline.org
 2022-03-09 08:53:29 -06:00
Konrad Dybcio
013804a727 clk: qcom: Add GPU clock controller driver for SM6350 
Add support for the GPU clock controller found on SM6350.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220222011534.3502-4-konrad.dybcio@somainline.org
 2022-03-08 16:16:47 -06:00
Konrad Dybcio
837519775f clk: qcom: Add display clock controller driver for SM6350 
Add support for the display clock controller found on SM6350.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220222011534.3502-2-konrad.dybcio@somainline.org
 2022-03-08 16:16:47 -06:00
Loic Poulain
cc517ea333 clk: qcom: Add display clock controller driver for QCM2290 
Add support for the display clock controller found in QCM2290
based devices. This clock controller feeds the Multimedia Display
SubSystem (MDSS).

It's a porting of dispcc-scuba GPL-2.0 driver from CAF msm-4.19 kernel:
https://source.codeaurora.org/quic/la/kernel/msm-4.19/tree/drivers/clk/qcom/dispcc-scuba.c?h=LE.UM.4.4.1.r3

Global clock name references (parent_names) have been replaced by
parent_data and parent_hws.

Clocks marked enable_safe_config have their clk_rcg2_ops moved to
clk_rcg2_shared_ops.

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1644432308-21099-2-git-send-email-loic.poulain@linaro.org
 2022-02-10 17:56:10 -06:00
AngeloGioacchino Del Regno
8f62718bd0 clk: qcom: Add MSM8976/56 Global Clock Controller (GCC) driver 
Add support for the global clock controller found on MSM8956
and MSM8976 SoCs.
Since the multimedia clocks are actually in the GCC on these
SoCs, this will allow drivers to probe and control basically
all the required clocks.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Co-developed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Co-developed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211208091036.132334-3-marijn.suijten@somainline.org
 2021-12-16 13:17:23 -06:00
Vinod Koul
db0c944ee9 clk: qcom: Add clock driver for SM8450 
This adds Global Clock controller (GCC) driver for SM8450 SoC including
the gcc resets and gdsc.

This patch is based on initial code downstream by Vivek Aknurwar
<viveka@codeaurora.org>

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211207114003.100693-3-vkoul@kernel.org
 2021-12-16 13:17:22 -06:00
Vamsi Krishna Lanka
d79afa2013 clk: qcom: Add SDX65 GCC support 
Add Global Clock Controller (GCC) support for SDX65 SoCs from Qualcomm.

Signed-off-by: Vamsi Krishna Lanka <quic_vamslank@quicinc.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/b5ea8a00d4e8418b57f4444d0b5243c1acc41808.1638861860.git.quic_vamslank@quicinc.com
 2021-12-16 13:17:22 -06:00
Taniya Das
1daec8cfeb clk: qcom: camcc: Add camera clock controller driver for SC7280 
Add support for the camera clock controller found on SC7280 based
devices.
This would allow camera drivers to probe and control their clocks.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lore.kernel.org/r/1633567425-11953-2-git-send-email-tdas@codeaurora.org
[sboyd@kernel.org: Make some VCOs unsigned long]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2021-10-13 15:32:29 -07:00
Taniya Das
4ab43d1711 clk: qcom: Add lpass clock controller driver for SC7280 
Add support for the lpass clock controller found on SC7280 based devices.
This would allow lpass peripheral loader drivers to control the clocks to
bring the subsystem out of reset.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lore.kernel.org/r/1633484416-27852-3-git-send-email-tdas@codeaurora.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2021-10-13 15:22:49 -07:00
Shawn Guo
496d1a13d4 clk: qcom: Add Global Clock Controller driver for QCM2290 
Add Global Clock Controller (GCC) driver for QCM2290.  This is a porting
of gcc-scuba driver from CAF msm-4.19, with GDSC support added on top.

Because the alpha_pll on the platform has a different register
layout (offsets), its own clk_alpha_pll_regs_offset[] is used in the
driver.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Link: https://lore.kernel.org/r/20210919023308.24498-3-shawn.guo@linaro.org
Acked-by: Rob Herring <robh@kernel.org>
[sboyd@kernel.org: Drop duplicate includes, clk.h include, module alias]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2021-10-13 12:43:02 -07:00
Konrad Dybcio
131abae905 clk: qcom: Add SM6350 GCC driver 
This adds Global Clock controller (GCC) driver for SM6350 SoC

Acked-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210820203624.232268-3-konrad.dybcio@somainline.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2021-08-29 00:20:05 -07:00
Iskren Chernev
cbe63bfdc5 clk: qcom: Add Global Clock controller (GCC) driver for SM6115 
Add support for the global clock controller found on SM6115
based devices. This should allow most non-multimedia device
drivers to probe and control their clocks.

Based on CAF implementation. GDSCs ported from downstream DT.

Signed-off-by: Iskren Chernev <iskren.chernev@gmail.com>
Link: https://lore.kernel.org/r/20210805161107.1194521-3-iskren.chernev@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2021-08-28 20:54:21 -07:00
Konrad Dybcio
4d5b4572c4 clk: qcom: Add msm8994 MMCC driver 
Add a driver for managing MultiMedia SubSystem clocks on msm8994
and its derivatives.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210618111435.595689-2-konrad.dybcio@somainline.org
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2021-08-26 11:58:14 -07:00
Vladimir Lypak
9bb6cfc3c7 clk: qcom: Add Global Clock Controller driver for MSM8953 
This driver provides clocks, resets and power domains for MSM8953
and compatible SoCs: APQ8053, SDM450, SDA450, SDM632, SDA632.

Signed-off-by: Vladimir Lypak <junak.pub@gmail.com>
Signed-off-by: Adam Skladowski <a_skl39@protonmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Sireesh Kodali <sireeshkodali@protonmail.com>
Link: https://lore.kernel.org/r/IPvVnyRWbHuQFswiFz0W08Kj1dKoH55ddQVyIIPhMJw@cp7-web-043.plabs.ch
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2021-08-26 11:54:44 -07:00
Taniya Das
fae7617bb1 clk: qcom: Add video clock controller driver for SC7280 
Add support for the video clock controller found on SC7280
based devices. This would allow video drivers to probe and
control their clocks.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lore.kernel.org/r/1626189143-12957-8-git-send-email-tdas@codeaurora.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2021-07-20 13:46:32 -07:00
Taniya Das
3e0f01d6c7 clk: qcom: Add graphics clock controller driver for SC7280 
Add support for the graphics clock controller found on SC7280
based devices. This would allow graphics drivers to probe and
control their clocks.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lore.kernel.org/r/1626189143-12957-6-git-send-email-tdas@codeaurora.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2021-07-20 13:46:32 -07:00
Taniya Das
1a00c962f9 clk: qcom: Add display clock controller driver for SC7280 
Add support for the display clock controller found on SC7280
based devices. This would allow display drivers to probe and
control their clocks.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lore.kernel.org/r/1626189143-12957-4-git-send-email-tdas@codeaurora.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2021-07-20 13:46:32 -07:00
Jonathan Marek
5d66ca79b5 clk: qcom: Add camera clock controller driver for SM8250 
Add support for the camera clock controller found on SM8250.

Based on the downstream driver.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Robert Foss <robert.foss@linaro.org>
Link: https://lore.kernel.org/r/20210609022051.2171-4-jonathan@marek.ca
[sboyd@kernel.org: Add UL to avoid decimal problems]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2021-06-27 17:19:22 -07:00
Konrad Dybcio
4b8d6ae57c clk: qcom: Add SM6125 (TRINKET) GCC driver 
Add the clocks supported in global clock controller, which clock the
peripherals like BLSPs, SDCC, USB, MDSS etc. Register all the clocks
to the clock framework for the clients to be able to request for them.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Martin Botka <martin.botka@somainline.org>
Link: https://lore.kernel.org/r/20210605121040.282053-2-martin.botka@somainline.org
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
[sboyd@kernel.org: Mark gcc_sm6125_hws array static]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2021-06-27 16:53:29 -07:00
Konrad Dybcio
48b7253264 clk: qcom: Add MDM9607 GCC driver 
Add Global Clock Controller (GCC) support for MDM9607 SoC.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210313020310.386152-2-konrad.dybcio@somainline.org
[sboyd@kernel.org: Drop clk.h include]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2021-06-02 00:19:45 -07:00
Taniya Das
a3cc092196 clk: qcom: Add Global Clock controller (GCC) driver for SC7280 
Add support for the global clock controller found on SC7280
based devices. This should allow most non-multimedia device
drivers to probe and control their clocks.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lore.kernel.org/r/1612981579-17391-3-git-send-email-tdas@codeaurora.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2021-02-14 12:56:55 -08:00
AngeloGioacchino Del Regno
79b5d1fc93 clk: qcom: Add SDM660 GPU Clock Controller (GPUCC) driver 
The GPUCC manages the clocks for the Adreno GPU found on the
SDM630, SDM636, SDM660 SoCs.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Link: https://lore.kernel.org/r/20210113183817.447866-9-angelogioacchino.delregno@somainline.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2021-02-14 12:56:54 -08:00
Martin Botka
5db3ae8b33 clk: qcom: Add SDM660 Multimedia Clock Controller (MMCC) driver 
Add a driver for the multimedia clock controller found on SDM660
based devices. This should allow most multimedia device drivers
to probe and control their clocks.

Signed-off-by: Martin Botka <martin.botka@somainline.org>
Co-developed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
[angelogioacchino.delregno@somainline.org: Cleaned up SDM630 clock fixups]
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Link: https://lore.kernel.org/r/20210113183817.447866-4-angelogioacchino.delregno@somainline.org
[sboyd@kernel.org: Silence NULL pointer sparse warnings]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2021-02-14 12:56:54 -08:00
Vivek Aknurwar
44c20c9ed3 clk: qcom: gcc: Add clock driver for SM8350 
This adds Global Clock controller (GCC) driver for SM8350 SoC

Signed-off-by: Vivek Aknurwar <viveka@codeaurora.org>
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
[vkoul: rebase and tidy up for upstream]
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210127070811.152690-6-vkoul@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2021-02-08 10:03:57 -08:00
Bjorn Andersson
4433594bbe clk: qcom: gcc: Add global clock controller driver for SC8180x 
Add clocks, resets and some of the GDSC provided by the global clock
controller found in the Qualcomm SC8180x platform.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210126043155.1847823-2-bjorn.andersson@linaro.org
[sboyd@kernel.org: Drop F macro as it's already defined]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2021-02-08 09:59:46 -08:00
Manivannan Sadhasivam
f28dec1ab7 clk: qcom: Add SDX55 APCS clock controller support 
Add a driver for the SDX55 APCS clock controller. It is part of the APCS
hardware block, which among other things implements also a combined mux
and half integer divider functionality. The APCS clock controller has 3
parent clocks:

1. Board XO
2. Fixed rate GPLL0
3. A7 PLL

This is required for enabling CPU frequency scaling on SDX55-based
platforms.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210118041156.50016-6-manivannan.sadhasivam@linaro.org
[sboyd@kernel.org: Fix unused ret in probe by hardcoding it]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2021-02-08 09:46:23 -08:00
Manivannan Sadhasivam
5a5223ffd7 clk: qcom: Add A7 PLL support 
Add support for PLL found in Qualcomm SDX55 platforms which is used to
provide clock to the Cortex A7 CPU via a mux. This PLL can provide high
frequency clock to the CPU above 1GHz as compared to the other sources
like GPLL0.

In this driver, the power domain is attached to the cpudev. This is
required for CPUFreq functionality and there seems to be no better place
to do other than this driver (no dedicated CPUFreq driver).

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210118041156.50016-5-manivannan.sadhasivam@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2021-02-08 09:46:23 -08:00
Naveen Yadav
3fade566c0 clk: qcom: Add SDX55 GCC support 
Add Global Clock Controller (GCC) support for SDX55 SoCs from Qualcomm.

Signed-off-by: Naveen Yadav <naveenky@codeaurora.org>
[mani: converted to parent_data, commented critical clocks, cleanups]
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20201126072844.35370-3-manivannan.sadhasivam@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-12-07 16:59:58 -08:00
Srinivas Kandagatla
a2d8f50780 clk: qcom: Add support to LPASS AUDIO_CC Glitch Free Mux clocks 
GFM Muxes in AUDIO_CC control clocks to LPASS WSA and RX Codec Macros.
This patch adds support to these muxes.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20201026120221.18984-4-srinivas.kandagatla@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-11-04 18:34:54 -08:00
Taniya Das
15d09e830b clk: qcom: camcc: Add camera clock controller driver for SC7180 
Add support for the camera clock controller found on SC7180 based devices.
This would allow camera drivers to probe and control their clocks.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lore.kernel.org/r/1602873815-1677-5-git-send-email-tdas@codeaurora.org
[sboyd@kernel.org: Mark hw array static, add UL to big vco numbers]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-11-04 18:31:57 -08:00
Jonathan Marek
80a18f4a85 clk: qcom: Add display clock controller driver for SM8150 and SM8250 
Add support for the display clock controller found on SM8150 and SM8250.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> (SM8250)
Link: https://lore.kernel.org/r/20200927190653.13876-3-jonathan@marek.ca
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-10-13 18:18:06 -07:00
Jonathan Marek
0e94711a1f clk: qcom: add video clock controller driver for SM8250 
Add support for the video clock controller found on SM8250 based devices.

Derived from the downstream driver.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Link: https://lore.kernel.org/r/20200923160635.28370-6-jonathan@marek.ca
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-10-13 18:05:04 -07:00
Jonathan Marek
5658e8cf1a clk: qcom: add video clock controller driver for SM8150 
Add support for the video clock controller found on SM8150 based devices.

Derived from the downstream driver.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Link: https://lore.kernel.org/r/20200923160635.28370-5-jonathan@marek.ca
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-10-13 18:05:04 -07:00
Taniya Das
edab812d80 clk: qcom: lpass: Add support for LPASS clock controller for SC7180 
The Low Power Audio subsystem clocks are required for Audio client
to be able to request for the clocks and power domains.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lore.kernel.org/r/1595606878-2664-5-git-send-email-tdas@codeaurora.org
[sboyd@kernel.org: Drop unused ret in probe function]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-07-24 13:09:43 -07:00
Jonathan Marek
28f0769c77 clk: qcom: Add graphics clock controller driver for SM8250 
Add support for the graphics clock controller found on SM8250
based devices.

This is initially copied from the downstream kernel, but has
been modified to more closely match the upstream sc7180 driver.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20200709135251.643-12-jonathan@marek.ca
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-07-24 01:51:32 -07:00
Jonathan Marek
0cef71f2cc clk: qcom: Add graphics clock controller driver for SM8150 
Add support for the graphics clock controller found on SM8150
based devices.

This is initially copied from the downstream kernel, but has
been modified to more closely match the upstream sc7180 driver.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20200709135251.643-11-jonathan@marek.ca
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-07-24 01:51:29 -07:00
Loic Poulain
03e342dc45 clk: qcom: Add CPU clock driver for msm8996 
Each of the CPU clusters (Power and Perf) on msm8996 are
clocked via 2 PLLs, a primary and alternate. There are also
2 Mux'es, a primary and secondary all connected together
as shown below

                             +-------+
              XO             |       |
          +------------------>0      |
                             |       |
                   PLL/2     | SMUX  +----+
                     +------->1      |    |
                     |       |       |    |
                     |       +-------+    |    +-------+
                     |                    +---->0      |
                     |                         |       |
+---------------+    |             +----------->1      | CPU clk
|Primary PLL    +----+ PLL_EARLY   |           |       +------>
|               +------+-----------+    +------>2 PMUX |
+---------------+      |                |      |       |
                       |   +------+     |   +-->3      |
                       +--^+  ACD +-----+   |  +-------+
+---------------+          +------+         |
|Alt PLL        |                           |
|               +---------------------------+
+---------------+         PLL_EARLY

The primary PLL is what drives the CPU clk, except for times
when we are reprogramming the PLL itself (for rate changes) when
we temporarily switch to an alternate PLL. A subsequent patch adds
support to switch between primary and alternate PLL during rate
changes.

The primary PLL operates on a single VCO range, between 600MHz
and 3GHz. However the CPUs do support OPPs with frequencies
between 300MHz and 600MHz. In order to support running the CPUs
at those frequencies we end up having to lock the PLL at twice
the rate and drive the CPU clk via the PLL/2 output and SMUX.

So for frequencies above 600MHz we follow the following path
 Primary PLL --> PLL_EARLY --> PMUX(1) --> CPU clk
and for frequencies between 300MHz and 600MHz we follow
 Primary PLL --> PLL/2 --> SMUX(1) --> PMUX(0) --> CPU clk

ACD stands for Adaptive Clock Distribution and is used to
detect voltage droops.

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Rajendra Nayak: Initial RFC - https://lkml.org/lkml/2016/9/29/84

Signed-off-by: Ilia Lin <ilialin@codeaurora.org>
Ilia Lin:  - reworked clock registering
           - Added clock-tree diagram
           - non-builtin support
           - clock notifier on rate change
           - https://lkml.org/lkml/2018/5/24/123

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Loic Poulain: - fixed driver remove / clk deregistering
              - Removed useless memory barriers
              - devm usage when possible
              - Fixed Kconfig depends

Link: https://lore.kernel.org/r/1593766185-16346-3-git-send-email-loic.poulain@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-07-10 17:09:20 -07:00
Sivaprakash Murugesan
5e77b4ef1b clk: qcom: Add ipq6018 apss clock controller 
The CPU on Qualcomm ipq6018 devices are clocked primarily by a aplha PLL
and xo which are connected to a mux and enable block.

Add support for the mux and enable block which feeds the CPU on ipq6018
devices.

Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
Link: https://lore.kernel.org/r/1592800092-20533-5-git-send-email-sivaprak@codeaurora.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-06-22 00:21:59 -07:00
Sivaprakash Murugesan
ecd2bacfbb clk: qcom: Add ipq apss pll driver 
The CPUs on Qualcomm ipq based devices are clocked by an alpha PLL.
Add support for the apss pll found on ipq based devices which can
support CPU frequencies above 1Ghz.

Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
Link: https://lore.kernel.org/r/1592800092-20533-3-git-send-email-sivaprak@codeaurora.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-06-22 00:21:59 -07:00
Bryan O'Donoghue
1664014e46 clk: qcom: gcc-msm8939: Add MSM8939 Generic Clock Controller 
This patch adds support for the MSM8939 GCC. The MSM8939 is based on the
MSM8916. MSM8939 is compatible in several ways with MSM8916 but, has
additional functional blocks added which require additional PLL sources. In
some cases functional blocks from the MSM8916 have different clock sources
or different supported frequencies.

Cc: Andy Gross <agross@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: linux-arm-msm@vger.kernel.org
Cc: linux-clk@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: devicetree@vger.kernel.org
Co-developed-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Vincent Knecht <vincent.knecht@mailoo.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Link: https://lkml.kernel.org/r/20200517131348.688405-3-bryan.odonoghue@linaro.org
Tested-by: Konrad Dybcio <konradybcio@gmail.com>
[sboyd@kernel.org: Drop ret in probe function to remove unused
variable]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-05-26 19:37:58 -07:00
Taniya Das
8def929c40 clk: qcom: Add modem clock controller driver for SC7180 
Add support for the modem clock controller found on SC7180
based devices. This would allow modem drivers to probe and
control their clocks.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lkml.kernel.org/r/1584596131-22741-4-git-send-email-tdas@codeaurora.org
Tested-by: Sibi Sankar <sibis@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-03-20 16:28:05 -07:00
Taniya Das
3e5770921a clk: qcom: gcc: Add global clock controller driver for SM8250 
Add the clocks supported in global clock controller, which clock the
peripherals like BLSPs, SDCC, USB, MDSS etc. Register all the clocks
to the clock framework for the clients to be able to request for them.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Signed-off-by: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lkml.kernel.org/r/20200224045003.3783838-6-vkoul@kernel.org
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-03-09 15:14:57 -07:00
Sricharan R
d9db07f088 clk: qcom: Add ipq6018 Global Clock Controller support 
This patch adds support for the global clock controller found on
the ipq6018 based devices.

Also fixed the sparse warnings reported by,
Reported-by: kbuild test robot <lkp@intel.com>
Co-developed-by: Anusha Canchi Ramachandra Rao <anusharao@codeaurora.org>
Signed-off-by: Anusha Canchi Ramachandra Rao <anusharao@codeaurora.org>
Co-developed-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Co-developed-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Link: https://lkml.kernel.org/r/1578557121-423-3-git-send-email-sricharan@codeaurora.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-01-09 12:42:55 -08:00
Taniya Das
253dc75a0b clk: qcom: Add video clock controller driver for SC7180 
Add support for the video clock controller found on SC7180
based devices. This would allow video drivers to probe
and control their clocks.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lkml.kernel.org/r/1577428714-17766-7-git-send-email-tdas@codeaurora.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-01-04 23:25:01 -08:00
Taniya Das
745ff069a4 clk: qcom: Add graphics clock controller driver for SC7180 
Add support for the graphics clock controller found on SC7180
based devices. This would allow graphics drivers to probe and
control their clocks.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lkml.kernel.org/r/1577428714-17766-4-git-send-email-tdas@codeaurora.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2020-01-04 23:25:00 -08:00
Taniya Das
dd3d066221 clk: qcom: Add display clock controller driver for SC7180 
Add support for the display clock controller found on SC7180
based devices. This would allow display drivers to probe and
control their clocks.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lkml.kernel.org/r/1573812245-23827-4-git-send-email-tdas@codeaurora.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2019-12-23 22:30:10 -08:00
Jeffrey Hugo
d14b15b593 clk: qcom: Add MSM8998 Multimedia Clock Controller (MMCC) driver 
Add a driver for the multimedia clock controller found on MSM8998
based devices. This should allow most multimedia device drivers
to probe and control their clocks.

Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lkml.kernel.org/r/1576596033-10189-1-git-send-email-jhugo@codeaurora.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 2019-12-18 21:37:40 -08:00