The qe_issue_cmd() function (Freescale PowerPC QUICC Engine library) polls
on a register until a status bit changes, but does not include a timeout
to handle the situation if the bit never changes. Change the code to use
the new spin_event_timeout() macro, which simplifies polling on a register
without a timeout.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The "EET" variant of the pcm037 board has an OLED display, using a S6E63D6
display controller on the first SPI interface, using GPIO57 as a chip-select
for it. S6E63D6 is initialised in the boot-loader, so we only have to take care
of the LCD. EET also adds several buttons and LEDs on GPIOs. This patch adds a
"pcm037_variant=" kernel command line parameter to specify at boot-time which
board the kernel is running on, default is "pcm970", specify "eet" for the EET
board.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add support for the MT9T031 CMOS camera sensor from Aptina to the PCM037
board. Also add two I2C iomux pin definitions, needed for pcm037. Also
remove now unneeded #ifdef CONFIG_I2C_IMX.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Since recent mxc_nand driver fixes from linux-mtd this patch
add support for ST NAND02GW3B2CN6 (2k pages flash) placed on the armadillo 500
motherboard.
Signed-off-by: Alberto Panizzo <maramaopercheseimorto@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch add support for NOR flash mapping through the physmap driver.
The purpose is to maintain the original Atmark partition model.
Signed-off-by: Alberto Panizzo <maramaopercheseimorto@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Remove the unused CONFIG_DEBUG_S3C_PORT as we currently only have
support for using the S3C UARTs via the low-level debug code.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
CONFIG_S3C24XX_PWM was defined in arch/arm/plat-s3c24xx/Kconfig but
not used anywhere else as the corresponding makefile used
CONFIG_HAVE_PWM (selected by CONFIG_S3C24XX_PWM) to compile the PWM
driver.
Change the makefile to use CONFIG_S3C24XX_PWM to compile this driver
to ensure it is only build when needed.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Some bootloader may initialize debounce register and this will make
dbclk not consist with the debounce register after linux kernel boot
up.
Signed-off-by: janboe <janboe.ye@gmail.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The function flush_iotlb_page is not loading the CAM register with
the correct entry to be flushed, so it is flushing other entry
Signed-off-by: Fernando Guzman Lugo <x0095840@ti.com>
Signed-off-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Use async timings when sync timings are not requested.
Also ensure that OneNAND is in async mode when async
timings are used.
Signed-off-by: Adrian Hunter <adrian.hunter@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The omap_type() function is added and returns the DEVICETYPE field of
the CONTROL_STATUS register. The result can be used for conditional
code based on whether device is GP (general purpose), EMU or
HS (high security). Also move the type defines so omap1 code
compile does not require ifdefs for sections using these defines.
This code is needed for the following fix to set the SRAM
size correctly for HS omaps. Also at least PM and watchdog
code will need this function.
Signed-off-by: Kevin Hilman <khilman@ti.deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
platform_get_irq may return -ENXIO. but struct omap_mbox mbox_dsp_info.irq
is unsigned, so the error was not noticed.
Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
Signed-off-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
twl_mmc23_set_power() has MMC2 twl_mmc_controller hardcoded in it, which
breaks MMC3. Find the right controller to use instead.
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Cc: David Brownell <david-b@pacbell.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Some of the N770's MMC configuration options seem to have been
dropped. This patch adds them back in again.
Note that only the .ocr_mask change was /critical/, but I've added the
.max_freq setting back as well, as the original sources had it. Can
anyone confirm if this is unnecessary?
Secondly, there is support in the original code for a 4wire/higher
speed mode. As I don't have the requisite N770 hardware (I think it
was a rev2 N770?) to test this, I can't really add it back.
Signed-off-by: Andrew de Quincey <adq@lidskialf.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This fixes the positioning of " in MODULE_AUTHOR, which is currently
causing a build failure on latest git with CONFIG_OMAP_MBOX_FWK=m; the
original breakage appears to date from the end of last year in
a5abbbe52b7e89a7633319c5417bd4331f7ac8ed
Signed-Off-By: Jonathan McDowell <noodles@earth.li>
Acked-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
commit dbe6f18691
("dma-mapping: mark dma_sync_single and dma_sync_sg as deprecated"
conveniently broke every single SH build.
In the future it would be great if people could at least bother
figuring out how to use grep.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The init_gbpages() function is conditionally called from
init_memory_mapping() function. There are two call-sites where
this 'after_bootmem' condition can be true: setup_arch() and
mem_init() via pci_iommu_alloc().
Therefore, it's safe to move the call to init_gbpages() to
setup_arch() as it's always called before mem_init().
This removes an after_bootmem use - paving the way to remove
all uses of that state variable.
Signed-off-by: Pekka Enberg <penberg@cs.helsinki.fi>
Acked-by: Yinghai Lu <yinghai@kernel.org>
LKML-Reference: <Pine.LNX.4.64.0906221731210.19474@melkki.cs.Helsinki.FI>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
SH7786 is roughly identical to SH-X3 proto SMP, though there are only 2
CPUs. This just wraps in to the existing SH-X3 SMP code with some minor
changes for SH7786, including wiring up the IPIs properly, enabling
IRQ_PER_CPU, and so forth.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
set_pte_phys() presently uses the global flush_tlb_one(), which locks on
SMP trying to do the IPI. As we have not even initialized the other CPUs
at this point, switch to the local_ variant so the flush happens on the
boot CPU.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Crib the x86 cpu_idle_wait() implementation and shove it in with the
idle code, subsequently enabling ARCH_HAS_CPU_IDLE_WAIT.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Since dmanr is unsigned, negatives are wrapped and caught by the other test.
Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
Acked-by: Jesper Nilsson <jesper.nilsson@axis.com>
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin: (27 commits)
Blackfin: fix dma-mapping build errors
Blackfin: hook up new perf_counter_open syscall
Blackfin: drop BF535-specific text for exception 0x2A (unaligned instruction)
Blackfin: fix early crash when booting on wrong cpu
Blackfin: fix GPTMR0_CLOCKSOURCE dependency on BFIN_GPTIMERS
Blackfin: drop unused ISP1760 port1_disable from board resources
Blackfin: bf526-ezbrd: handle different SDRAM chips
Blackfin: fix typo in TRAS define in mem_init.h header
Blackfin: unify memory map headers
Blackfin: stick the CPU name into boot image name
Blackfin: update defconfigs
Blackfin: decouple unrelated cache settings to get exact behavior
Blackfin: update I-pipe patch level
Blackfin: remove obsolete mcount support from I-pipe code
Blackfin: allow CONFIG_TICKSOURCE_GPTMR0 with interrupt pipeline
Blackfin: convert interrupt pipeline to irqflags
Blackfin: allow people to select BF51x-0.1 silicon rev
Blackfin: bf526-ezbrd: set SPI flash resources to SST device
Blackfin: fix accidental reset in some boot modes
Blackfin: abstract irq14 lowering in do_irq
...
* git://git.infradead.org/~dwmw2/iommu-2.6.31:
intel-iommu: Fix one last ia64 build problem in Pass Through Support
VT-d: support the device IOTLB
VT-d: cleanup iommu_flush_iotlb_psi and flush_unmaps
VT-d: add device IOTLB invalidation support
VT-d: parse ATSR in DMA Remapping Reporting Structure
PCI: handle Virtual Function ATS enabling
PCI: support the ATS capability
intel-iommu: dmar_set_interrupt return error value
intel-iommu: Tidy up iommu->gcmd handling
intel-iommu: Fix tiny theoretical race in write-buffer flush.
intel-iommu: Clean up handling of "caching mode" vs. IOTLB flushing.
intel-iommu: Clean up handling of "caching mode" vs. context flushing.
VT-d: fix invalid domain id for KVM context flush
Fix !CONFIG_DMAR build failure introduced by Intel IOMMU Pass Through Support
Intel IOMMU Pass Through Support
Fix up trivial conflicts in drivers/pci/{intel-iommu.c,intr_remapping.c}
The recent deprecation of dma_sync_{sg,single} ironically broke Blackfin
systems. This is because we don't define dma_sync_sg_for_cpu at all, so
until the DMA asm-generic conversion/cleanup is done after the next
release, simply stub out the dma_sync_sg_for_{cpu,device} functions.
Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
We don't support the BF535 at all, and the exception 0x2A text specific to
it is pretty verbose and confusing (since the behavior is simply odd), so
punt it to keep the noise down.
Signed-off-by: Yi Li <yi.li@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Make sure we process the kernel command line before poking the hardware,
so that we can process early printk. This helps ensure that if you boot
a kernel configured for a different processor, something will be left in
the log buffer.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The GPTMR0_CLOCKSOURCE Kconfig option requires the gptimers framework, so
make sure it is selected when this option is enabled.
Reported-by: Peter Meerwald <pmeerw@pmeerw.net>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The BF526-EZBRD changed SDRAM chips between board revisions, so create a
timing table that can accommodate both.
Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
We defined SDRAM_tRAS to TRAS_4, but then wrongly defined SDRAM_tRAS_num
to 3.
Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Many aspects of the Blackfin memory map is exactly the same across all
variants. Rather than copy and paste all of these duplicated values in
each header, unify all of these into the common Blackfin memory map header
file. In the process, push down BF561 SMP specific stuff to the BF561
specific header to keep the noise down.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Rather than use "Linux" in the boot image name (as this is redundant --
the image type is already set to "linux"), use the CPU name. This makes
it fairly obvious when a wrong image is accidentally booted. Otherwise
there is no kernel output and you waste time scratching your head
wondering wtf just happened.
Signed-off-by: Robin Getz <rgetz@blackfin.uclinux.org>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The current cache options don't really represent the hardware features.
They end up setting different aspects of the hardware so that the end
result is to turn on/off the cache. Unfortunately, when we hit cache
problems with the hardware, it's difficult to test different settings to
root cause the problem. The current settings also don't cleanly allow for
different caching behaviors with different regions of memory.
So split the configure options such that they properly reflect the settings
that are applied to the hardware.
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The BF526-EZBRD has a SST SPI flash on it, not a ST Micro.
Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
We read the SWRST (Software Reset) register to get at the last reset
state, and then we may configure the DOUBLE_FAULT bit to control behavior
when a double fault occurs. But if the lower bits of the register is
already set (like UART boot mode on a BF54x), we inadvertently make the
system reset by writing to the SYSTEM_RESET field at the same time. So
make sure the lower 4 bits are always cleared.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Split out the optional IRQ14 lowering code to further simplify the
asm_do_IRQ() function and keep the ifdef nest under control.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
