Chris Wilson 18393f6322 drm/i915: Replace hardcoded cacheline size with macro ...

For readibility and guess at the meaning behind the constants.

v2: Claim only the meagerest connections with reality.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Oscar Mateo <oscar.mateo@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

2014-05-05 09:08:36 +02:00

..

drm

drm/i915: Replace hardcoded cacheline size with macro

2014-05-05 09:08:36 +02:00

host1x

gpu: host1x: handle the correct # of syncpt regs

2014-04-16 17:11:04 +02:00

vga

vgaarb: Fix VGA decodes changes

2013-09-03 19:17:59 +02:00

Makefile

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