Chris Wilson
1cf84bb6ae
drm/i915: Whitespace alignment fix for block header in display error state
The current output looks like:
Num Pipes: 2
Pipe [0]:
SRC: 027f01df
Plane [0]:
CNTR: d9000000
STRIDE: 00001400
SIZE: 031f04ff
POS: 00000000
ADDR: 00020000
Cursor [0]:
CNTR: 00000000
POS: 00000000
BASE: 00000000
Pipe [1]:
SRC: 04ff031f
Plane [1]:
CNTR: 01000000
STRIDE: 00000000
SIZE: 018f02cf
POS: 00000000
ADDR: 00000000
Cursor [1]:
CNTR: 00000000
POS: 00000000
BASE: 00000000
CPU transcoder: A
CONF: 00000000
HTOTAL: 031f027f
HBLANK: 03170287
HSYNC: 02ef028f
VTOTAL: 020c01df
VBLANK: 020401e7
VSYNC: 01eb01e9
CPU transcoder: B
CONF: 80000000
HTOTAL: 059f04ff
HBLANK: 059f04ff
HSYNC: 054f052f
VTOTAL: 0336031f
VBLANK: 0336031f
VSYNC: 03280322
which lacks the important visual clue to demarque the transcoder blocks
from the last cursor.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-21 11:00:40 +02:00
..
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