7e38085d9c
The SBI PMU extension requires a firmware to be aware of the event to counter/mhpmevent mappings supported by the hardware. OpenSBI may use DeviceTree to describe the PMU mappings. This binding is currently described in markdown in OpenSBI (since v1.0 in Dec 2021) & used by QEMU since v7.2.0. Import the binding for use while validating dtb dumps from QEMU and upcoming hardware (eg JH7110 SoC) that will make use of the event mapping. Link: https://github.com/riscv-software-src/opensbi/blob/master/docs/pmu_support.md Link: https://github.com/riscv-non-isa/riscv-sbi-doc/blob/master/riscv-sbi.adoc # Performance Monitoring Unit Extension Co-developed-by: Atish Patra <atishp@rivosinc.com> Signed-off-by: Atish Patra <atishp@rivosinc.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230113205435.122712-1-conor@kernel.org Signed-off-by: Rob Herring <robh@kernel.org> |
||
|---|---|---|
| .. | ||
| amlogic,g12-ddr-pmu.yaml | ||
| apm-xgene-pmu.txt | ||
| arm,ccn.yaml | ||
| arm,cmn.yaml | ||
| arm,dsu-pmu.yaml | ||
| arm,smmu-v3-pmcg.yaml | ||
| fsl-imx-ddr.yaml | ||
| marvell-cn10k-ddr.yaml | ||
| marvell-cn10k-tad.yaml | ||
| riscv,pmu.yaml | ||
| spe-pmu.yaml | ||