Rick Chen
35dbb74aa7
clocksource/drivers/atcpit100: Add andestech atcpit100 timer
...
ATCPIT100 is often used on the Andes architecture,
This timer provide 4 PIT channels. Each PIT channel is a
multi-function timer, can be configured as 32,16,8 bit timers
or PWM as well.
For system timer it will set channel 1 32-bit timer0 as clock
source and count downwards until underflow and restart again.
It also set channel 0 32-bit timer0 as clock event and count
downwards until condition match. It will generate an interrupt
for handling periodically.
Signed-off-by: Rick Chen <rickchen36@gmail.com >
Signed-off-by: Greentime Hu <green.hu@gmail.com >
Reviewed-by: Linus Walleij <linus.walleij@linaro.org >
Add andestech atcpit100 timer
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