1873da264c
For MT8195, VPPSYS0 and VPPSYS1 are 2 display pipes with hardware differences in power domains, clocks and subsystem counts, which should be determined by compatible names. Signed-off-by: Moudy Ho <moudy.ho@mediatek.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230118031509.29834-3-moudy.ho@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>