3a87177eb1
Generate and parse VCRAT tables for dGPUs in kfd_topology_add_device. Some information that isn't available in the CRAT table is patched into the topology after parsing. HSA_CAP_DOORBELL_TYPE_1_0 is dependent on the ASIC feature CP_HQD_PQ_CONTROL.SLOT_BASED_WPTR, which was not introduced in VI until Carrizo. Report HSA_CAP_DOORBELL_TYPE_PRE_1_0 on Tonga ASICs. v2: Added #include <linux/pci.h> to kfd_crat.c to make it compile Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Signed-off-by: Ben Goz <ben.goz@amd.com> Signed-off-by: Amber Lin <Amber.Lin@amd.com> Signed-off-by: Jay Cornwall <Jay.Cornwall@amd.com> Signed-off-by: Kent Russell <kent.russell@amd.com> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Acked-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com> |
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| host1x | ||
| ipu-v3 | ||
| vga | ||
| Makefile | ||