f2aeea5750
When a guest PEBS counter is cross-mapped by a host counter, software
will remove the corresponding bit in the arr[global_ctrl].guest and
expect hardware to perform a change of state "from enable to disable"
via the msr_slot[] switch during the vmx transaction.
The real world is that if user adjust the counter overflow value small
enough, it still opens a tiny race window for the previously PEBS-enabled
counter to write cross-mapped PEBS records into the guest's PEBS buffer,
when arr[global_ctrl].guest has been prioritised (switch_msr_special stuff)
to switch into the enabled state, while the arr[pebs_enable].guest has not.
Close this window by clearing invalid bits in the arr[global_ctrl].guest.
Fixes:
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| .. | ||
| Makefile | ||
| bts.c | ||
| core.c | ||
| cstate.c | ||
| ds.c | ||
| knc.c | ||
| lbr.c | ||
| p4.c | ||
| p6.c | ||
| pt.c | ||
| pt.h | ||
| uncore.c | ||
| uncore.h | ||
| uncore_discovery.c | ||
| uncore_discovery.h | ||
| uncore_nhmex.c | ||
| uncore_snb.c | ||
| uncore_snbep.c | ||