c1f39c62eb
Document support for the I2C Bus Interface (RIIC) available in the Renesas RZ/V2H(P) (R9A09G057) SoC. The RIIC interface in the Renesas RZ/V2H(P) differs from RZ/A in a couple of ways: - Register offsets for the RZ/V2H(P) SoC differ from those of the RZ/A SoC. - RZ/V2H register access is limited to 8-bit, whereas RZ/A supports 8/16/32-bit. - RZ/V2H has bit differences in the slave address register. To accommodate these differences, a new compatible string "renesas,riic-r9a09g057" is added. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Andi Shyti <andi.shyti@kernel.org>