Tong Liu01 4864f2ee9e drm/amdgpu: add vram reservation based on vram_usagebyfirmware_v2_2 ...

Move TMR region from top of FB to 2MB for FFBM, so we need to
reserve TMR region firstly to make sure TMR can be allocated at 2MB

Signed-off-by: Tong Liu01 <Tong.Liu01@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2022-11-10 15:29:40 -05:00

..

asic_reg

drm/amdgpu: Update umc v8_10_0 headers

2022-10-11 11:05:35 -04:00

ivsrcid

drm/amdgpu/vcn: Add vcn ras poison consumption event handling

2022-05-10 17:53:13 -04:00

aldebaran_ip_offset.h

drm/amd/include/aldebaran_ip_offset: Mark top-level IP_BASE as __maybe_unused

2021-05-21 10:32:16 -04:00

amd_acpi.h

drm/amdgpu: support atcs method powershift (v4)

2021-06-01 22:36:48 -04:00

amd_pcie_helpers.h

…

amd_pcie.h

drm/amdgpu:Add pcie gen5 support in pcie capability.

2021-01-21 09:54:56 -05:00

amd_shared.h

drm/amd/display: Add dcdebugmask option for disabling MPO

2022-07-25 09:31:03 -04:00

arct_ip_offset.h

drm/amd/include/arct_ip_offset: Mark top-level IP_BASE definition as __maybe_unused

2020-11-24 12:09:53 -05:00

atom-bits.h

…

atom-names.h

…

atom-types.h

…

atombios.h

drm/amdgpu: Replace 1-element array with flexible-array member

2022-11-09 17:41:42 -05:00

atomfirmware.h

drm/amdgpu: add vram reservation based on vram_usagebyfirmware_v2_2

2022-11-10 15:29:40 -05:00

atomfirmwareid.h

…

beige_goby_ip_offset.h

drm/amd/amdgpu: initialize IP offset for beige_goby

2021-05-19 22:40:09 -04:00

cgs_common.h

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cik_structs.h

…

cyan_skillfish_ip_offset.h

drm/amd: Mark IP_BASE definition as __maybe_unused

2021-12-13 16:32:34 -05:00

dimgrey_cavefish_ip_offset.h

drm/amd/include/dimgrey_cavefish_ip_offset: Mark top-level IP_BASE as __maybe_unused

2020-11-24 12:09:53 -05:00

discovery.h

drm/amdgpu: update latest IP discovery table structures

2022-04-28 17:46:31 -04:00

displayobject.h

…

dm_pp_interface.h

…

kgd_kfd_interface.h

drm/amdkfd: Fix type of reset_type parameter in hqd_destroy() callback

2022-10-17 17:41:21 -04:00

kgd_pp_interface.h

drm/amdgpu: Fix type of second parameter in odn_edit_dpm_table() callback

2022-11-04 16:05:53 -04:00

mes_api_def.h

drm/amd: Fix spelling typo in comments

2022-06-03 16:43:36 -04:00

mes_v11_api_def.h

drm/amdgpu: pass queue size and is_aql_queue to MES

2022-09-29 09:41:44 -04:00

navi10_enum.h

drm/amdgpu: Update NV SIMD-per-CU to 2

2021-07-01 00:05:18 -04:00

navi10_ip_offset.h

drm/amd/include/navi10_ip_offset: Mark top-level IP_BASE as __maybe_unused

2020-11-24 12:09:53 -05:00

navi12_ip_offset.h

drm/amd/include/navi12_ip_offset: Mark top-level IP_BASE as __maybe_unused

2020-11-24 12:09:53 -05:00

navi14_ip_offset.h

drm/amd/include/navi14_ip_offset: Mark top-level IP_BASE as __maybe_unused

2020-11-24 12:09:53 -05:00

pptable.h

…

renoir_ip_offset.h

drm/amd/include/renoir_ip_offset: Mark top-level IP_BASE as __maybe_unused

2021-01-14 13:20:20 -05:00

sienna_cichlid_ip_offset.h

drm/amd/include/sienna_cichlid_ip_offset: Mark top-level IP_BASE as __maybe_unused

2020-11-24 12:09:53 -05:00

soc15_hw_ip.h

drm/amdgpu: add lsdma block

2022-05-10 17:53:11 -04:00

soc15_ih_clientid.h

drm/amdgpu: add soc21 ih clientid definition

2022-05-04 09:52:59 -04:00

soc21_enum.h

drm/amdgpu: add soc21 chip enum header v8

2022-05-04 10:02:18 -04:00

v9_structs.h

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v10_structs.h

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v11_structs.h

drm/amdgpu: add gfx11 mqd structures

2022-05-04 10:02:27 -04:00

vangogh_ip_offset.h

drm/amd/include/vangogh_ip_offset: Mark top-level IP_BASE as __maybe_unused

2020-11-24 12:09:53 -05:00

vega10_enum.h

…

vega10_ip_offset.h

drm/amd/include/vega10_ip_offset: Mark _BASE structs as __maybe_unused

2020-11-13 17:29:46 -05:00

vega20_ip_offset.h

drm/amd/include/vega20_ip_offset: Mark top-level IP_BASE definition as __maybe_unused

2020-11-24 12:09:53 -05:00

vi_structs.h

drm/amdkfd: Check HIQ's MQD for queue preemption status

2021-03-23 22:59:25 -04:00

yellow_carp_offset.h

drm/amd: Mark IP_BASE definition as __maybe_unused

2021-12-13 16:32:34 -05:00