Files
linux/drivers/clk
Gabriel Fernandez 844ca23f5b clk: stm32f4: SDIO & 48Mhz clock management for STM32F469 board
In the stm32f469 soc, the 48Mhz clock could be derived from pll-q or
from pll-sai-p.

The SDIO clock could be also derived from 48Mhz or from sys clock.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-12-21 16:09:12 -08:00
..
2016-07-12 11:24:07 +02:00
2016-12-08 16:29:36 -08:00
2016-11-09 12:05:50 -08:00
2016-10-23 10:18:45 -07:00