linux/drivers/gpu/drm/amd/display/modules
Robin Chen c84ff24a77 drm/amd/display: Pass DSC slice height to PSR FW
[Why]
When DSC is enabled, the PSRSU seletive update region
must be multiple number of DSC slice height number.
The original solution is to overwrite the SU Y granularity
by DSC slice height in DAL driver. However, the size
of the SU Y granularity variable only has 8 bytes
and the DSC slice height may over the 8 bytes size.

[How]
Instead of overwriting the SU Y granularity value,
add a new DSC slice height pararmeter and pass it
to DMUB PSRSU FW. The PSRSU FW will refer to the
DSC slice height value and extend the SU region.

Reviewed-by: Dennis Chan <dennis.chan@amd.com>
Reviewed-by: ChunTao Tso <chuntao.tso@amd.com>
Acked-by: Alan Liu <HaoPing.Liu@amd.com>
Signed-off-by: Robin Chen <robin.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-01-24 13:26:25 -05:00
..
color drm/amd/display: Update 709 gamma to 2.222 as stated in the standerd 2022-11-09 17:24:40 -05:00
freesync drm/amd/display: set active bit for desktop with VSDBv3 2023-01-17 15:39:58 -05:00
hdcp drm/amd/display: update topology_update_input_v3 struct 2022-06-14 21:38:40 -04:00
inc drm/amd/display: Enable AdaptiveSync in DC interface 2023-01-24 13:26:25 -05:00
info_packet drm/amd/display: Enable AdaptiveSync in DC interface 2023-01-24 13:26:25 -05:00
power drm/amd/display: Pass DSC slice height to PSR FW 2023-01-24 13:26:25 -05:00
vmid drm/amd: Fix spelling typo in comments 2022-06-03 16:43:36 -04:00