Pull drm updates from Dave Airlie:
"Highlights are usual, more AMD IP blocks for future hw, i915/xe
changes, Displayport tunnelling support for i915, msm YUV over DP
changes, new tests for ttm, but its mostly a lot of stuff all over the
place from lots of people.
core:
- EDID cleanups
- scheduler error handling fixes
- managed: add drmm_release_action() with tests
- add ratelimited drm debug print
- DPCD PSR early transport macro
- DP tunneling and bandwidth allocation helpers
- remove built-in edids
- dp: Avoid AUX transfers on powered-down displays
- dp: Add VSC SDP helpers
cross drivers:
- use new drm print helpers
- switch to ->read_edid callback
- gem: add stats for shared buffers plus updates to amdgpu, i915, xe
syncobj:
- fixes to waiting and sleeping
ttm:
- add tests
- fix errno codes
- simply busy-placement handling
- fix page decryption
media:
- tc358743: fix v4l device registration
video:
- move all kernel parameters for video behind CONFIG_VIDEO
sound:
- remove <drm/drm_edid.h> include from header
ci:
- add tests for msm
- fix apq8016 runner
efifb:
- use copy of global screen_info state
vesafb:
- use copy of global screen_info state
simplefb:
- fix logging
bridge:
- ite-6505: fix DP link-training bug
- samsung-dsim: fix error checking in probe
- samsung-dsim: add bsh-smm-s2/pro boards
- tc358767: fix regmap usage
- imx: add i.MX8MP HDMI PVI plus DT bindings
- imx: add i.MX8MP HDMI TX plus DT bindings
- sii902x: fix probing and unregistration
- tc358767: limit pixel PLL input range
- switch to new drm_bridge_read_edid() interface
panel:
- ltk050h3146w: error-handling fixes
- panel-edp: support delay between power-on and enable; use put_sync
in unprepare; support Mediatek MT8173 Chromebooks, BOE NV116WHM-N49
V8.0, BOE NV122WUM-N41, CSO MNC207QS1-1 plus DT bindings
- panel-lvds: support EDT ETML0700Z9NDHA plus DT bindings
- panel-novatek: FRIDA FRD400B25025-A-CTK plus DT bindings
- add BOE TH101MB31IG002-28A plus DT bindings
- add EDT ETML1010G3DRA plus DT bindings
- add Novatek NT36672E LCD DSI plus DT bindings
- nt36523: support 120Hz timings, fix includes
- simple: fix display timings on RK32FN48H
- visionox-vtdr6130: fix initialization
- add Powkiddy RGB10MAX3 plus DT bindings
- st7703: support panel rotation plus DT bindings
- add Himax HX83112A plus DT bindings
- ltk500hd1829: add support for ltk101b4029w and admatec 9904370
- simple: add BOE BP082WX1-100 8.2" panel plus DT bindungs
panel-orientation-quirks:
- GPD Win Mini
amdgpu:
- Validate DMABuf imports in compute VMs
- Add RAS ACA framework
- PSP 13 fixes
- Misc code cleanups
- Replay fixes
- Atom interpretor PS, WS bounds checking
- DML2 fixes
- Audio fixes
- DCN 3.5 Z state fixes
- Remove deprecated ida_simple usage
- UBSAN fixes
- RAS fixes
- Enable seq64 infrastructure
- DC color block enablement
- Documentation updates
- DC documentation updates
- DMCUB updates
- ATHUB 4.1 support
- LSDMA 7.0 support
- JPEG DPG support
- IH 7.0 support
- HDP 7.0 support
- VCN 5.0 support
- SMU 13.0.6 updates
- NBIO 7.11 updates
- SDMA 6.1 updates
- MMHUB 3.3 updates
- DCN 3.5.1 support
- NBIF 6.3.1 support
- VPE 6.1.1 support
amdkfd:
- Validate DMABuf imports in compute VMs
- SVM fixes
- Trap handler updates and enhancements
- Fix cache size reporting
- Relocate the trap handler
radeon:
- Atom interpretor PS, WS bounds checking
- Misc code cleanups
xe:
- new query for GuC submission version
- Remove unused persistent exec_queues
- Add vram frequency sysfs attributes
- Add the flag XE_VM_BIND_FLAG_DUMPABLE
- Drop pre-production workarounds
- Drop kunit tests for unsupported platforms
- Start pumbling SR-IOV support with memory based interrupts for VF
- Allow to map BO in GGTT with PAT index corresponding to XE_CACHE_UC
to work with memory based interrupts
- Add GuC Doorbells Manager as prep work SR-IOV
- Implement additional workarounds for xe2 and MTL
- Program a few registers according to perfomance guide spec for Xe2
- Fix remaining 32b build issues and enable it back
- Fix build with CONFIG_DEBUG_FS=n
- Fix warnings from GuC ABI headers
- Introduce Relay Communication for SR-IOV for VF <-> GuC <-> PF
- Release mmap mappings on rpm suspend
- Disable mid-thread preemption when not properly supported by
hardware
- Fix xe_exec by reserving extra fence slot for CPU bind
- Fix xe_exec with full long running exec queue
- Canonicalize addresses where needed for Xe2 and add to devcoredum
- Toggle USM support for Xe2
- Only allow 1 ufence per exec / bind IOCTL
- Add GuC firmware loading for Lunar Lake
- Add XE_VMA_PTE_64K VMA flag
i915:
- Add more ADL-N PCI IDs
- Enable fastboot also on older platforms
- Early transport for panel replay and PSR
- New ARL PCI IDs
- DP TPS4 PHY test pattern support
- Unify and improve VSC SDP for PSR and non-PSR cases
- Refactor memory regions and improve debug logging
- Rework global state serialization
- Remove unused CDCLK divider fields
- Unify HDCP connector logging format
- Use display instead of graphics version in display code
- Move VBT and opregion debugfs next to the implementation
- Abstract opregion interface, use opaque type
- MTL fixes
- HPD handling fixes
- Add GuC submission interface version query
- Atomically invalidate userptr on mmu-notifier
- Update handling of MMIO triggered reports
- Don't make assumptions about intel_wakeref_t type
- Extend driver code of Xe_LPG to Xe_LPG+
- Add flex arrays to struct i915_syncmap
- Allow for very slow HuC loading
- DP tunneling and bandwidth allocation support
msm:
- Correct bindings for MSM8976 and SM8650 platforms
- Start migration of MDP5 platforms to DPU driver
- X1E80100 MDSS support
- DPU:
- Improve DSC allocation, fixing several important corner cases
- Add support for SDM630/SDM660 platforms
- Simplify dpu_encoder_phys_ops
- Apply fixes targeting DSC support with a single DSC encoder
- Apply fixes for HCTL_EN timing configuration
- X1E80100 support
- Add support for YUV420 over DP
- GPU:
- fix sc7180 UBWC config
- fix a7xx LLC config
- new gpu support: a305B, a750, a702
- machine support: SM7150 (different power levels than other a618)
- a7xx devcoredump support
habanalabs:
- configure IRQ affinity according to NUMA node
- move HBM MMU page tables inside the HBM
- improve device reset
- check extended PCIe errors
ivpu:
- updates to firmware API
- refactor BO allocation
imx:
- use devm_ functions during init
hisilicon:
- fix EDID includes
mgag200:
- improve ioremap usage
- convert to struct drm_edid
- Work around PCI write bursts
nouveau:
- disp: use kmemdup()
- fix EDID includes
- documentation fixes
qaic:
- fixes to BO handling
- make use of DRM managed release
- fix order of remove operations
rockchip:
- analogix_dp: get encoder port from DT
- inno_hdmi: support HDMI for RK3128
- lvds: error-handling fixes
ssd130x:
- support SSD133x plus DT bindings
tegra:
- fix error handling
tilcdc:
- make use of DRM managed release
v3d:
- show memory stats in debugfs
- Support display MMU page size
vc4:
- fix error handling in plane prepare_fb
- fix framebuffer test in plane helpers
virtio:
- add venus capset defines
vkms:
- fix OOB access when programming the LUT
- Kconfig improvements
vmwgfx:
- unmap surface before changing plane state
- fix memory leak in error handling
- documentation fixes
- list command SVGA_3D_CMD_DEFINE_GB_SURFACE_V4 as invalid
- fix null-pointer deref in execbuf
- refactor display-mode probing
- fix fencing for creating cursor MOBs
- fix cursor-memory lifetime
xlnx:
- fix live video input for ZynqMP DPSUB
lima:
- fix memory leak
loongson:
- fail if no VRAM present
meson:
- switch to new drm_bridge_read_edid() interface
renesas:
- add RZ/G2L DU support plus DT bindings
mxsfb:
- Use managed mode config
sun4i:
- HDMI: updates to atomic mode setting
mediatek:
- Add display driver for MT8188 VDOSYS1
- DSI driver cleanups
- Filter modes according to hardware capability
- Fix a null pointer crash in mtk_drm_crtc_finish_page_flip
etnaviv:
- enhancements for NPU and MRT support"
* tag 'drm-next-2024-03-13' of https://gitlab.freedesktop.org/drm/kernel: (1420 commits)
drm/amd/display: Removed redundant @ symbol to fix kernel-doc warnings in -next repo
drm/amd/pm: wait for completion of the EnableGfxImu message
drm/amdgpu/soc21: add mode2 asic reset for SMU IP v14.0.1
drm/amdgpu: add smu 14.0.1 support
drm/amdgpu: add VPE 6.1.1 discovery support
drm/amdgpu/vpe: add VPE 6.1.1 support
drm/amdgpu/vpe: don't emit cond exec command under collaborate mode
drm/amdgpu/vpe: add collaborate mode support for VPE
drm/amdgpu/vpe: add PRED_EXE and COLLAB_SYNC OPCODE
drm/amdgpu/vpe: add multi instance VPE support
drm/amdgpu/discovery: add nbif v6_3_1 ip block
drm/amdgpu: Add nbif v6_3_1 ip block support
drm/amdgpu: Add pcie v6_1_0 ip headers (v5)
drm/amdgpu: Add nbif v6_3_1 ip headers (v5)
arch/powerpc: Remove <linux/fb.h> from backlight code
macintosh/via-pmu-backlight: Include <linux/backlight.h>
fbdev/chipsfb: Include <linux/backlight.h>
drm/etnaviv: Restore some id values
drm/amdkfd: make kfd_class constant
drm/amdgpu: add ring timeout information in devcoredump
...
430 lines
10 KiB
C
430 lines
10 KiB
C
// SPDX-License-Identifier: MIT
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/*
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* Copyright © 2022 Intel Corporation
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*/
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#include "xe_pm.h"
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#include <linux/pm_runtime.h>
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#include <drm/drm_managed.h>
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#include <drm/ttm/ttm_placement.h>
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#include "display/xe_display.h"
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#include "xe_bo.h"
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#include "xe_bo_evict.h"
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#include "xe_device.h"
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#include "xe_device_sysfs.h"
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#include "xe_ggtt.h"
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#include "xe_gt.h"
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#include "xe_guc.h"
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#include "xe_irq.h"
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#include "xe_pcode.h"
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#include "xe_wa.h"
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/**
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* DOC: Xe Power Management
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*
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* Xe PM shall be guided by the simplicity.
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* Use the simplest hook options whenever possible.
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* Let's not reinvent the runtime_pm references and hooks.
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* Shall have a clear separation of display and gt underneath this component.
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*
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* What's next:
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*
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* For now s2idle and s3 are only working in integrated devices. The next step
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* is to iterate through all VRAM's BO backing them up into the system memory
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* before allowing the system suspend.
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*
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* Also runtime_pm needs to be here from the beginning.
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*
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* RC6/RPS are also critical PM features. Let's start with GuCRC and GuC SLPC
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* and no wait boost. Frequency optimizations should come on a next stage.
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*/
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/**
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* xe_pm_suspend - Helper for System suspend, i.e. S0->S3 / S0->S2idle
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* @xe: xe device instance
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*
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* Return: 0 on success
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*/
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int xe_pm_suspend(struct xe_device *xe)
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{
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struct xe_gt *gt;
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u8 id;
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int err;
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for_each_gt(gt, xe, id)
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xe_gt_suspend_prepare(gt);
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/* FIXME: Super racey... */
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err = xe_bo_evict_all(xe);
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if (err)
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return err;
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xe_display_pm_suspend(xe);
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for_each_gt(gt, xe, id) {
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err = xe_gt_suspend(gt);
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if (err) {
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xe_display_pm_resume(xe);
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return err;
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}
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}
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xe_irq_suspend(xe);
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xe_display_pm_suspend_late(xe);
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return 0;
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}
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/**
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* xe_pm_resume - Helper for System resume S3->S0 / S2idle->S0
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* @xe: xe device instance
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*
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* Return: 0 on success
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*/
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int xe_pm_resume(struct xe_device *xe)
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{
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struct xe_tile *tile;
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struct xe_gt *gt;
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u8 id;
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int err;
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for_each_tile(tile, xe, id)
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xe_wa_apply_tile_workarounds(tile);
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for_each_gt(gt, xe, id) {
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err = xe_pcode_init(gt);
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if (err)
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return err;
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}
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xe_display_pm_resume_early(xe);
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/*
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* This only restores pinned memory which is the memory required for the
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* GT(s) to resume.
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*/
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err = xe_bo_restore_kernel(xe);
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if (err)
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return err;
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xe_irq_resume(xe);
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xe_display_pm_resume(xe);
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for_each_gt(gt, xe, id)
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xe_gt_resume(gt);
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err = xe_bo_restore_user(xe);
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if (err)
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return err;
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return 0;
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}
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static bool xe_pm_pci_d3cold_capable(struct xe_device *xe)
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{
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struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
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struct pci_dev *root_pdev;
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root_pdev = pcie_find_root_port(pdev);
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if (!root_pdev)
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return false;
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/* D3Cold requires PME capability */
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if (!pci_pme_capable(root_pdev, PCI_D3cold)) {
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drm_dbg(&xe->drm, "d3cold: PME# not supported\n");
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return false;
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}
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/* D3Cold requires _PR3 power resource */
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if (!pci_pr3_present(root_pdev)) {
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drm_dbg(&xe->drm, "d3cold: ACPI _PR3 not present\n");
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return false;
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}
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return true;
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}
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static void xe_pm_runtime_init(struct xe_device *xe)
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{
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struct device *dev = xe->drm.dev;
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/*
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* Disable the system suspend direct complete optimization.
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* We need to ensure that the regular device suspend/resume functions
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* are called since our runtime_pm cannot guarantee local memory
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* eviction for d3cold.
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* TODO: Check HDA audio dependencies claimed by i915, and then enforce
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* this option to integrated graphics as well.
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*/
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if (IS_DGFX(xe))
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dev_pm_set_driver_flags(dev, DPM_FLAG_NO_DIRECT_COMPLETE);
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pm_runtime_use_autosuspend(dev);
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pm_runtime_set_autosuspend_delay(dev, 1000);
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pm_runtime_set_active(dev);
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pm_runtime_allow(dev);
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pm_runtime_mark_last_busy(dev);
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pm_runtime_put(dev);
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}
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void xe_pm_init_early(struct xe_device *xe)
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{
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INIT_LIST_HEAD(&xe->mem_access.vram_userfault.list);
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drmm_mutex_init(&xe->drm, &xe->mem_access.vram_userfault.lock);
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}
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void xe_pm_init(struct xe_device *xe)
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{
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/* For now suspend/resume is only allowed with GuC */
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if (!xe_device_uc_enabled(xe))
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return;
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drmm_mutex_init(&xe->drm, &xe->d3cold.lock);
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xe->d3cold.capable = xe_pm_pci_d3cold_capable(xe);
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if (xe->d3cold.capable) {
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xe_device_sysfs_init(xe);
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xe_pm_set_vram_threshold(xe, DEFAULT_VRAM_THRESHOLD);
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}
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xe_pm_runtime_init(xe);
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}
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void xe_pm_runtime_fini(struct xe_device *xe)
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{
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struct device *dev = xe->drm.dev;
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pm_runtime_get_sync(dev);
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pm_runtime_forbid(dev);
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}
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static void xe_pm_write_callback_task(struct xe_device *xe,
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struct task_struct *task)
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{
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WRITE_ONCE(xe->pm_callback_task, task);
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/*
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* Just in case it's somehow possible for our writes to be reordered to
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* the extent that something else re-uses the task written in
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* pm_callback_task. For example after returning from the callback, but
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* before the reordered write that resets pm_callback_task back to NULL.
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*/
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smp_mb(); /* pairs with xe_pm_read_callback_task */
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}
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struct task_struct *xe_pm_read_callback_task(struct xe_device *xe)
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{
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smp_mb(); /* pairs with xe_pm_write_callback_task */
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return READ_ONCE(xe->pm_callback_task);
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}
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int xe_pm_runtime_suspend(struct xe_device *xe)
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{
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struct xe_bo *bo, *on;
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struct xe_gt *gt;
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u8 id;
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int err = 0;
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if (xe->d3cold.allowed && xe_device_mem_access_ongoing(xe))
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return -EBUSY;
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/* Disable access_ongoing asserts and prevent recursive pm calls */
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xe_pm_write_callback_task(xe, current);
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/*
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* The actual xe_device_mem_access_put() is always async underneath, so
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* exactly where that is called should makes no difference to us. However
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* we still need to be very careful with the locks that this callback
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* acquires and the locks that are acquired and held by any callers of
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* xe_device_mem_access_get(). We already have the matching annotation
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* on that side, but we also need it here. For example lockdep should be
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* able to tell us if the following scenario is in theory possible:
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*
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* CPU0 | CPU1 (kworker)
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* lock(A) |
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* | xe_pm_runtime_suspend()
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* | lock(A)
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* xe_device_mem_access_get() |
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*
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* This will clearly deadlock since rpm core needs to wait for
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* xe_pm_runtime_suspend() to complete, but here we are holding lock(A)
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* on CPU0 which prevents CPU1 making forward progress. With the
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* annotation here and in xe_device_mem_access_get() lockdep will see
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* the potential lock inversion and give us a nice splat.
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*/
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lock_map_acquire(&xe_device_mem_access_lockdep_map);
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/*
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* Applying lock for entire list op as xe_ttm_bo_destroy and xe_bo_move_notify
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* also checks and delets bo entry from user fault list.
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*/
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mutex_lock(&xe->mem_access.vram_userfault.lock);
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list_for_each_entry_safe(bo, on,
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&xe->mem_access.vram_userfault.list, vram_userfault_link)
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xe_bo_runtime_pm_release_mmap_offset(bo);
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mutex_unlock(&xe->mem_access.vram_userfault.lock);
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if (xe->d3cold.allowed) {
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err = xe_bo_evict_all(xe);
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if (err)
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goto out;
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}
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for_each_gt(gt, xe, id) {
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err = xe_gt_suspend(gt);
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if (err)
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goto out;
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}
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xe_irq_suspend(xe);
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out:
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lock_map_release(&xe_device_mem_access_lockdep_map);
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xe_pm_write_callback_task(xe, NULL);
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return err;
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}
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int xe_pm_runtime_resume(struct xe_device *xe)
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{
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struct xe_gt *gt;
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u8 id;
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int err = 0;
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/* Disable access_ongoing asserts and prevent recursive pm calls */
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xe_pm_write_callback_task(xe, current);
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lock_map_acquire(&xe_device_mem_access_lockdep_map);
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/*
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* It can be possible that xe has allowed d3cold but other pcie devices
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* in gfx card soc would have blocked d3cold, therefore card has not
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* really lost power. Detecting primary Gt power is sufficient.
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*/
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gt = xe_device_get_gt(xe, 0);
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xe->d3cold.power_lost = xe_guc_in_reset(>->uc.guc);
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if (xe->d3cold.allowed && xe->d3cold.power_lost) {
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for_each_gt(gt, xe, id) {
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err = xe_pcode_init(gt);
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if (err)
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goto out;
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}
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/*
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* This only restores pinned memory which is the memory
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* required for the GT(s) to resume.
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*/
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err = xe_bo_restore_kernel(xe);
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if (err)
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goto out;
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}
|
|
|
|
xe_irq_resume(xe);
|
|
|
|
for_each_gt(gt, xe, id)
|
|
xe_gt_resume(gt);
|
|
|
|
if (xe->d3cold.allowed && xe->d3cold.power_lost) {
|
|
err = xe_bo_restore_user(xe);
|
|
if (err)
|
|
goto out;
|
|
}
|
|
out:
|
|
lock_map_release(&xe_device_mem_access_lockdep_map);
|
|
xe_pm_write_callback_task(xe, NULL);
|
|
return err;
|
|
}
|
|
|
|
int xe_pm_runtime_get(struct xe_device *xe)
|
|
{
|
|
return pm_runtime_get_sync(xe->drm.dev);
|
|
}
|
|
|
|
int xe_pm_runtime_put(struct xe_device *xe)
|
|
{
|
|
pm_runtime_mark_last_busy(xe->drm.dev);
|
|
return pm_runtime_put(xe->drm.dev);
|
|
}
|
|
|
|
int xe_pm_runtime_get_if_active(struct xe_device *xe)
|
|
{
|
|
return pm_runtime_get_if_active(xe->drm.dev);
|
|
}
|
|
|
|
void xe_pm_assert_unbounded_bridge(struct xe_device *xe)
|
|
{
|
|
struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
|
|
struct pci_dev *bridge = pci_upstream_bridge(pdev);
|
|
|
|
if (!bridge)
|
|
return;
|
|
|
|
if (!bridge->driver) {
|
|
drm_warn(&xe->drm, "unbounded parent pci bridge, device won't support any PM support.\n");
|
|
device_set_pm_not_required(&pdev->dev);
|
|
}
|
|
}
|
|
|
|
int xe_pm_set_vram_threshold(struct xe_device *xe, u32 threshold)
|
|
{
|
|
struct ttm_resource_manager *man;
|
|
u32 vram_total_mb = 0;
|
|
int i;
|
|
|
|
for (i = XE_PL_VRAM0; i <= XE_PL_VRAM1; ++i) {
|
|
man = ttm_manager_type(&xe->ttm, i);
|
|
if (man)
|
|
vram_total_mb += DIV_ROUND_UP_ULL(man->size, 1024 * 1024);
|
|
}
|
|
|
|
drm_dbg(&xe->drm, "Total vram %u mb\n", vram_total_mb);
|
|
|
|
if (threshold > vram_total_mb)
|
|
return -EINVAL;
|
|
|
|
mutex_lock(&xe->d3cold.lock);
|
|
xe->d3cold.vram_threshold = threshold;
|
|
mutex_unlock(&xe->d3cold.lock);
|
|
|
|
return 0;
|
|
}
|
|
|
|
void xe_pm_d3cold_allowed_toggle(struct xe_device *xe)
|
|
{
|
|
struct ttm_resource_manager *man;
|
|
u32 total_vram_used_mb = 0;
|
|
u64 vram_used;
|
|
int i;
|
|
|
|
if (!xe->d3cold.capable) {
|
|
xe->d3cold.allowed = false;
|
|
return;
|
|
}
|
|
|
|
for (i = XE_PL_VRAM0; i <= XE_PL_VRAM1; ++i) {
|
|
man = ttm_manager_type(&xe->ttm, i);
|
|
if (man) {
|
|
vram_used = ttm_resource_manager_usage(man);
|
|
total_vram_used_mb += DIV_ROUND_UP_ULL(vram_used, 1024 * 1024);
|
|
}
|
|
}
|
|
|
|
mutex_lock(&xe->d3cold.lock);
|
|
|
|
if (total_vram_used_mb < xe->d3cold.vram_threshold)
|
|
xe->d3cold.allowed = true;
|
|
else
|
|
xe->d3cold.allowed = false;
|
|
|
|
mutex_unlock(&xe->d3cold.lock);
|
|
|
|
drm_dbg(&xe->drm,
|
|
"d3cold: allowed=%s\n", str_yes_no(xe->d3cold.allowed));
|
|
}
|