linux/include/uapi/drm
Felix Kuehling d1a372af1c drm/amdgpu: Set MTYPE in PTE based on BO flags
The same BO may need different MTYPEs and SNOOP flags in PTEs depending
on its current location relative to the mapping GPU. Setting MTYPEs from
clients ahead of time is not practical for coherent memory sharing.
Instead determine the correct MTYPE for the desired coherence model and
current BO location when updating the page tables.

To maintain backwards compatibility with MTYPE-selection in
AMDGPU_VA_OP_MAP, the coherence-model-based MTYPE selection is only
applied if it chooses an MTYPE other than MTYPE_NC (the default).

Add two AMDGPU_GEM_CREATE_... flags to indicate the coherence model. The
default if no flag is specified is non-coherent (i.e. coarse-grained
coherent at dispatch boundaries).

Update amdgpu_amdkfd_gpuvm.c to use this new method to choose the
correct MTYPE depending on the current memory location.

v2:
* check that bo is not NULL (e.g. PRT mappings)
* Fix missing ~ bitmask in gmc_v11_0.c
v3:
* squash in "drm/amdgpu: Inherit coherence flags on dmabuf import"

Suggested-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-11-09 17:41:42 -05:00
..
amdgpu_drm.h drm/amdgpu: Set MTYPE in PTE based on BO flags 2022-11-09 17:41:42 -05:00
armada_drm.h License cleanup: add SPDX license identifier to uapi header files with a license 2017-11-02 11:20:11 +01:00
drm.h drm: document DRM_IOCTL_MODE_GETFB2 2021-12-14 12:03:32 +01:00
drm_fourcc.h drm/fourcc: add Vivante tile status modifiers 2022-10-06 19:04:20 +02:00
drm_mode.h drm: document uAPI page-flip flags 2022-10-04 14:47:35 +02:00
drm_sarea.h
etnaviv_drm.h drm/etnaviv: provide more ID values via GET_PARAM ioctl. 2021-01-22 12:33:57 +01:00
exynos_drm.h drm/exynos: Rename Exynos to lowercase 2020-01-21 09:09:42 +09:00
i810_drm.h License cleanup: add SPDX license identifier to uapi header files with no license 2017-11-02 11:19:54 +01:00
i915_drm.h drm/i915/perf: Apply Wa_18013179988 2022-10-27 12:36:53 -07:00
lima_drm.h drm/lima: support heap buffer creation 2020-01-27 22:01:09 +08:00
mga_drm.h drm/mga/mga_ioc32: Use struct_group() for memcpy() region 2021-09-25 08:20:48 -07:00
msm_drm.h drm/msm: Add a way for userspace to allocate GPU iova 2022-04-21 15:03:12 -07:00
nouveau_drm.h drm/nouveau: support synchronous pushbuf submission 2020-01-29 15:49:56 +10:00
omap_drm.h Revert "drm/omap: add OMAP_BO flags to affect buffer allocation" 2019-10-23 10:41:41 -04:00
panfrost_drm.h drm/panfrost: replace endian-specific types with native ones 2022-10-20 11:02:11 +01:00
qxl_drm.h drm/qxl: fix __user annotations 2017-06-23 10:06:31 +02:00
r128_drm.h
radeon_drm.h
savage_drm.h
sis_drm.h
tegra_drm.h drm/tegra: Add new UAPI to header 2021-08-10 14:48:17 +02:00
v3d_drm.h drm/v3d: add multiple syncobjs support 2021-10-04 10:08:46 +01:00
vc4_drm.h drm/vc4: Add a pad field to align drm_vc4_submit_cl to 64 bits. 2018-05-03 15:20:09 -07:00
vgem_drm.h
via_drm.h
virtgpu_drm.h drm/virtgpu api: define a dummy fence signaled event 2021-11-29 11:46:32 +01:00
vmwgfx_drm.h drm/vmwgfx: Allow querying of the SVGA PCI id from the userspace 2022-03-11 13:29:35 -05:00