Files
linux/drivers
Daniel Vetter 7ca1ac135b drm/i915: Remove spll_refcount for hsw
SPLL would be a reference clock we could potentially share,
especially if we want to use the SSC mode. But currently we
don't, so let's rip out this complexity for a simpler conversion
to the new display pll framework.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-07-10 22:04:37 +02:00
..
2014-06-23 16:47:44 -07:00
2014-06-17 14:28:04 +02:00
2014-06-26 13:34:15 +01:00
2014-06-17 15:43:48 -07:00
2014-06-26 10:48:23 +01:00
2014-06-23 09:22:48 +03:00
2014-07-01 13:18:38 +03:00