Files
linux/drivers/net/phy
Joakim Zhang 6813cc8cfd net: phy: realtek: add delay to fix RXC generation issue
PHY will delay about 11.5ms to generate RXC clock when switching from
power down to normal operation. Read/write registers would also cause RXC
become unstable and stop for a while during this process. Realtek engineer
suggests 15ms or more delay can workaround this issue.

Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-06-08 11:41:24 -07:00
..
2021-02-11 13:09:58 -08:00
2021-02-11 13:09:58 -08:00
2021-05-17 15:50:58 -07:00
2020-09-28 15:14:42 -07:00