8a27ad81f7
The NPU device consists of two parts: NPU buttress and NPU IP. Buttress is a platform specific part that integrates the NPU IP with the CPU. NPU IP is the platform agnostic part that does the inference. This separation enables support for multiple platforms using a single NPU IP, so for example NPU IP 37XX could be integrated into MTL and LNL platforms. Signed-off-by: Wachowski, Karol <karol.wachowski@intel.com> Signed-off-by: Jacek Lawrynowicz <jacek.lawrynowicz@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240515113006.457472-3-jacek.lawrynowicz@linux.intel.com
24 lines
422 B
Makefile
24 lines
422 B
Makefile
# SPDX-License-Identifier: GPL-2.0-only
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# Copyright (C) 2023-2024 Intel Corporation
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intel_vpu-y := \
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ivpu_drv.o \
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ivpu_fw.o \
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ivpu_fw_log.o \
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ivpu_gem.o \
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ivpu_hw.o \
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ivpu_hw_btrs.o \
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ivpu_hw_ip.o \
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ivpu_ipc.o \
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ivpu_job.o \
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ivpu_jsm_msg.o \
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ivpu_mmu.o \
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ivpu_mmu_context.o \
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ivpu_ms.o \
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ivpu_pm.o \
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ivpu_sysfs.o
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intel_vpu-$(CONFIG_DEBUG_FS) += ivpu_debugfs.o
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obj-$(CONFIG_DRM_ACCEL_IVPU) += intel_vpu.o
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