linux/drivers/gpu
Ben Skeggs a7cf01809b drm/nouveau/fifo/gk104-: require explicit runlist selection for channel allocation
We didn't used to be aware that runlist/engine IDs weren't the same thing,
or that there was such variability in configuration between GPUs.

By exposing this information to a client, and giving it explicit control
of which runlist it's allocating a channel on, we're able to make better
choices.

The immediate effect of this is that on GPUs where CE0 is the "GRCE", we
will now be allocating a copy engine running asynchronously to GR for BO
migrations - as intended.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:21 +10:00
..
drm drm/nouveau/fifo/gk104-: require explicit runlist selection for channel allocation 2018-05-18 15:01:21 +10:00
host1x gpu: host1x: Use IOMMU groups 2017-12-21 14:52:36 +01:00
ipu-v3 gpu: ipu-v3: prg: avoid possible array underflow 2018-03-15 17:52:08 +01:00
vga vga_switcheroo: Let HDA autosuspend on mux change 2018-03-13 22:58:49 +01:00
Makefile