John David Anglin d3a5a68cff parisc: Fix mask used to select futex spinlock ... The address bits used to select the futex spinlock need to match those used in the LWS code in syscall.S. The mask 0x3f8 only selects 7 bits. It should select 8 bits. This change fixes the glibc nptl/tst-cond24 and nptl/tst-cond25 tests. Signed-off-by: John David Anglin <dave.anglin@bell.net> Fixes: 53a42b6324 ("parisc: Switch to more fine grained lws locks") Cc: stable@vger.kernel.org # 5.10+ Signed-off-by: Helge Deller <deller@gmx.de>		2021-12-21 21:15:59 +01:00
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asm	parisc: Fix mask used to select futex spinlock	2021-12-21 21:15:59 +01:00
uapi/asm	Core:	2021-11-02 06:20:58 -07:00