Files
linux/drivers
Icenowy Zheng bb021cda2c clk: sunxi-ng: set the parent rate when adjustin CPUX clock on A33
The CPUX clock on A33, which is for the Cortex-A7 cores, is designed to
be changeable by changing the rate of PLL_CPUX.

Add CLK_SET_RATE_PARENT flag to this clock.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-01-02 22:24:55 +01:00
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